1 // Copyright 2014 the V8 project authors. All rights reserved. 2 // Use of this source code is governed by a BSD-style license that can be 3 // found in the LICENSE file. 4 5 // Declares a Simulator for S390 instructions if we are not generating a native 6 // S390 binary. This Simulator allows us to run and debug S390 code generation 7 // on regular desktop machines. 8 // V8 calls into generated code via the GeneratedCode wrapper, 9 // which will start execution in the Simulator or forwards to the real entry 10 // on a S390 hardware platform. 11 12 #ifndef V8_S390_SIMULATOR_S390_H_ 13 #define V8_S390_SIMULATOR_S390_H_ 14 15 #include "src/allocation.h" 16 17 #if defined(USE_SIMULATOR) 18 // Running with a simulator. 19 20 #include "src/assembler.h" 21 #include "src/base/hashmap.h" 22 #include "src/s390/constants-s390.h" 23 #include "src/simulator-base.h" 24 25 namespace v8 { 26 namespace internal { 27 28 class CachePage { 29 public: 30 static const int LINE_VALID = 0; 31 static const int LINE_INVALID = 1; 32 33 static const int kPageShift = 12; 34 static const int kPageSize = 1 << kPageShift; 35 static const int kPageMask = kPageSize - 1; 36 static const int kLineShift = 2; // The cache line is only 4 bytes right now. 37 static const int kLineLength = 1 << kLineShift; 38 static const int kLineMask = kLineLength - 1; 39 40 CachePage() { memset(&validity_map_, LINE_INVALID, sizeof(validity_map_)); } 41 42 char* ValidityByte(int offset) { 43 return &validity_map_[offset >> kLineShift]; 44 } 45 46 char* CachedData(int offset) { return &data_[offset]; } 47 48 private: 49 char data_[kPageSize]; // The cached data. 50 static const int kValidityMapSize = kPageSize >> kLineShift; 51 char validity_map_[kValidityMapSize]; // One byte per line. 52 }; 53 54 class Simulator : public SimulatorBase { 55 public: 56 friend class S390Debugger; 57 enum Register { 58 no_reg = -1, 59 r0 = 0, 60 r1 = 1, 61 r2 = 2, 62 r3 = 3, 63 r4 = 4, 64 r5 = 5, 65 r6 = 6, 66 r7 = 7, 67 r8 = 8, 68 r9 = 9, 69 r10 = 10, 70 r11 = 11, 71 r12 = 12, 72 r13 = 13, 73 r14 = 14, 74 r15 = 15, 75 fp = r11, 76 ip = r12, 77 cp = r13, 78 ra = r14, 79 sp = r15, // name aliases 80 kNumGPRs = 16, 81 d0 = 0, 82 d1, 83 d2, 84 d3, 85 d4, 86 d5, 87 d6, 88 d7, 89 d8, 90 d9, 91 d10, 92 d11, 93 d12, 94 d13, 95 d14, 96 d15, 97 kNumFPRs = 16 98 }; 99 100 explicit Simulator(Isolate* isolate); 101 ~Simulator(); 102 103 // The currently executing Simulator instance. Potentially there can be one 104 // for each native thread. 105 static Simulator* current(v8::internal::Isolate* isolate); 106 107 // Accessors for register state. 108 void set_register(int reg, uint64_t value); 109 uint64_t get_register(int reg) const; 110 template <typename T> 111 T get_low_register(int reg) const; 112 template <typename T> 113 T get_high_register(int reg) const; 114 void set_low_register(int reg, uint32_t value); 115 void set_high_register(int reg, uint32_t value); 116 117 double get_double_from_register_pair(int reg); 118 void set_d_register_from_double(int dreg, const double dbl) { 119 DCHECK(dreg >= 0 && dreg < kNumFPRs); 120 *bit_cast<double*>(&fp_registers_[dreg]) = dbl; 121 } 122 123 double get_double_from_d_register(int dreg) { 124 DCHECK(dreg >= 0 && dreg < kNumFPRs); 125 return *bit_cast<double*>(&fp_registers_[dreg]); 126 } 127 void set_d_register(int dreg, int64_t value) { 128 DCHECK(dreg >= 0 && dreg < kNumFPRs); 129 fp_registers_[dreg] = value; 130 } 131 int64_t get_d_register(int dreg) { 132 DCHECK(dreg >= 0 && dreg < kNumFPRs); 133 return fp_registers_[dreg]; 134 } 135 136 void set_d_register_from_float32(int dreg, const float f) { 137 DCHECK(dreg >= 0 && dreg < kNumFPRs); 138 139 int32_t f_int = *bit_cast<int32_t*>(&f); 140 int64_t finalval = static_cast<int64_t>(f_int) << 32; 141 set_d_register(dreg, finalval); 142 } 143 144 float get_float32_from_d_register(int dreg) { 145 DCHECK(dreg >= 0 && dreg < kNumFPRs); 146 147 int64_t regval = get_d_register(dreg) >> 32; 148 int32_t regval32 = static_cast<int32_t>(regval); 149 return *bit_cast<float*>(®val32); 150 } 151 152 // Special case of set_register and get_register to access the raw PC value. 153 void set_pc(intptr_t value); 154 intptr_t get_pc() const; 155 156 Address get_sp() const { return static_cast<Address>(get_register(sp)); } 157 158 // Accessor to the internal simulator stack area. 159 uintptr_t StackLimit(uintptr_t c_limit) const; 160 161 // Executes S390 instructions until the PC reaches end_sim_pc. 162 void Execute(); 163 164 template <typename Return, typename... Args> 165 Return Call(Address entry, Args... args) { 166 return VariadicCall<Return>(this, &Simulator::CallImpl, entry, args...); 167 } 168 169 // Alternative: call a 2-argument double function. 170 void CallFP(Address entry, double d0, double d1); 171 int32_t CallFPReturnsInt(Address entry, double d0, double d1); 172 double CallFPReturnsDouble(Address entry, double d0, double d1); 173 174 // Push an address onto the JS stack. 175 uintptr_t PushAddress(uintptr_t address); 176 177 // Pop an address from the JS stack. 178 uintptr_t PopAddress(); 179 180 // Debugger input. 181 void set_last_debugger_input(char* input); 182 char* last_debugger_input() { return last_debugger_input_; } 183 184 // Redirection support. 185 static void SetRedirectInstruction(Instruction* instruction); 186 187 // ICache checking. 188 static bool ICacheMatch(void* one, void* two); 189 static void FlushICache(base::CustomMatcherHashMap* i_cache, void* start, 190 size_t size); 191 192 // Returns true if pc register contains one of the 'special_values' defined 193 // below (bad_lr, end_sim_pc). 194 bool has_bad_pc() const; 195 196 private: 197 enum special_values { 198 // Known bad pc value to ensure that the simulator does not execute 199 // without being properly setup. 200 bad_lr = -1, 201 // A pc value used to signal the simulator to stop execution. Generally 202 // the lr is set to this value on transition from native C code to 203 // simulated execution, so that the simulator can "return" to the native 204 // C code. 205 end_sim_pc = -2 206 }; 207 208 intptr_t CallImpl(Address entry, int argument_count, 209 const intptr_t* arguments); 210 211 // Unsupported instructions use Format to print an error and stop execution. 212 void Format(Instruction* instr, const char* format); 213 214 // Helper functions to set the conditional flags in the architecture state. 215 bool CarryFrom(int32_t left, int32_t right, int32_t carry = 0); 216 bool BorrowFrom(int32_t left, int32_t right); 217 template <typename T1> 218 inline bool OverflowFromSigned(T1 alu_out, T1 left, T1 right, bool addition); 219 220 // Helper functions to decode common "addressing" modes 221 int32_t GetShiftRm(Instruction* instr, bool* carry_out); 222 int32_t GetImm(Instruction* instr, bool* carry_out); 223 void ProcessPUW(Instruction* instr, int num_regs, int operand_size, 224 intptr_t* start_address, intptr_t* end_address); 225 void HandleRList(Instruction* instr, bool load); 226 void HandleVList(Instruction* inst); 227 void SoftwareInterrupt(Instruction* instr); 228 229 // Stop helper functions. 230 inline bool isStopInstruction(Instruction* instr); 231 inline bool isWatchedStop(uint32_t bkpt_code); 232 inline bool isEnabledStop(uint32_t bkpt_code); 233 inline void EnableStop(uint32_t bkpt_code); 234 inline void DisableStop(uint32_t bkpt_code); 235 inline void IncreaseStopCounter(uint32_t bkpt_code); 236 void PrintStopInfo(uint32_t code); 237 238 // Byte Reverse 239 inline int16_t ByteReverse(int16_t hword); 240 inline int32_t ByteReverse(int32_t word); 241 inline int64_t ByteReverse(int64_t dword); 242 243 // Read and write memory. 244 inline uint8_t ReadBU(intptr_t addr); 245 inline int8_t ReadB(intptr_t addr); 246 inline void WriteB(intptr_t addr, uint8_t value); 247 inline void WriteB(intptr_t addr, int8_t value); 248 249 inline uint16_t ReadHU(intptr_t addr, Instruction* instr); 250 inline int16_t ReadH(intptr_t addr, Instruction* instr); 251 // Note: Overloaded on the sign of the value. 252 inline void WriteH(intptr_t addr, uint16_t value, Instruction* instr); 253 inline void WriteH(intptr_t addr, int16_t value, Instruction* instr); 254 255 inline uint32_t ReadWU(intptr_t addr, Instruction* instr); 256 inline int32_t ReadW(intptr_t addr, Instruction* instr); 257 inline int64_t ReadW64(intptr_t addr, Instruction* instr); 258 inline void WriteW(intptr_t addr, uint32_t value, Instruction* instr); 259 inline void WriteW(intptr_t addr, int32_t value, Instruction* instr); 260 261 inline int64_t ReadDW(intptr_t addr); 262 inline double ReadDouble(intptr_t addr); 263 inline float ReadFloat(intptr_t addr); 264 inline void WriteDW(intptr_t addr, int64_t value); 265 266 // S390 267 void Trace(Instruction* instr); 268 269 // Used by the CL**BR instructions. 270 template <typename T1, typename T2> 271 void SetS390RoundConditionCode(T1 r2_val, T2 max, T2 min) { 272 condition_reg_ = 0; 273 double r2_dval = static_cast<double>(r2_val); 274 double dbl_min = static_cast<double>(min); 275 double dbl_max = static_cast<double>(max); 276 277 if (r2_dval == 0.0) 278 condition_reg_ = 8; 279 else if (r2_dval < 0.0 && r2_dval >= dbl_min && std::isfinite(r2_dval)) 280 condition_reg_ = 4; 281 else if (r2_dval > 0.0 && r2_dval <= dbl_max && std::isfinite(r2_dval)) 282 condition_reg_ = 2; 283 else 284 condition_reg_ = 1; 285 } 286 287 template <typename T1> 288 void SetS390RoundConditionCode(T1 r2_val, int64_t max, int64_t min) { 289 condition_reg_ = 0; 290 double r2_dval = static_cast<double>(r2_val); 291 double dbl_min = static_cast<double>(min); 292 double dbl_max = static_cast<double>(max); 293 294 // Note that the IEEE 754 floating-point representations (both 32 and 295 // 64 bit) cannot exactly represent INT64_MAX. The closest it can get 296 // is INT64_max + 1. IEEE 754 FP can, though, represent INT64_MIN 297 // exactly. 298 299 // This is not an issue for INT32, as IEEE754 64-bit can represent 300 // INT32_MAX and INT32_MIN with exact precision. 301 302 if (r2_dval == 0.0) 303 condition_reg_ = 8; 304 else if (r2_dval < 0.0 && r2_dval >= dbl_min && std::isfinite(r2_dval)) 305 condition_reg_ = 4; 306 else if (r2_dval > 0.0 && r2_dval < dbl_max && std::isfinite(r2_dval)) 307 condition_reg_ = 2; 308 else 309 condition_reg_ = 1; 310 } 311 312 // Used by the CL**BR instructions. 313 template <typename T1, typename T2, typename T3> 314 void SetS390ConvertConditionCode(T1 src, T2 dst, T3 max) { 315 condition_reg_ = 0; 316 if (src == static_cast<T1>(0.0)) { 317 condition_reg_ |= 8; 318 } else if (src < static_cast<T1>(0.0) && static_cast<T2>(src) == 0 && 319 std::isfinite(src)) { 320 condition_reg_ |= 4; 321 } else if (src > static_cast<T1>(0.0) && std::isfinite(src) && 322 src < static_cast<T1>(max)) { 323 condition_reg_ |= 2; 324 } else { 325 condition_reg_ |= 1; 326 } 327 } 328 329 template <typename T> 330 void SetS390ConditionCode(T lhs, T rhs) { 331 condition_reg_ = 0; 332 if (lhs == rhs) { 333 condition_reg_ |= CC_EQ; 334 } else if (lhs < rhs) { 335 condition_reg_ |= CC_LT; 336 } else if (lhs > rhs) { 337 condition_reg_ |= CC_GT; 338 } 339 340 // We get down here only for floating point 341 // comparisons and the values are unordered 342 // i.e. NaN 343 if (condition_reg_ == 0) condition_reg_ = unordered; 344 } 345 346 // Used by arithmetic operations that use carry. 347 template <typename T> 348 void SetS390ConditionCodeCarry(T result, bool overflow) { 349 condition_reg_ = 0; 350 bool zero_result = (result == static_cast<T>(0)); 351 if (zero_result && !overflow) { 352 condition_reg_ |= 8; 353 } else if (!zero_result && !overflow) { 354 condition_reg_ |= 4; 355 } else if (zero_result && overflow) { 356 condition_reg_ |= 2; 357 } else if (!zero_result && overflow) { 358 condition_reg_ |= 1; 359 } 360 if (condition_reg_ == 0) UNREACHABLE(); 361 } 362 363 bool isNaN(double value) { return (value != value); } 364 365 // Set the condition code for bitwise operations 366 // CC0 is set if value == 0. 367 // CC1 is set if value != 0. 368 // CC2/CC3 are not set. 369 template <typename T> 370 void SetS390BitWiseConditionCode(T value) { 371 condition_reg_ = 0; 372 373 if (value == 0) 374 condition_reg_ |= CC_EQ; 375 else 376 condition_reg_ |= CC_LT; 377 } 378 379 void SetS390OverflowCode(bool isOF) { 380 if (isOF) condition_reg_ = CC_OF; 381 } 382 383 bool TestConditionCode(Condition mask) { 384 // Check for unconditional branch 385 if (mask == 0xf) return true; 386 387 return (condition_reg_ & mask) != 0; 388 } 389 390 // Executes one instruction. 391 void ExecuteInstruction(Instruction* instr, bool auto_incr_pc = true); 392 393 // ICache. 394 static void CheckICache(base::CustomMatcherHashMap* i_cache, 395 Instruction* instr); 396 static void FlushOnePage(base::CustomMatcherHashMap* i_cache, intptr_t start, 397 int size); 398 static CachePage* GetCachePage(base::CustomMatcherHashMap* i_cache, 399 void* page); 400 401 // Handle arguments and return value for runtime FP functions. 402 void GetFpArgs(double* x, double* y, intptr_t* z); 403 void SetFpResult(const double& result); 404 void TrashCallerSaveRegisters(); 405 406 void CallInternal(Address entry, int reg_arg_count = 3); 407 408 // Architecture state. 409 // On z9 and higher and supported Linux on z Systems platforms, all registers 410 // are 64-bit, even in 31-bit mode. 411 uint64_t registers_[kNumGPRs]; 412 int64_t fp_registers_[kNumFPRs]; 413 414 // Condition Code register. In S390, the last 4 bits are used. 415 int32_t condition_reg_; 416 // Special register to track PC. 417 intptr_t special_reg_pc_; 418 419 // Simulator support. 420 char* stack_; 421 static const size_t stack_protection_size_ = 256 * kPointerSize; 422 bool pc_modified_; 423 int64_t icount_; 424 425 // Debugger input. 426 char* last_debugger_input_; 427 428 // Registered breakpoints. 429 Instruction* break_pc_; 430 Instr break_instr_; 431 432 v8::internal::Isolate* isolate_; 433 434 // A stop is watched if its code is less than kNumOfWatchedStops. 435 // Only watched stops support enabling/disabling and the counter feature. 436 static const uint32_t kNumOfWatchedStops = 256; 437 438 // Breakpoint is disabled if bit 31 is set. 439 static const uint32_t kStopDisabledBit = 1 << 31; 440 441 // A stop is enabled, meaning the simulator will stop when meeting the 442 // instruction, if bit 31 of watched_stops_[code].count is unset. 443 // The value watched_stops_[code].count & ~(1 << 31) indicates how many times 444 // the breakpoint was hit or gone through. 445 struct StopCountAndDesc { 446 uint32_t count; 447 char* desc; 448 }; 449 StopCountAndDesc watched_stops_[kNumOfWatchedStops]; 450 void DebugStart(); 451 452 int DecodeInstructionOriginal(Instruction* instr); 453 int DecodeInstruction(Instruction* instr); 454 int Evaluate_Unknown(Instruction* instr); 455 #define MAX_NUM_OPCODES (1 << 16) 456 typedef int (Simulator::*EvaluateFuncType)(Instruction*); 457 458 static EvaluateFuncType EvalTable[MAX_NUM_OPCODES]; 459 static void EvalTableInit(); 460 461 #define EVALUATE(name) int Evaluate_##name(Instruction* instr) 462 #define EVALUATE_VRR_INSTRUCTIONS(name, op_name, op_value) EVALUATE(op_name); 463 S390_VRR_C_OPCODE_LIST(EVALUATE_VRR_INSTRUCTIONS) 464 S390_VRR_A_OPCODE_LIST(EVALUATE_VRR_INSTRUCTIONS) 465 #undef EVALUATE_VRR_INSTRUCTIONS 466 467 EVALUATE(DUMY); 468 EVALUATE(BKPT); 469 EVALUATE(SPM); 470 EVALUATE(BALR); 471 EVALUATE(BCTR); 472 EVALUATE(BCR); 473 EVALUATE(SVC); 474 EVALUATE(BSM); 475 EVALUATE(BASSM); 476 EVALUATE(BASR); 477 EVALUATE(MVCL); 478 EVALUATE(CLCL); 479 EVALUATE(LPR); 480 EVALUATE(LNR); 481 EVALUATE(LTR); 482 EVALUATE(LCR); 483 EVALUATE(NR); 484 EVALUATE(CLR); 485 EVALUATE(OR); 486 EVALUATE(XR); 487 EVALUATE(LR); 488 EVALUATE(CR); 489 EVALUATE(AR); 490 EVALUATE(SR); 491 EVALUATE(MR); 492 EVALUATE(DR); 493 EVALUATE(ALR); 494 EVALUATE(SLR); 495 EVALUATE(LDR); 496 EVALUATE(CDR); 497 EVALUATE(LER); 498 EVALUATE(STH); 499 EVALUATE(LA); 500 EVALUATE(STC); 501 EVALUATE(IC_z); 502 EVALUATE(EX); 503 EVALUATE(BAL); 504 EVALUATE(BCT); 505 EVALUATE(BC); 506 EVALUATE(LH); 507 EVALUATE(CH); 508 EVALUATE(AH); 509 EVALUATE(SH); 510 EVALUATE(MH); 511 EVALUATE(BAS); 512 EVALUATE(CVD); 513 EVALUATE(CVB); 514 EVALUATE(ST); 515 EVALUATE(LAE); 516 EVALUATE(N); 517 EVALUATE(CL); 518 EVALUATE(O); 519 EVALUATE(X); 520 EVALUATE(L); 521 EVALUATE(C); 522 EVALUATE(A); 523 EVALUATE(S); 524 EVALUATE(M); 525 EVALUATE(D); 526 EVALUATE(AL); 527 EVALUATE(SL); 528 EVALUATE(STD); 529 EVALUATE(LD); 530 EVALUATE(CD); 531 EVALUATE(STE); 532 EVALUATE(MS); 533 EVALUATE(LE); 534 EVALUATE(BRXH); 535 EVALUATE(BRXLE); 536 EVALUATE(BXH); 537 EVALUATE(BXLE); 538 EVALUATE(SRL); 539 EVALUATE(SLL); 540 EVALUATE(SRA); 541 EVALUATE(SLA); 542 EVALUATE(SRDL); 543 EVALUATE(SLDL); 544 EVALUATE(SRDA); 545 EVALUATE(SLDA); 546 EVALUATE(STM); 547 EVALUATE(TM); 548 EVALUATE(MVI); 549 EVALUATE(TS); 550 EVALUATE(NI); 551 EVALUATE(CLI); 552 EVALUATE(OI); 553 EVALUATE(XI); 554 EVALUATE(LM); 555 EVALUATE(CS); 556 EVALUATE(MVCLE); 557 EVALUATE(CLCLE); 558 EVALUATE(MC); 559 EVALUATE(CDS); 560 EVALUATE(STCM); 561 EVALUATE(ICM); 562 EVALUATE(BPRP); 563 EVALUATE(BPP); 564 EVALUATE(TRTR); 565 EVALUATE(MVN); 566 EVALUATE(MVC); 567 EVALUATE(MVZ); 568 EVALUATE(NC); 569 EVALUATE(CLC); 570 EVALUATE(OC); 571 EVALUATE(XC); 572 EVALUATE(MVCP); 573 EVALUATE(TR); 574 EVALUATE(TRT); 575 EVALUATE(ED); 576 EVALUATE(EDMK); 577 EVALUATE(PKU); 578 EVALUATE(UNPKU); 579 EVALUATE(MVCIN); 580 EVALUATE(PKA); 581 EVALUATE(UNPKA); 582 EVALUATE(PLO); 583 EVALUATE(LMD); 584 EVALUATE(SRP); 585 EVALUATE(MVO); 586 EVALUATE(PACK); 587 EVALUATE(UNPK); 588 EVALUATE(ZAP); 589 EVALUATE(AP); 590 EVALUATE(SP); 591 EVALUATE(MP); 592 EVALUATE(DP); 593 EVALUATE(UPT); 594 EVALUATE(PFPO); 595 EVALUATE(IIHH); 596 EVALUATE(IIHL); 597 EVALUATE(IILH); 598 EVALUATE(IILL); 599 EVALUATE(NIHH); 600 EVALUATE(NIHL); 601 EVALUATE(NILH); 602 EVALUATE(NILL); 603 EVALUATE(OIHH); 604 EVALUATE(OIHL); 605 EVALUATE(OILH); 606 EVALUATE(OILL); 607 EVALUATE(LLIHH); 608 EVALUATE(LLIHL); 609 EVALUATE(LLILH); 610 EVALUATE(LLILL); 611 EVALUATE(TMLH); 612 EVALUATE(TMLL); 613 EVALUATE(TMHH); 614 EVALUATE(TMHL); 615 EVALUATE(BRC); 616 EVALUATE(BRAS); 617 EVALUATE(BRCT); 618 EVALUATE(BRCTG); 619 EVALUATE(LHI); 620 EVALUATE(LGHI); 621 EVALUATE(AHI); 622 EVALUATE(AGHI); 623 EVALUATE(MHI); 624 EVALUATE(MGHI); 625 EVALUATE(CHI); 626 EVALUATE(CGHI); 627 EVALUATE(LARL); 628 EVALUATE(LGFI); 629 EVALUATE(BRCL); 630 EVALUATE(BRASL); 631 EVALUATE(XIHF); 632 EVALUATE(XILF); 633 EVALUATE(IIHF); 634 EVALUATE(IILF); 635 EVALUATE(NIHF); 636 EVALUATE(NILF); 637 EVALUATE(OIHF); 638 EVALUATE(OILF); 639 EVALUATE(LLIHF); 640 EVALUATE(LLILF); 641 EVALUATE(MSGFI); 642 EVALUATE(MSFI); 643 EVALUATE(SLGFI); 644 EVALUATE(SLFI); 645 EVALUATE(AGFI); 646 EVALUATE(AFI); 647 EVALUATE(ALGFI); 648 EVALUATE(ALFI); 649 EVALUATE(CGFI); 650 EVALUATE(CFI); 651 EVALUATE(CLGFI); 652 EVALUATE(CLFI); 653 EVALUATE(LLHRL); 654 EVALUATE(LGHRL); 655 EVALUATE(LHRL); 656 EVALUATE(LLGHRL); 657 EVALUATE(STHRL); 658 EVALUATE(LGRL); 659 EVALUATE(STGRL); 660 EVALUATE(LGFRL); 661 EVALUATE(LRL); 662 EVALUATE(LLGFRL); 663 EVALUATE(STRL); 664 EVALUATE(EXRL); 665 EVALUATE(PFDRL); 666 EVALUATE(CGHRL); 667 EVALUATE(CHRL); 668 EVALUATE(CGRL); 669 EVALUATE(CGFRL); 670 EVALUATE(ECTG); 671 EVALUATE(CSST); 672 EVALUATE(LPD); 673 EVALUATE(LPDG); 674 EVALUATE(BRCTH); 675 EVALUATE(AIH); 676 EVALUATE(ALSIH); 677 EVALUATE(ALSIHN); 678 EVALUATE(CIH); 679 EVALUATE(CLIH); 680 EVALUATE(STCK); 681 EVALUATE(CFC); 682 EVALUATE(IPM); 683 EVALUATE(HSCH); 684 EVALUATE(MSCH); 685 EVALUATE(SSCH); 686 EVALUATE(STSCH); 687 EVALUATE(TSCH); 688 EVALUATE(TPI); 689 EVALUATE(SAL); 690 EVALUATE(RSCH); 691 EVALUATE(STCRW); 692 EVALUATE(STCPS); 693 EVALUATE(RCHP); 694 EVALUATE(SCHM); 695 EVALUATE(CKSM); 696 EVALUATE(SAR); 697 EVALUATE(EAR); 698 EVALUATE(MSR); 699 EVALUATE(MSRKC); 700 EVALUATE(MVST); 701 EVALUATE(CUSE); 702 EVALUATE(SRST); 703 EVALUATE(XSCH); 704 EVALUATE(STCKE); 705 EVALUATE(STCKF); 706 EVALUATE(SRNM); 707 EVALUATE(STFPC); 708 EVALUATE(LFPC); 709 EVALUATE(TRE); 710 EVALUATE(CUUTF); 711 EVALUATE(CUTFU); 712 EVALUATE(STFLE); 713 EVALUATE(SRNMB); 714 EVALUATE(SRNMT); 715 EVALUATE(LFAS); 716 EVALUATE(PPA); 717 EVALUATE(ETND); 718 EVALUATE(TEND); 719 EVALUATE(NIAI); 720 EVALUATE(TABORT); 721 EVALUATE(TRAP4); 722 EVALUATE(LPEBR); 723 EVALUATE(LNEBR); 724 EVALUATE(LTEBR); 725 EVALUATE(LCEBR); 726 EVALUATE(LDEBR); 727 EVALUATE(LXDBR); 728 EVALUATE(LXEBR); 729 EVALUATE(MXDBR); 730 EVALUATE(KEBR); 731 EVALUATE(CEBR); 732 EVALUATE(AEBR); 733 EVALUATE(SEBR); 734 EVALUATE(MDEBR); 735 EVALUATE(DEBR); 736 EVALUATE(MAEBR); 737 EVALUATE(MSEBR); 738 EVALUATE(LPDBR); 739 EVALUATE(LNDBR); 740 EVALUATE(LTDBR); 741 EVALUATE(LCDBR); 742 EVALUATE(SQEBR); 743 EVALUATE(SQDBR); 744 EVALUATE(SQXBR); 745 EVALUATE(MEEBR); 746 EVALUATE(KDBR); 747 EVALUATE(CDBR); 748 EVALUATE(ADBR); 749 EVALUATE(SDBR); 750 EVALUATE(MDBR); 751 EVALUATE(DDBR); 752 EVALUATE(MADBR); 753 EVALUATE(MSDBR); 754 EVALUATE(LPXBR); 755 EVALUATE(LNXBR); 756 EVALUATE(LTXBR); 757 EVALUATE(LCXBR); 758 EVALUATE(LEDBRA); 759 EVALUATE(LDXBRA); 760 EVALUATE(LEXBRA); 761 EVALUATE(FIXBRA); 762 EVALUATE(KXBR); 763 EVALUATE(CXBR); 764 EVALUATE(AXBR); 765 EVALUATE(SXBR); 766 EVALUATE(MXBR); 767 EVALUATE(DXBR); 768 EVALUATE(TBEDR); 769 EVALUATE(TBDR); 770 EVALUATE(DIEBR); 771 EVALUATE(FIEBRA); 772 EVALUATE(THDER); 773 EVALUATE(THDR); 774 EVALUATE(DIDBR); 775 EVALUATE(FIDBRA); 776 EVALUATE(LXR); 777 EVALUATE(LPDFR); 778 EVALUATE(LNDFR); 779 EVALUATE(LCDFR); 780 EVALUATE(LZER); 781 EVALUATE(LZDR); 782 EVALUATE(LZXR); 783 EVALUATE(SFPC); 784 EVALUATE(SFASR); 785 EVALUATE(EFPC); 786 EVALUATE(CELFBR); 787 EVALUATE(CDLFBR); 788 EVALUATE(CXLFBR); 789 EVALUATE(CEFBRA); 790 EVALUATE(CDFBRA); 791 EVALUATE(CXFBRA); 792 EVALUATE(CFEBRA); 793 EVALUATE(CFDBRA); 794 EVALUATE(CFXBRA); 795 EVALUATE(CLFEBR); 796 EVALUATE(CLFDBR); 797 EVALUATE(CLFXBR); 798 EVALUATE(CELGBR); 799 EVALUATE(CDLGBR); 800 EVALUATE(CXLGBR); 801 EVALUATE(CEGBRA); 802 EVALUATE(CDGBRA); 803 EVALUATE(CXGBRA); 804 EVALUATE(CGEBRA); 805 EVALUATE(CGDBRA); 806 EVALUATE(CGXBRA); 807 EVALUATE(CLGEBR); 808 EVALUATE(CLGDBR); 809 EVALUATE(CFER); 810 EVALUATE(CFDR); 811 EVALUATE(CFXR); 812 EVALUATE(LDGR); 813 EVALUATE(CGER); 814 EVALUATE(CGDR); 815 EVALUATE(CGXR); 816 EVALUATE(LGDR); 817 EVALUATE(MDTR); 818 EVALUATE(MDTRA); 819 EVALUATE(DDTRA); 820 EVALUATE(ADTRA); 821 EVALUATE(SDTRA); 822 EVALUATE(LDETR); 823 EVALUATE(LEDTR); 824 EVALUATE(LTDTR); 825 EVALUATE(FIDTR); 826 EVALUATE(MXTRA); 827 EVALUATE(DXTRA); 828 EVALUATE(AXTRA); 829 EVALUATE(SXTRA); 830 EVALUATE(LXDTR); 831 EVALUATE(LDXTR); 832 EVALUATE(LTXTR); 833 EVALUATE(FIXTR); 834 EVALUATE(KDTR); 835 EVALUATE(CGDTRA); 836 EVALUATE(CUDTR); 837 EVALUATE(CDTR); 838 EVALUATE(EEDTR); 839 EVALUATE(ESDTR); 840 EVALUATE(KXTR); 841 EVALUATE(CGXTRA); 842 EVALUATE(CUXTR); 843 EVALUATE(CSXTR); 844 EVALUATE(CXTR); 845 EVALUATE(EEXTR); 846 EVALUATE(ESXTR); 847 EVALUATE(CDGTRA); 848 EVALUATE(CDUTR); 849 EVALUATE(CDSTR); 850 EVALUATE(CEDTR); 851 EVALUATE(QADTR); 852 EVALUATE(IEDTR); 853 EVALUATE(RRDTR); 854 EVALUATE(CXGTRA); 855 EVALUATE(CXUTR); 856 EVALUATE(CXSTR); 857 EVALUATE(CEXTR); 858 EVALUATE(QAXTR); 859 EVALUATE(IEXTR); 860 EVALUATE(RRXTR); 861 EVALUATE(LPGR); 862 EVALUATE(LNGR); 863 EVALUATE(LTGR); 864 EVALUATE(LCGR); 865 EVALUATE(LGR); 866 EVALUATE(LGBR); 867 EVALUATE(LGHR); 868 EVALUATE(AGR); 869 EVALUATE(SGR); 870 EVALUATE(ALGR); 871 EVALUATE(SLGR); 872 EVALUATE(MSGR); 873 EVALUATE(MSGRKC); 874 EVALUATE(DSGR); 875 EVALUATE(LRVGR); 876 EVALUATE(LPGFR); 877 EVALUATE(LNGFR); 878 EVALUATE(LTGFR); 879 EVALUATE(LCGFR); 880 EVALUATE(LGFR); 881 EVALUATE(LLGFR); 882 EVALUATE(LLGTR); 883 EVALUATE(AGFR); 884 EVALUATE(SGFR); 885 EVALUATE(ALGFR); 886 EVALUATE(SLGFR); 887 EVALUATE(MSGFR); 888 EVALUATE(DSGFR); 889 EVALUATE(KMAC); 890 EVALUATE(LRVR); 891 EVALUATE(CGR); 892 EVALUATE(CLGR); 893 EVALUATE(LBR); 894 EVALUATE(LHR); 895 EVALUATE(KMF); 896 EVALUATE(KMO); 897 EVALUATE(PCC); 898 EVALUATE(KMCTR); 899 EVALUATE(KM); 900 EVALUATE(KMC); 901 EVALUATE(CGFR); 902 EVALUATE(KIMD); 903 EVALUATE(KLMD); 904 EVALUATE(CFDTR); 905 EVALUATE(CLGDTR); 906 EVALUATE(CLFDTR); 907 EVALUATE(BCTGR); 908 EVALUATE(CFXTR); 909 EVALUATE(CLFXTR); 910 EVALUATE(CDFTR); 911 EVALUATE(CDLGTR); 912 EVALUATE(CDLFTR); 913 EVALUATE(CXFTR); 914 EVALUATE(CXLGTR); 915 EVALUATE(CXLFTR); 916 EVALUATE(CGRT); 917 EVALUATE(NGR); 918 EVALUATE(OGR); 919 EVALUATE(XGR); 920 EVALUATE(FLOGR); 921 EVALUATE(LLGCR); 922 EVALUATE(LLGHR); 923 EVALUATE(MLGR); 924 EVALUATE(DLGR); 925 EVALUATE(ALCGR); 926 EVALUATE(SLBGR); 927 EVALUATE(EPSW); 928 EVALUATE(TRTT); 929 EVALUATE(TRTO); 930 EVALUATE(TROT); 931 EVALUATE(TROO); 932 EVALUATE(LLCR); 933 EVALUATE(LLHR); 934 EVALUATE(MLR); 935 EVALUATE(DLR); 936 EVALUATE(ALCR); 937 EVALUATE(SLBR); 938 EVALUATE(CU14); 939 EVALUATE(CU24); 940 EVALUATE(CU41); 941 EVALUATE(CU42); 942 EVALUATE(TRTRE); 943 EVALUATE(SRSTU); 944 EVALUATE(TRTE); 945 EVALUATE(AHHHR); 946 EVALUATE(SHHHR); 947 EVALUATE(ALHHHR); 948 EVALUATE(SLHHHR); 949 EVALUATE(CHHR); 950 EVALUATE(AHHLR); 951 EVALUATE(SHHLR); 952 EVALUATE(ALHHLR); 953 EVALUATE(SLHHLR); 954 EVALUATE(CHLR); 955 EVALUATE(POPCNT_Z); 956 EVALUATE(LOCGR); 957 EVALUATE(NGRK); 958 EVALUATE(OGRK); 959 EVALUATE(XGRK); 960 EVALUATE(AGRK); 961 EVALUATE(SGRK); 962 EVALUATE(ALGRK); 963 EVALUATE(SLGRK); 964 EVALUATE(LOCR); 965 EVALUATE(NRK); 966 EVALUATE(ORK); 967 EVALUATE(XRK); 968 EVALUATE(ARK); 969 EVALUATE(SRK); 970 EVALUATE(ALRK); 971 EVALUATE(SLRK); 972 EVALUATE(LTG); 973 EVALUATE(LG); 974 EVALUATE(CVBY); 975 EVALUATE(AG); 976 EVALUATE(SG); 977 EVALUATE(ALG); 978 EVALUATE(SLG); 979 EVALUATE(MSG); 980 EVALUATE(DSG); 981 EVALUATE(CVBG); 982 EVALUATE(LRVG); 983 EVALUATE(LT); 984 EVALUATE(LGF); 985 EVALUATE(LGH); 986 EVALUATE(LLGF); 987 EVALUATE(LLGT); 988 EVALUATE(AGF); 989 EVALUATE(SGF); 990 EVALUATE(ALGF); 991 EVALUATE(SLGF); 992 EVALUATE(MSGF); 993 EVALUATE(DSGF); 994 EVALUATE(LRV); 995 EVALUATE(LRVH); 996 EVALUATE(CG); 997 EVALUATE(CLG); 998 EVALUATE(STG); 999 EVALUATE(NTSTG); 1000 EVALUATE(CVDY); 1001 EVALUATE(CVDG); 1002 EVALUATE(STRVG); 1003 EVALUATE(CGF); 1004 EVALUATE(CLGF); 1005 EVALUATE(LTGF); 1006 EVALUATE(CGH); 1007 EVALUATE(PFD); 1008 EVALUATE(STRV); 1009 EVALUATE(STRVH); 1010 EVALUATE(BCTG); 1011 EVALUATE(STY); 1012 EVALUATE(MSY); 1013 EVALUATE(MSC); 1014 EVALUATE(NY); 1015 EVALUATE(CLY); 1016 EVALUATE(OY); 1017 EVALUATE(XY); 1018 EVALUATE(LY); 1019 EVALUATE(CY); 1020 EVALUATE(AY); 1021 EVALUATE(SY); 1022 EVALUATE(MFY); 1023 EVALUATE(ALY); 1024 EVALUATE(SLY); 1025 EVALUATE(STHY); 1026 EVALUATE(LAY); 1027 EVALUATE(STCY); 1028 EVALUATE(ICY); 1029 EVALUATE(LAEY); 1030 EVALUATE(LB); 1031 EVALUATE(LGB); 1032 EVALUATE(LHY); 1033 EVALUATE(CHY); 1034 EVALUATE(AHY); 1035 EVALUATE(SHY); 1036 EVALUATE(MHY); 1037 EVALUATE(NG); 1038 EVALUATE(OG); 1039 EVALUATE(XG); 1040 EVALUATE(LGAT); 1041 EVALUATE(MLG); 1042 EVALUATE(DLG); 1043 EVALUATE(ALCG); 1044 EVALUATE(SLBG); 1045 EVALUATE(STPQ); 1046 EVALUATE(LPQ); 1047 EVALUATE(LLGC); 1048 EVALUATE(LLGH); 1049 EVALUATE(LLC); 1050 EVALUATE(LLH); 1051 EVALUATE(ML); 1052 EVALUATE(DL); 1053 EVALUATE(ALC); 1054 EVALUATE(SLB); 1055 EVALUATE(LLGTAT); 1056 EVALUATE(LLGFAT); 1057 EVALUATE(LAT); 1058 EVALUATE(LBH); 1059 EVALUATE(LLCH); 1060 EVALUATE(STCH); 1061 EVALUATE(LHH); 1062 EVALUATE(LLHH); 1063 EVALUATE(STHH); 1064 EVALUATE(LFHAT); 1065 EVALUATE(LFH); 1066 EVALUATE(STFH); 1067 EVALUATE(CHF); 1068 EVALUATE(MVCDK); 1069 EVALUATE(MVHHI); 1070 EVALUATE(MVGHI); 1071 EVALUATE(MVHI); 1072 EVALUATE(CHHSI); 1073 EVALUATE(CGHSI); 1074 EVALUATE(CHSI); 1075 EVALUATE(CLFHSI); 1076 EVALUATE(TBEGIN); 1077 EVALUATE(TBEGINC); 1078 EVALUATE(LMG); 1079 EVALUATE(SRAG); 1080 EVALUATE(SLAG); 1081 EVALUATE(SRLG); 1082 EVALUATE(SLLG); 1083 EVALUATE(CSY); 1084 EVALUATE(CSG); 1085 EVALUATE(RLLG); 1086 EVALUATE(RLL); 1087 EVALUATE(STMG); 1088 EVALUATE(STMH); 1089 EVALUATE(STCMH); 1090 EVALUATE(STCMY); 1091 EVALUATE(CDSY); 1092 EVALUATE(CDSG); 1093 EVALUATE(BXHG); 1094 EVALUATE(BXLEG); 1095 EVALUATE(ECAG); 1096 EVALUATE(TMY); 1097 EVALUATE(MVIY); 1098 EVALUATE(NIY); 1099 EVALUATE(CLIY); 1100 EVALUATE(OIY); 1101 EVALUATE(XIY); 1102 EVALUATE(ASI); 1103 EVALUATE(ALSI); 1104 EVALUATE(AGSI); 1105 EVALUATE(ALGSI); 1106 EVALUATE(ICMH); 1107 EVALUATE(ICMY); 1108 EVALUATE(MVCLU); 1109 EVALUATE(CLCLU); 1110 EVALUATE(STMY); 1111 EVALUATE(LMH); 1112 EVALUATE(LMY); 1113 EVALUATE(TP); 1114 EVALUATE(SRAK); 1115 EVALUATE(SLAK); 1116 EVALUATE(SRLK); 1117 EVALUATE(SLLK); 1118 EVALUATE(LOCG); 1119 EVALUATE(STOCG); 1120 EVALUATE(LANG); 1121 EVALUATE(LAOG); 1122 EVALUATE(LAXG); 1123 EVALUATE(LAAG); 1124 EVALUATE(LAALG); 1125 EVALUATE(LOC); 1126 EVALUATE(STOC); 1127 EVALUATE(LAN); 1128 EVALUATE(LAO); 1129 EVALUATE(LAX); 1130 EVALUATE(LAA); 1131 EVALUATE(LAAL); 1132 EVALUATE(BRXHG); 1133 EVALUATE(BRXLG); 1134 EVALUATE(RISBLG); 1135 EVALUATE(RNSBG); 1136 EVALUATE(RISBG); 1137 EVALUATE(ROSBG); 1138 EVALUATE(RXSBG); 1139 EVALUATE(RISBGN); 1140 EVALUATE(RISBHG); 1141 EVALUATE(CGRJ); 1142 EVALUATE(CGIT); 1143 EVALUATE(CIT); 1144 EVALUATE(CLFIT); 1145 EVALUATE(CGIJ); 1146 EVALUATE(CIJ); 1147 EVALUATE(AHIK); 1148 EVALUATE(AGHIK); 1149 EVALUATE(ALHSIK); 1150 EVALUATE(ALGHSIK); 1151 EVALUATE(CGRB); 1152 EVALUATE(CGIB); 1153 EVALUATE(CIB); 1154 EVALUATE(LDEB); 1155 EVALUATE(LXDB); 1156 EVALUATE(LXEB); 1157 EVALUATE(MXDB); 1158 EVALUATE(KEB); 1159 EVALUATE(CEB); 1160 EVALUATE(AEB); 1161 EVALUATE(SEB); 1162 EVALUATE(MDEB); 1163 EVALUATE(DEB); 1164 EVALUATE(MAEB); 1165 EVALUATE(MSEB); 1166 EVALUATE(TCEB); 1167 EVALUATE(TCDB); 1168 EVALUATE(TCXB); 1169 EVALUATE(SQEB); 1170 EVALUATE(SQDB); 1171 EVALUATE(MEEB); 1172 EVALUATE(KDB); 1173 EVALUATE(CDB); 1174 EVALUATE(ADB); 1175 EVALUATE(SDB); 1176 EVALUATE(MDB); 1177 EVALUATE(DDB); 1178 EVALUATE(MADB); 1179 EVALUATE(MSDB); 1180 EVALUATE(SLDT); 1181 EVALUATE(SRDT); 1182 EVALUATE(SLXT); 1183 EVALUATE(SRXT); 1184 EVALUATE(TDCET); 1185 EVALUATE(TDGET); 1186 EVALUATE(TDCDT); 1187 EVALUATE(TDGDT); 1188 EVALUATE(TDCXT); 1189 EVALUATE(TDGXT); 1190 EVALUATE(LEY); 1191 EVALUATE(LDY); 1192 EVALUATE(STEY); 1193 EVALUATE(STDY); 1194 EVALUATE(CZDT); 1195 EVALUATE(CZXT); 1196 EVALUATE(CDZT); 1197 EVALUATE(CXZT); 1198 #undef EVALUATE 1199 }; 1200 1201 } // namespace internal 1202 } // namespace v8 1203 1204 #endif // defined(USE_SIMULATOR) 1205 #endif // V8_S390_SIMULATOR_S390_H_ 1206
