| /external/llvm/test/CodeGen/X86/ |
| shift-double.ll | 32 define i16 @test5(i16 %A, i16 %B, i8 %C) {
33 %shift.upgrd.6 = zext i8 %C to i16 ; <i16> [#uses=1]
34 %X = shl i16 %A, %shift.upgrd.6 ; <i16> [#uses=1]
36 %shift.upgrd.7 = zext i8 %Cv to i16 ; <i16> [#uses=1]
37 %Y = lshr i16 %B, %shift.upgrd.7 ; <i16> [#uses=1
[all...] |
| bswap-inline-asm.ll | 28 define zeroext i16 @s16(i16 zeroext %x) nounwind {
29 %asmtmp = tail call i16 asm "rorw $$8, ${0:w}", "=r,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i16 %x) nounwind
30 ret i16 %asmtmp
35 define zeroext i16 @t16(i16 zeroext %x) nounwind {
36 %asmtmp = tail call i16 asm "rorw $$8, ${0:w}", "=r,0,~{cc},~{dirflag},~{fpsr},~{flags}"(i16 %x) nounwind
37 ret i16 %asmtm
[all...] |
| lsr-quadratic-expand.ll | 9 %z1 = phi i16 [ undef, %entry ], [ %z6, %bb ]
12 %z4 = zext i16 %z1 to i32
14 %z6 = trunc i32 %z5 to i16
15 call fastcc void @dw210x_op_rw(i16 zeroext %z6)
22 declare fastcc void @dw210x_op_rw(i16 zeroext) nounwind
|
| bswap.ll | 5 declare i16 @llvm.bswap.i16(i16)
11 define i16 @W(i16 %A) {
14 %Z = call i16 @llvm.bswap.i16( i16 %A ) ; <i16> [#uses=1]
15 ret i16 %
[all...] |
| vshift-4.ll | 57 define void @shift3a(<8 x i16> %val, <8 x i16>* %dst, <8 x i16> %amt) nounwind {
62 %shamt = shufflevector <8 x i16> %amt, <8 x i16> undef, <8 x i32> <i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6>
63 %shl = shl <8 x i16> %val, %shamt
64 store <8 x i16> %shl, <8 x i16>* %dst
68 define void @shift3b(<8 x i16> %val, <8 x i16>* %dst, i16 %amt) nounwind
[all...] |
| xop-intrinsics-x86_64.ll | 108 define <8 x i16> @test_int_x86_xop_vpcomeqw(<8 x i16> %a0, <8 x i16> %a1) {
110 %res = call <8 x i16> @llvm.x86.xop.vpcomeqw(<8 x i16> %a0, <8 x i16> %a1) ;
111 ret <8 x i16> %res
113 declare <8 x i16> @llvm.x86.xop.vpcomeqw(<8 x i16>, <8 x i16>) nounwind readnon
[all...] |
| 2009-02-01-LargeMask.ll | 4 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
6 %struct.cl_engine = type { i32, i16, i32, i8**, i8**, i8*, i8*, i8*, i8*, i8*, i8*, i8* }
7 %struct.cl_limits = type { i32, i32, i32, i32, i16, i32 }
8 %struct.cli_ac_alt = type { i8, i8*, i16, i16, %struct.cli_ac_alt* }
10 %struct.cli_ac_patt = type { i16*, i16*, i16, i16, i8, i32, i32, i8*, i8*, i32, i16, i16, i16, i16, %struct.cli_ac_alt**, i8, i16, %struct.cli_ac_patt*, %struct.cli_ac_patt*
[all...] |
| avx2-palignr.ll | 31 define <16 x i16> @test5(<16 x i16> %A, <16 x i16> %B) nounwind {
34 %C = shufflevector <16 x i16> %A, <16 x i16> %B, <16 x i32> <i32 3, i32 4, i32 undef, i32 6, i32 7, i32 16, i32 17, i32 18, i32 11, i32 12, i32 13, i32 undef, i32 15, i32 24, i32 25, i32 26>
35 ret <16 x i16> %C
38 define <16 x i16> @test6(<16 x i16> %A, <16 x i16> %B) nounwind {
41 %C = shufflevector <16 x i16> %A, <16 x i16> %B, <16 x i32> <i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, (…)
[all...] |
| mmx-shuffle.ll | 4 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
15 %struct.QT_FT_Span = type { i16, i16, i16, i8 }
21 %tmp529 = and <2 x i32> %tmp528, bitcast (<4 x i16> < i16 -32640, i16 16448, i16 8224, i16 4112 > to <2 x i32>) ; <<2 x i32>> [#uses=1]
22 %tmp542 = bitcast <2 x i32> %tmp529 to <4 x i16> ; <<4 x i16>> [#uses=1
[all...] |
| palignr.ll | 41 define <8 x i16> @test6(<8 x i16> %A, <8 x i16> %B) nounwind {
44 %C = shufflevector <8 x i16> %A, <8 x i16> %B, <8 x i32> < i32 3, i32 4, i32 undef, i32 6, i32 7, i32 8, i32 9, i32 10 >
45 ret <8 x i16> %C
48 define <8 x i16> @test7(<8 x i16> %A, <8 x i16> %B) nounwind {
51 %C = shufflevector <8 x i16> %A, <8 x i16> %B, <8 x i32> < i32 undef, i32 6, i32 undef, i32 8, i32 9, i32 10, i32 11, i32 12
[all...] |
| 2009-02-08-CoalescerBug.ll | 8 %iftmp.1.0 = zext i1 %or.cond to i16 ; <i16> [#uses=1]
14 %3 = trunc i32 %2 to i16 ; <i16> [#uses=1]
18 %4 = phi i16 [ %3, %bb.i ], [ %iftmp.1.0, %entry ] ; <i16> [#uses=1]
19 %5 = trunc i16 %4 to i8 ; <i8> [#uses=1]
|
| ins_subreg_coalesce-1.ll | 21 %tmp83 = load i16* null, align 4 ; <i16> [#uses=1]
22 %tmp84 = or i16 %tmp83, 2 ; <i16> [#uses=2]
23 store i16 %tmp84, i16* null, align 4
24 %tmp98993 = zext i16 %tmp84 to i32 ; <i32> [#uses=1]
|
| shift-and.ll | 16 @X = internal global i16 0
18 define void @t3(i16 %t) nounwind {
19 %shamt = and i16 %t, 31
20 %tmp = load i16* @X
21 %tmp1 = ashr i16 %tmp, %shamt
22 store i16 %tmp1, i16* @X
|
| /external/llvm/test/CodeGen/MSP430/ |
| 2009-11-05-8BitLibcalls.ll | 3 target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"
16 define void @uint81(i16* nocapture %p_32) nounwind {
18 %call = tail call i16 @bar(i8* bitcast (i8 (i8, i8)* @foo to i8*)) nounwind ; <i16> [#uses=0]
22 declare i16 @bar(i8*)
|
| /external/llvm/test/CodeGen/PowerPC/ |
| 2007-05-30-dagcombine-miscomp.ll | 1 target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
7 define zeroext i8 @foo(i16 zeroext %a) {
8 %tmp2 = lshr i16 %a, 10 ; <i16> [#uses=1]
9 %tmp23 = trunc i16 %tmp2 to i8 ; <i8> [#uses=1]
|
| 2008-07-15-Bswap.ll | 2 target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128"
15 %struct.FlatnessAnalysis = type { i16, i16, i32, i32*, i8*, [512 x i32], [256 x i32] }
16 %struct.Frame = type <{ i8, i8, i8, i8, i8, [3 x i8], i32, i32, %struct.Mutex*, %struct.Condv*, [8 x i8], %struct.FramePixels, %struct.FrameMotionVectorCache, %struct.FrameIndex, i32, i8*, i8*, i8*, i8*, i16*, %struct.FlatnessAnalysis, %struct.NoiseAnalysis, %struct.VisualActivity, %struct.FrameMotionInfo, %struct.FrameMotionAnalysis, %struct.FrameDataRateParameters, %struct.FrameEncoderTags, %struct.DecodeComplexityInfo, %struct.DecodeComplexityOptions, %struct.MotionInfoFor16x16_FasterSP*, [1 x i32] }>
20 %struct.FrameMotionAnalysis = type { i32, i32, i32, %struct.MoEstMotion16x16*, %struct.MbAnalysis*, i32, i32, i16, i16, i32, i32, i32, i32, i8, i8 }
23 %struct.FramePixels = type <{ i8, i8, i8, i8, i8, i8, i8, i8, i8*, i8*, i32, [4 x i8*], [4 x i8*], [2 x [4 x i32]], [2 x [4 x i32]], %struct.PixelData, %struct.InterpolationCache*, %struct.InterpolationCache*, %struct.InterpolationCache*, [16 x i16], [16 x i16], [12 x i8], %"struct.PortableSInt32Array<4>", %"struct.PortableSInt32Array<8>", %struct.ICOffsetArraysY, %struct.UVSrcOffsetEtcX_Struct*, i32*, i32*, [3 x i32] }>
26 %struct.LoopFilterInfo = type { %struct.BiPartSrcDescriptor**, i32, i32, i32, i32, i32*, i32, %"struct.LoopFilterInfo::SliceInfoStruct"*, i32, %struct.Mutex*, i16*, %struct.FramePixels*, i8*, i8*, i8*, i8*, i8*, %struct.PerMacroblockBoundaryStrengths*, %struct.Mutex*, i8*, i8*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8, i8, i8, i8*, i8*, i8, void (i8*, i8*, i32, i32, i32, i32, i32, i8*, i32)*, void (i8*, i8*, i32, i32, i32, i32, i32, i8*, i32, i8*)*, i32 }
30 %struct.Map4x4ToPartIdx = type { i16 }
[all...] |
| /external/llvm/test/CodeGen/Generic/ |
| pr3288.ll | 9 %i = insertvalue {{i32,float},{i16,double}} undef, {i16,double} undef, 1
17 %i = insertvalue {{i32,float},{i16,double}} zeroinitializer, {i16,double} zeroinitializer, 1
25 %i = insertvalue {{i32,float},{i16,double}} undef, {i32,float} undef, 0
33 %i = insertvalue {{i32,float},{i16,double}} zeroinitializer, {i32,float} zeroinitializer, 0
41 %i = insertvalue {{i32,float},{i16,double}} undef, double undef, 1, 1
49 %i = insertvalue {{i32,float},{i16,double}} zeroinitializer, double zeroinitializer, 1, 1
57 %i = insertvalue {{i32,float},{i16,double}} undef, float undef, 0, 1
65 %i = insertvalue {{i32,float},{i16,double}} zeroinitializer, float zeroinitializer, 0,
[all...] |
| /external/llvm/test/CodeGen/ARM/ |
| vext.ll | 39 define <4 x i16> @test_vextd16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
42 %tmp1 = load <4 x i16>* %A
43 %tmp2 = load <4 x i16>* %B
44 %tmp3 = shufflevector <4 x i16> %tmp1, <4 x i16> %tmp2, <4 x i32> <i32 3, i32 4, i32 5, i32 6>
45 ret <4 x i16> %tmp3
83 define <4 x i16> @test_interleaved(<8 x i16>* %A, <8 x i16>* %B) nounwind
[all...] |
| vget_lane.ll | 2 target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32"
14 define i32 @vget_lanes16(<4 x i16>* %A) nounwind {
17 %tmp1 = load <4 x i16>* %A
18 %tmp2 = extractelement <4 x i16> %tmp1, i32 1
19 %tmp3 = sext i16 %tmp2 to i32
32 define i32 @vget_laneu16(<4 x i16>* %A) nounwind {
35 %tmp1 = load <4 x i16>* %A
36 %tmp2 = extractelement <4 x i16> %tmp1, i32 1
37 %tmp3 = zext i16 %tmp2 to i32
60 define i32 @vgetQ_lanes16(<8 x i16>* %A) nounwind
[all...] |
| dagcombine-anyexttozeroext.ll | 4 define float @f(<4 x i16>* nocapture %in) {
8 %1 = load <4 x i16>* %in
10 %2 = uitofp <4 x i16> %1 to <4 x float>
22 define float @g(<4 x i16>* nocapture %in) {
24 %1 = load <4 x i16>* %in
26 %2 = extractelement <4 x i16> %1, i32 0
28 %3 = uitofp i16 %2 to float
|
| /external/llvm/test/Transforms/InstCombine/ |
| 2006-12-23-Select-Cmp-Cmp.ll | 9 %struct.mng_data = type { i32, i8*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8, i32, i32, i32, i8, i32, i32, i32, i32, i16, i16, i16, i8, i8, double, double, double, i8, i8, i8, i8, i32, i32, i32, i32, i32, i8, i32, i32, i8*, i8* (i32)*, void (i8*, i32)*, void (i8*, i8*, i32)*, i8 (%struct.mng_data*)*, i8 (%struct.mng_data*)*, i8 (%struct.mng_data*, i8*, i32, i32*)*, i8 (%struct.mng_data*, i8*, i32, i32*)*, i8 (%struct.mng_data*, i32, i8, i32, i32, i32, i32, i8*)*, i8 (%struct.mng_data*, i32, i32, i8*)*, i8 (%struct.mng_data*, i32, i32)*, i8 (%struct.mng_data*, i8, i8*, i8*, i8*, i8*)*, i8 (%struct.mng_data*)*, i8 (%struct.mng_data*, i8*)*, i8 (%struct.mng_data*, i8*)*, i8 (%struct.mng_data*, i32, i32)*, i8 (%struct.mng_data*, i32, i32, i8*)*, i8 (%struct.mng_data*, i8, i8, i32, i32)*, i8* (%struct.mng_data*, i32)*, i8* (%struct.mng_data*, i32)*, i8* (%struct.mng_data*, i32)*, i8 (%struct.mng_data*, i32, i32, i32, i32)*, i32 (%struct.mng_data*)*, i8 (%struct.mng_data*, i32)*, i8 (%struct.mng_data*, i32)*, i8 (%struct.mng_data*, i32, i32, i32, i32, i32, i32, i32, i32)*, i8 (%struct.mng_data*, i8)*, i8 (%struct.mng_data*, i32, i8*)*, i8 (%struct.mng_data*, i32, i8, i8*)*, i8, i32, i32, i8*, i8*, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i32, i32, i8, i8, i8, i8, i8, i32, i8, i8, i8, i32, i8*, i32, i8*, i32, i8, i8, i8, i32, i8*, i8*, i32, i32, i8*, i8*, %struct.mng_pushdata*, %struct.mng_pushdata*, %struct.mng_pushdata*, %struct.mng_pushdata*, i8, i8, i32, i32, i8*, i8, i8, i32, i32, i32, i32, i32, i32, i8, i8, i8, i8, i32, i32, i8*, i32, i32, i32, i8, i8, i32, i32, i32, i32, i8, i8, i8, i8, i8, i8, i8, i8, i8, i32, i8*, i8*, i8*, i32, i8*, i8*, i8*, i8*, i8*, %struct.mng_savedata*, i32, i32, i32, i32, i8, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8*, i8*, i8*, i8, i8, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8*, i8*, i8*, i8*, i8*, i8*, [256 x i8], double, void ()*, void ()*, void ()*, void ()*, void ()*, void ()*, void ()*, void ()*, void ()*, void ()*, void ()*, void ()*, i16, i8, i8, i8, i8, i8, i32, i32, i8, i32, i32, i32, i32, i16, i16, i16, i8, i16, i8, i32, i32, i32, i32, i8, i32, i32, i8, i32, i32, i32, i32, i8, i32, i32, i8, i32, i32, i32, i32, i32, i8, i32, i8, i16, i16, i16, i16, i32, [256 x %struct.mng_palette8e], i32, [256 x i8], i32, i32, i32, i32, i32, i32, i32, (…)
[all...] |
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src_gcc/ |
| armVCM4P10_InterpolateLuma_HalfDiagHorVer4x4_unsafe_s.S | 18 VMOV.I16 d31,#0x14
19 VMOV.I16 d30,#0x5
29 VMLA.I16 d10,d2,d31
30 VMUL.I16 d8,d4,d30
40 VSUB.I16 d10,d10,d8
41 VMLA.I16 d12,d2,d31
42 VMUL.I16 d8,d4,d30
52 VSUB.I16 d12,d12,d8
53 VMLA.I16 d14,d2,d31
54 VMUL.I16 d8,d4,d3
[all...] |
| /frameworks/compile/libbcc/lib/ScriptCRT/ |
| convert.ll | 1 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:64:128-a0:0:64-n32-S64"
34 define <2 x float> @_Z14convert_float2Dv2_t(<2 x i16> %in) nounwind readnone alwaysinline {
35 %1 = uitofp <2 x i16> %in to <2 x float>
39 define <3 x float> @_Z14convert_float3Dv3_t(<3 x i16> %in) nounwind readnone alwaysinline {
40 %1 = uitofp <3 x i16> %in to <3 x float>
44 define <4 x float> @_Z14convert_float4Dv4_t(<4 x i16> %in) nounwind readnone alwaysinline {
45 %1 = uitofp <4 x i16> %in to <4 x float>
49 define <2 x float> @_Z14convert_float2Dv2_s(<2 x i16> %in) nounwind readnone alwaysinline {
50 %1 = sitofp <2 x i16> %in to <2 x float>
54 define <3 x float> @_Z14convert_float3Dv3_s(<3 x i16> %in) nounwind readnone alwaysinline
[all...] |
| /external/llvm/test/Feature/ |
| intrinsics.ll | 12 declare i16 @llvm.ctpop.i16(i16)
20 declare i16 @llvm.cttz.i16(i16, i1)
28 declare i16 @llvm.ctlz.i16(i16, i1)
46 call i16 @llvm.ctpop.i16( i16 11 ) ; <i32>:6 [#uses=0
[all...] |
| /external/llvm/test/CodeGen/Thumb2/ |
| thumb2-jtb.ll | 6 define i16 @main__getopt_internal_2E_exit_2E_ce(i32, i1 %b) nounwind {
19 ret i16 0
22 ret i16 1
25 ret i16 2
28 ret i16 3
31 ret i16 4
34 ret i16 5
37 ret i16 6
40 ret i16 7
43 ret i16
[all...] |
