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    Searched refs:getSUnit (Results 1 - 15 of 15) sorted by null

  /external/llvm/lib/CodeGen/
ScheduleDAG.cpp 74 SUnit *N = D.getSUnit();
111 SUnit *N = D.getSUnit();
154 SUnit *SuccSU = I->getSUnit();
170 SUnit *PredSU = I->getSUnit();
211 SUnit *PredSU = I->getSUnit();
244 SUnit *SuccSU = I->getSUnit();
293 dbgs() << "SU(" << I->getSUnit()->NodeNum << ")";
313 dbgs() << "SU(" << I->getSUnit()->NodeNum << ")";
435 SUnit *SU = I->getSUnit();
451 assert(Node2Index[SU->NodeNum] > Node2Index[I->getSUnit()->NodeNum] &
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LatencyPriorityQueue.cpp 59 SUnit &Pred = *I->getSUnit();
78 if (getSingleUnscheduledPred(I->getSUnit()) == SU)
94 AdjustPriorityOfUnscheduledPreds(I->getSUnit());
DFAPacketizer.cpp 208 SUnit *SUI = SchedulerImpl->getSUnit(MI);
218 SUnit *SUJ = SchedulerImpl->getSUnit(MJ);
MachineScheduler.cpp 323 SUnit *SuccSU = SuccEdge->getSUnit();
349 SUnit *PredSU = PredEdge->getSUnit();
491 SU = DAG->getSUnit(DAG->top());
495 SU = DAG->getSUnit(llvm::prior(DAG->bottom()));
AggressiveAntiDepBreaker.cpp 301 const SUnit *PredSU = P->getSUnit();
314 return (Next) ? Next->getSUnit() : 0;
817 SUnit *NextSU = Edge->getSUnit();
862 if (P->getSUnit() == NextSU ?
871 if ((P->getSUnit() == NextSU) && (P->getKind() != SDep::Anti) &&
876 } else if ((P->getSUnit() != NextSU) &&
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CriticalAntiDepBreaker.cpp 166 const SUnit *PredSU = P->getSUnit();
547 const SUnit *NextSU = Edge->getSUnit();
571 if (P->getSUnit() == NextSU ?
PostRASchedulerList.cpp 587 SUnit *SuccSU = SuccEdge->getSUnit();
ScheduleDAGInstrs.cpp 446 SUnit *DefSU = getSUnit(Def);
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  /external/llvm/lib/CodeGen/SelectionDAG/
ScheduleDAGFast.cpp 135 SUnit *PredSU = PredEdge->getSUnit();
167 LiveRegDefs[I->getReg()] = I->getSUnit();
191 if (LiveRegCycles[I->getReg()] == I->getSUnit()->getHeight()) {
284 else if (I->getSUnit()->getNode() &&
285 I->getSUnit()->getNode()->isOperandOf(LoadNode))
298 if (ChainPred.getSUnit()) {
317 SUnit *SuccDep = D.getSUnit();
325 SUnit *SuccDep = D.getSUnit();
362 SUnit *SuccSU = I->getSUnit();
399 SUnit *SuccSU = I->getSUnit();
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ScheduleDAGRRList.cpp 192 Topo.AddPred(SU, D.getSUnit());
200 Topo.RemovePred(SU, D.getSUnit());
345 SUnit *PredSU = PredEdge->getSUnit();
515 assert((!RegDef || RegDef == SU || RegDef == I->getSUnit()) &&
517 LiveRegDefs[I->getReg()] = I->getSUnit();
767 SUnit *PredSU = PredEdge->getSUnit();
789 assert(LiveRegDefs[I->getReg()] == I->getSUnit() &&
833 I->getSUnit()->getHeight() < LiveRegGens[I->getReg()]->getHeight())
834 LiveRegGens[I->getReg()] = I->getSUnit();
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ResourcePriorityQueue.cpp 78 SUnit *PredSU = I->getSUnit();
116 SUnit *SuccSU = I->getSUnit();
220 SUnit &Pred = *I->getSUnit();
238 if (getSingleUnscheduledPred(I->getSUnit()) == SU)
282 if (I->getSUnit() == SU)
513 if (I->isCtrl() || (I->getSUnit()->NumRegDefsLeft == 0))
515 --I->getSUnit()->NumRegDefsLeft;
529 adjustPriorityOfUnscheduledPreds(I->getSUnit());
ScheduleDAGVLIW.cpp 116 SUnit *SuccSU = D.getSUnit();
ScheduleDAGSDNodes.cpp 727 if (I->getSUnit()->CopyDstRC) {
729 DenseMap<SUnit*, unsigned>::iterator VRI = VRBaseMap.find(I->getSUnit());
  /external/llvm/include/llvm/CodeGen/
ScheduleDAG.h 153 //// getSUnit - Return the SUnit to which this edge points.
154 SUnit *getSUnit() const {
400 if (Preds[i].getSUnit() == N)
408 if (Succs[i].getSUnit() == N)
590 return Node->Preds[Operand].getSUnit();
ScheduleDAGInstrs.h 258 /// getSUnit - Return an existing SUnit for this MI, or NULL.
259 SUnit *getSUnit(MachineInstr *MI) const;
342 /// getSUnit - Return an existing SUnit for this MI, or NULL.
343 inline SUnit *ScheduleDAGInstrs::getSUnit(MachineInstr *MI) const {

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