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      1 //===-- RegisterScavenging.h - Machine register scavenging ------*- C++ -*-===//
      2 //
      3 //                     The LLVM Compiler Infrastructure
      4 //
      5 // This file is distributed under the University of Illinois Open Source
      6 // License. See LICENSE.TXT for details.
      7 //
      8 //===----------------------------------------------------------------------===//
      9 //
     10 // This file declares the machine register scavenger class. It can provide
     11 // information such as unused register at any point in a machine basic block.
     12 // It also provides a mechanism to make registers availbale by evicting them
     13 // to spill slots.
     14 //
     15 //===----------------------------------------------------------------------===//
     16 
     17 #ifndef LLVM_CODEGEN_REGISTER_SCAVENGING_H
     18 #define LLVM_CODEGEN_REGISTER_SCAVENGING_H
     19 
     20 #include "llvm/CodeGen/MachineBasicBlock.h"
     21 #include "llvm/ADT/BitVector.h"
     22 
     23 namespace llvm {
     24 
     25 class MachineRegisterInfo;
     26 class TargetRegisterInfo;
     27 class TargetInstrInfo;
     28 class TargetRegisterClass;
     29 
     30 class RegScavenger {
     31   const TargetRegisterInfo *TRI;
     32   const TargetInstrInfo *TII;
     33   MachineRegisterInfo* MRI;
     34   MachineBasicBlock *MBB;
     35   MachineBasicBlock::iterator MBBI;
     36   unsigned NumPhysRegs;
     37 
     38   /// Tracking - True if RegScavenger is currently tracking the liveness of
     39   /// registers.
     40   bool Tracking;
     41 
     42   /// ScavengingFrameIndex - Special spill slot used for scavenging a register
     43   /// post register allocation.
     44   int ScavengingFrameIndex;
     45 
     46   /// ScavengedReg - If none zero, the specific register is currently being
     47   /// scavenged. That is, it is spilled to the special scavenging stack slot.
     48   unsigned ScavengedReg;
     49 
     50   /// ScavengedRC - Register class of the scavenged register.
     51   ///
     52   const TargetRegisterClass *ScavengedRC;
     53 
     54   /// ScavengeRestore - Instruction that restores the scavenged register from
     55   /// stack.
     56   const MachineInstr *ScavengeRestore;
     57 
     58   /// CalleeSavedrRegs - A bitvector of callee saved registers for the target.
     59   ///
     60   BitVector CalleeSavedRegs;
     61 
     62   /// ReservedRegs - A bitvector of reserved registers.
     63   ///
     64   BitVector ReservedRegs;
     65 
     66   /// RegsAvailable - The current state of all the physical registers immediately
     67   /// before MBBI. One bit per physical register. If bit is set that means it's
     68   /// available, unset means the register is currently being used.
     69   BitVector RegsAvailable;
     70 
     71   // These BitVectors are only used internally to forward(). They are members
     72   // to avoid frequent reallocations.
     73   BitVector KillRegs, DefRegs;
     74 
     75 public:
     76   RegScavenger()
     77     : MBB(NULL), NumPhysRegs(0), Tracking(false),
     78       ScavengingFrameIndex(-1), ScavengedReg(0), ScavengedRC(NULL) {}
     79 
     80   /// enterBasicBlock - Start tracking liveness from the begin of the specific
     81   /// basic block.
     82   void enterBasicBlock(MachineBasicBlock *mbb);
     83 
     84   /// initRegState - allow resetting register state info for multiple
     85   /// passes over/within the same function.
     86   void initRegState();
     87 
     88   /// forward - Move the internal MBB iterator and update register states.
     89   void forward();
     90 
     91   /// forward - Move the internal MBB iterator and update register states until
     92   /// it has processed the specific iterator.
     93   void forward(MachineBasicBlock::iterator I) {
     94     if (!Tracking && MBB->begin() != I) forward();
     95     while (MBBI != I) forward();
     96   }
     97 
     98   /// skipTo - Move the internal MBB iterator but do not update register states.
     99   ///
    100   void skipTo(MachineBasicBlock::iterator I) { MBBI = I; }
    101 
    102   /// getRegsUsed - return all registers currently in use in used.
    103   void getRegsUsed(BitVector &used, bool includeReserved);
    104 
    105   /// getRegsAvailable - Return all available registers in the register class
    106   /// in Mask.
    107   BitVector getRegsAvailable(const TargetRegisterClass *RC);
    108 
    109   /// FindUnusedReg - Find a unused register of the specified register class.
    110   /// Return 0 if none is found.
    111   unsigned FindUnusedReg(const TargetRegisterClass *RegClass) const;
    112 
    113   /// setScavengingFrameIndex / getScavengingFrameIndex - accessor and setter of
    114   /// ScavengingFrameIndex.
    115   void setScavengingFrameIndex(int FI) { ScavengingFrameIndex = FI; }
    116   int getScavengingFrameIndex() const { return ScavengingFrameIndex; }
    117 
    118   /// scavengeRegister - Make a register of the specific register class
    119   /// available and do the appropriate bookkeeping. SPAdj is the stack
    120   /// adjustment due to call frame, it's passed along to eliminateFrameIndex().
    121   /// Returns the scavenged register.
    122   unsigned scavengeRegister(const TargetRegisterClass *RegClass,
    123                             MachineBasicBlock::iterator I, int SPAdj);
    124   unsigned scavengeRegister(const TargetRegisterClass *RegClass, int SPAdj) {
    125     return scavengeRegister(RegClass, MBBI, SPAdj);
    126   }
    127 
    128   /// setUsed - Tell the scavenger a register is used.
    129   ///
    130   void setUsed(unsigned Reg);
    131 private:
    132   /// isReserved - Returns true if a register is reserved. It is never "unused".
    133   bool isReserved(unsigned Reg) const { return ReservedRegs.test(Reg); }
    134 
    135   /// isUsed / isUnused - Test if a register is currently being used.
    136   ///
    137   bool isUsed(unsigned Reg) const   {
    138     return !RegsAvailable.test(Reg) || ReservedRegs.test(Reg);
    139   }
    140 
    141   /// isAliasUsed - Is Reg or an alias currently in use?
    142   bool isAliasUsed(unsigned Reg) const;
    143 
    144   /// setUsed / setUnused - Mark the state of one or a number of registers.
    145   ///
    146   void setUsed(BitVector &Regs) {
    147     RegsAvailable.reset(Regs);
    148   }
    149   void setUnused(BitVector &Regs) {
    150     RegsAvailable |= Regs;
    151   }
    152 
    153   /// Add Reg and all its sub-registers to BV.
    154   void addRegWithSubRegs(BitVector &BV, unsigned Reg);
    155 
    156   /// findSurvivorReg - Return the candidate register that is unused for the
    157   /// longest after StartMI. UseMI is set to the instruction where the search
    158   /// stopped.
    159   ///
    160   /// No more than InstrLimit instructions are inspected.
    161   unsigned findSurvivorReg(MachineBasicBlock::iterator StartMI,
    162                            BitVector &Candidates,
    163                            unsigned InstrLimit,
    164                            MachineBasicBlock::iterator &UseMI);
    165 
    166 };
    167 
    168 } // End llvm namespace
    169 
    170 #endif
    171