1 //===------ RegAllocPBQP.cpp ---- PBQP Register Allocator -------*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file contains a Partitioned Boolean Quadratic Programming (PBQP) based 11 // register allocator for LLVM. This allocator works by constructing a PBQP 12 // problem representing the register allocation problem under consideration, 13 // solving this using a PBQP solver, and mapping the solution back to a 14 // register assignment. If any variables are selected for spilling then spill 15 // code is inserted and the process repeated. 16 // 17 // The PBQP solver (pbqp.c) provided for this allocator uses a heuristic tuned 18 // for register allocation. For more information on PBQP for register 19 // allocation, see the following papers: 20 // 21 // (1) Hames, L. and Scholz, B. 2006. Nearly optimal register allocation with 22 // PBQP. In Proceedings of the 7th Joint Modular Languages Conference 23 // (JMLC'06). LNCS, vol. 4228. Springer, New York, NY, USA. 346-361. 24 // 25 // (2) Scholz, B., Eckstein, E. 2002. Register allocation for irregular 26 // architectures. In Proceedings of the Joint Conference on Languages, 27 // Compilers and Tools for Embedded Systems (LCTES'02), ACM Press, New York, 28 // NY, USA, 139-148. 29 // 30 //===----------------------------------------------------------------------===// 31 32 #define DEBUG_TYPE "regalloc" 33 34 #include "Spiller.h" 35 #include "VirtRegMap.h" 36 #include "RegisterCoalescer.h" 37 #include "llvm/Module.h" 38 #include "llvm/Analysis/AliasAnalysis.h" 39 #include "llvm/CodeGen/CalcSpillWeights.h" 40 #include "llvm/CodeGen/LiveIntervalAnalysis.h" 41 #include "llvm/CodeGen/LiveRangeEdit.h" 42 #include "llvm/CodeGen/LiveStackAnalysis.h" 43 #include "llvm/CodeGen/RegAllocPBQP.h" 44 #include "llvm/CodeGen/MachineDominators.h" 45 #include "llvm/CodeGen/MachineFunctionPass.h" 46 #include "llvm/CodeGen/MachineLoopInfo.h" 47 #include "llvm/CodeGen/MachineRegisterInfo.h" 48 #include "llvm/CodeGen/PBQP/HeuristicSolver.h" 49 #include "llvm/CodeGen/PBQP/Graph.h" 50 #include "llvm/CodeGen/PBQP/Heuristics/Briggs.h" 51 #include "llvm/CodeGen/RegAllocRegistry.h" 52 #include "llvm/Support/Debug.h" 53 #include "llvm/Support/raw_ostream.h" 54 #include "llvm/Target/TargetInstrInfo.h" 55 #include "llvm/Target/TargetMachine.h" 56 #include <limits> 57 #include <memory> 58 #include <set> 59 #include <sstream> 60 #include <vector> 61 62 using namespace llvm; 63 64 static RegisterRegAlloc 65 registerPBQPRepAlloc("pbqp", "PBQP register allocator", 66 createDefaultPBQPRegisterAllocator); 67 68 static cl::opt<bool> 69 pbqpCoalescing("pbqp-coalescing", 70 cl::desc("Attempt coalescing during PBQP register allocation."), 71 cl::init(false), cl::Hidden); 72 73 #ifndef NDEBUG 74 static cl::opt<bool> 75 pbqpDumpGraphs("pbqp-dump-graphs", 76 cl::desc("Dump graphs for each function/round in the compilation unit."), 77 cl::init(false), cl::Hidden); 78 #endif 79 80 namespace { 81 82 /// 83 /// PBQP based allocators solve the register allocation problem by mapping 84 /// register allocation problems to Partitioned Boolean Quadratic 85 /// Programming problems. 86 class RegAllocPBQP : public MachineFunctionPass { 87 public: 88 89 static char ID; 90 91 /// Construct a PBQP register allocator. 92 RegAllocPBQP(std::auto_ptr<PBQPBuilder> b, char *cPassID=0) 93 : MachineFunctionPass(ID), builder(b), customPassID(cPassID) { 94 initializeSlotIndexesPass(*PassRegistry::getPassRegistry()); 95 initializeLiveIntervalsPass(*PassRegistry::getPassRegistry()); 96 initializeCalculateSpillWeightsPass(*PassRegistry::getPassRegistry()); 97 initializeLiveStacksPass(*PassRegistry::getPassRegistry()); 98 initializeMachineLoopInfoPass(*PassRegistry::getPassRegistry()); 99 initializeVirtRegMapPass(*PassRegistry::getPassRegistry()); 100 } 101 102 /// Return the pass name. 103 virtual const char* getPassName() const { 104 return "PBQP Register Allocator"; 105 } 106 107 /// PBQP analysis usage. 108 virtual void getAnalysisUsage(AnalysisUsage &au) const; 109 110 /// Perform register allocation 111 virtual bool runOnMachineFunction(MachineFunction &MF); 112 113 private: 114 115 typedef std::map<const LiveInterval*, unsigned> LI2NodeMap; 116 typedef std::vector<const LiveInterval*> Node2LIMap; 117 typedef std::vector<unsigned> AllowedSet; 118 typedef std::vector<AllowedSet> AllowedSetMap; 119 typedef std::pair<unsigned, unsigned> RegPair; 120 typedef std::map<RegPair, PBQP::PBQPNum> CoalesceMap; 121 typedef std::vector<PBQP::Graph::NodeItr> NodeVector; 122 typedef std::set<unsigned> RegSet; 123 124 125 std::auto_ptr<PBQPBuilder> builder; 126 127 char *customPassID; 128 129 MachineFunction *mf; 130 const TargetMachine *tm; 131 const TargetRegisterInfo *tri; 132 const TargetInstrInfo *tii; 133 const MachineLoopInfo *loopInfo; 134 MachineRegisterInfo *mri; 135 136 std::auto_ptr<Spiller> spiller; 137 LiveIntervals *lis; 138 LiveStacks *lss; 139 VirtRegMap *vrm; 140 141 RegSet vregsToAlloc, emptyIntervalVRegs; 142 143 /// \brief Finds the initial set of vreg intervals to allocate. 144 void findVRegIntervalsToAlloc(); 145 146 /// \brief Given a solved PBQP problem maps this solution back to a register 147 /// assignment. 148 bool mapPBQPToRegAlloc(const PBQPRAProblem &problem, 149 const PBQP::Solution &solution); 150 151 /// \brief Postprocessing before final spilling. Sets basic block "live in" 152 /// variables. 153 void finalizeAlloc() const; 154 155 }; 156 157 char RegAllocPBQP::ID = 0; 158 159 } // End anonymous namespace. 160 161 unsigned PBQPRAProblem::getVRegForNode(PBQP::Graph::ConstNodeItr node) const { 162 Node2VReg::const_iterator vregItr = node2VReg.find(node); 163 assert(vregItr != node2VReg.end() && "No vreg for node."); 164 return vregItr->second; 165 } 166 167 PBQP::Graph::NodeItr PBQPRAProblem::getNodeForVReg(unsigned vreg) const { 168 VReg2Node::const_iterator nodeItr = vreg2Node.find(vreg); 169 assert(nodeItr != vreg2Node.end() && "No node for vreg."); 170 return nodeItr->second; 171 172 } 173 174 const PBQPRAProblem::AllowedSet& 175 PBQPRAProblem::getAllowedSet(unsigned vreg) const { 176 AllowedSetMap::const_iterator allowedSetItr = allowedSets.find(vreg); 177 assert(allowedSetItr != allowedSets.end() && "No pregs for vreg."); 178 const AllowedSet &allowedSet = allowedSetItr->second; 179 return allowedSet; 180 } 181 182 unsigned PBQPRAProblem::getPRegForOption(unsigned vreg, unsigned option) const { 183 assert(isPRegOption(vreg, option) && "Not a preg option."); 184 185 const AllowedSet& allowedSet = getAllowedSet(vreg); 186 assert(option <= allowedSet.size() && "Option outside allowed set."); 187 return allowedSet[option - 1]; 188 } 189 190 std::auto_ptr<PBQPRAProblem> PBQPBuilder::build(MachineFunction *mf, 191 const LiveIntervals *lis, 192 const MachineLoopInfo *loopInfo, 193 const RegSet &vregs) { 194 195 LiveIntervals *LIS = const_cast<LiveIntervals*>(lis); 196 MachineRegisterInfo *mri = &mf->getRegInfo(); 197 const TargetRegisterInfo *tri = mf->getTarget().getRegisterInfo(); 198 199 std::auto_ptr<PBQPRAProblem> p(new PBQPRAProblem()); 200 PBQP::Graph &g = p->getGraph(); 201 RegSet pregs; 202 203 // Collect the set of preg intervals, record that they're used in the MF. 204 for (unsigned Reg = 1, e = tri->getNumRegs(); Reg != e; ++Reg) { 205 if (mri->def_empty(Reg)) 206 continue; 207 pregs.insert(Reg); 208 mri->setPhysRegUsed(Reg); 209 } 210 211 BitVector reservedRegs = tri->getReservedRegs(*mf); 212 213 // Iterate over vregs. 214 for (RegSet::const_iterator vregItr = vregs.begin(), vregEnd = vregs.end(); 215 vregItr != vregEnd; ++vregItr) { 216 unsigned vreg = *vregItr; 217 const TargetRegisterClass *trc = mri->getRegClass(vreg); 218 LiveInterval *vregLI = &LIS->getInterval(vreg); 219 220 // Record any overlaps with regmask operands. 221 BitVector regMaskOverlaps(tri->getNumRegs()); 222 LIS->checkRegMaskInterference(*vregLI, regMaskOverlaps); 223 224 // Compute an initial allowed set for the current vreg. 225 typedef std::vector<unsigned> VRAllowed; 226 VRAllowed vrAllowed; 227 ArrayRef<uint16_t> rawOrder = trc->getRawAllocationOrder(*mf); 228 for (unsigned i = 0; i != rawOrder.size(); ++i) { 229 unsigned preg = rawOrder[i]; 230 if (reservedRegs.test(preg)) 231 continue; 232 233 // vregLI crosses a regmask operand that clobbers preg. 234 if (!regMaskOverlaps.empty() && !regMaskOverlaps.test(preg)) 235 continue; 236 237 // vregLI overlaps fixed regunit interference. 238 bool Interference = false; 239 for (MCRegUnitIterator Units(preg, tri); Units.isValid(); ++Units) { 240 if (vregLI->overlaps(LIS->getRegUnit(*Units))) { 241 Interference = true; 242 break; 243 } 244 } 245 if (Interference) 246 continue; 247 248 // preg is usable for this virtual register. 249 vrAllowed.push_back(preg); 250 } 251 252 // Construct the node. 253 PBQP::Graph::NodeItr node = 254 g.addNode(PBQP::Vector(vrAllowed.size() + 1, 0)); 255 256 // Record the mapping and allowed set in the problem. 257 p->recordVReg(vreg, node, vrAllowed.begin(), vrAllowed.end()); 258 259 PBQP::PBQPNum spillCost = (vregLI->weight != 0.0) ? 260 vregLI->weight : std::numeric_limits<PBQP::PBQPNum>::min(); 261 262 addSpillCosts(g.getNodeCosts(node), spillCost); 263 } 264 265 for (RegSet::const_iterator vr1Itr = vregs.begin(), vrEnd = vregs.end(); 266 vr1Itr != vrEnd; ++vr1Itr) { 267 unsigned vr1 = *vr1Itr; 268 const LiveInterval &l1 = lis->getInterval(vr1); 269 const PBQPRAProblem::AllowedSet &vr1Allowed = p->getAllowedSet(vr1); 270 271 for (RegSet::const_iterator vr2Itr = llvm::next(vr1Itr); 272 vr2Itr != vrEnd; ++vr2Itr) { 273 unsigned vr2 = *vr2Itr; 274 const LiveInterval &l2 = lis->getInterval(vr2); 275 const PBQPRAProblem::AllowedSet &vr2Allowed = p->getAllowedSet(vr2); 276 277 assert(!l2.empty() && "Empty interval in vreg set?"); 278 if (l1.overlaps(l2)) { 279 PBQP::Graph::EdgeItr edge = 280 g.addEdge(p->getNodeForVReg(vr1), p->getNodeForVReg(vr2), 281 PBQP::Matrix(vr1Allowed.size()+1, vr2Allowed.size()+1, 0)); 282 283 addInterferenceCosts(g.getEdgeCosts(edge), vr1Allowed, vr2Allowed, tri); 284 } 285 } 286 } 287 288 return p; 289 } 290 291 void PBQPBuilder::addSpillCosts(PBQP::Vector &costVec, 292 PBQP::PBQPNum spillCost) { 293 costVec[0] = spillCost; 294 } 295 296 void PBQPBuilder::addInterferenceCosts( 297 PBQP::Matrix &costMat, 298 const PBQPRAProblem::AllowedSet &vr1Allowed, 299 const PBQPRAProblem::AllowedSet &vr2Allowed, 300 const TargetRegisterInfo *tri) { 301 assert(costMat.getRows() == vr1Allowed.size() + 1 && "Matrix height mismatch."); 302 assert(costMat.getCols() == vr2Allowed.size() + 1 && "Matrix width mismatch."); 303 304 for (unsigned i = 0; i != vr1Allowed.size(); ++i) { 305 unsigned preg1 = vr1Allowed[i]; 306 307 for (unsigned j = 0; j != vr2Allowed.size(); ++j) { 308 unsigned preg2 = vr2Allowed[j]; 309 310 if (tri->regsOverlap(preg1, preg2)) { 311 costMat[i + 1][j + 1] = std::numeric_limits<PBQP::PBQPNum>::infinity(); 312 } 313 } 314 } 315 } 316 317 std::auto_ptr<PBQPRAProblem> PBQPBuilderWithCoalescing::build( 318 MachineFunction *mf, 319 const LiveIntervals *lis, 320 const MachineLoopInfo *loopInfo, 321 const RegSet &vregs) { 322 323 std::auto_ptr<PBQPRAProblem> p = PBQPBuilder::build(mf, lis, loopInfo, vregs); 324 PBQP::Graph &g = p->getGraph(); 325 326 const TargetMachine &tm = mf->getTarget(); 327 CoalescerPair cp(*tm.getRegisterInfo()); 328 329 // Scan the machine function and add a coalescing cost whenever CoalescerPair 330 // gives the Ok. 331 for (MachineFunction::const_iterator mbbItr = mf->begin(), 332 mbbEnd = mf->end(); 333 mbbItr != mbbEnd; ++mbbItr) { 334 const MachineBasicBlock *mbb = &*mbbItr; 335 336 for (MachineBasicBlock::const_iterator miItr = mbb->begin(), 337 miEnd = mbb->end(); 338 miItr != miEnd; ++miItr) { 339 const MachineInstr *mi = &*miItr; 340 341 if (!cp.setRegisters(mi)) { 342 continue; // Not coalescable. 343 } 344 345 if (cp.getSrcReg() == cp.getDstReg()) { 346 continue; // Already coalesced. 347 } 348 349 unsigned dst = cp.getDstReg(), 350 src = cp.getSrcReg(); 351 352 const float copyFactor = 0.5; // Cost of copy relative to load. Current 353 // value plucked randomly out of the air. 354 355 PBQP::PBQPNum cBenefit = 356 copyFactor * LiveIntervals::getSpillWeight(false, true, 357 loopInfo->getLoopDepth(mbb)); 358 359 if (cp.isPhys()) { 360 if (!lis->isAllocatable(dst)) { 361 continue; 362 } 363 364 const PBQPRAProblem::AllowedSet &allowed = p->getAllowedSet(src); 365 unsigned pregOpt = 0; 366 while (pregOpt < allowed.size() && allowed[pregOpt] != dst) { 367 ++pregOpt; 368 } 369 if (pregOpt < allowed.size()) { 370 ++pregOpt; // +1 to account for spill option. 371 PBQP::Graph::NodeItr node = p->getNodeForVReg(src); 372 addPhysRegCoalesce(g.getNodeCosts(node), pregOpt, cBenefit); 373 } 374 } else { 375 const PBQPRAProblem::AllowedSet *allowed1 = &p->getAllowedSet(dst); 376 const PBQPRAProblem::AllowedSet *allowed2 = &p->getAllowedSet(src); 377 PBQP::Graph::NodeItr node1 = p->getNodeForVReg(dst); 378 PBQP::Graph::NodeItr node2 = p->getNodeForVReg(src); 379 PBQP::Graph::EdgeItr edge = g.findEdge(node1, node2); 380 if (edge == g.edgesEnd()) { 381 edge = g.addEdge(node1, node2, PBQP::Matrix(allowed1->size() + 1, 382 allowed2->size() + 1, 383 0)); 384 } else { 385 if (g.getEdgeNode1(edge) == node2) { 386 std::swap(node1, node2); 387 std::swap(allowed1, allowed2); 388 } 389 } 390 391 addVirtRegCoalesce(g.getEdgeCosts(edge), *allowed1, *allowed2, 392 cBenefit); 393 } 394 } 395 } 396 397 return p; 398 } 399 400 void PBQPBuilderWithCoalescing::addPhysRegCoalesce(PBQP::Vector &costVec, 401 unsigned pregOption, 402 PBQP::PBQPNum benefit) { 403 costVec[pregOption] += -benefit; 404 } 405 406 void PBQPBuilderWithCoalescing::addVirtRegCoalesce( 407 PBQP::Matrix &costMat, 408 const PBQPRAProblem::AllowedSet &vr1Allowed, 409 const PBQPRAProblem::AllowedSet &vr2Allowed, 410 PBQP::PBQPNum benefit) { 411 412 assert(costMat.getRows() == vr1Allowed.size() + 1 && "Size mismatch."); 413 assert(costMat.getCols() == vr2Allowed.size() + 1 && "Size mismatch."); 414 415 for (unsigned i = 0; i != vr1Allowed.size(); ++i) { 416 unsigned preg1 = vr1Allowed[i]; 417 for (unsigned j = 0; j != vr2Allowed.size(); ++j) { 418 unsigned preg2 = vr2Allowed[j]; 419 420 if (preg1 == preg2) { 421 costMat[i + 1][j + 1] += -benefit; 422 } 423 } 424 } 425 } 426 427 428 void RegAllocPBQP::getAnalysisUsage(AnalysisUsage &au) const { 429 au.setPreservesCFG(); 430 au.addRequired<AliasAnalysis>(); 431 au.addPreserved<AliasAnalysis>(); 432 au.addRequired<SlotIndexes>(); 433 au.addPreserved<SlotIndexes>(); 434 au.addRequired<LiveIntervals>(); 435 //au.addRequiredID(SplitCriticalEdgesID); 436 if (customPassID) 437 au.addRequiredID(*customPassID); 438 au.addRequired<CalculateSpillWeights>(); 439 au.addRequired<LiveStacks>(); 440 au.addPreserved<LiveStacks>(); 441 au.addRequired<MachineDominatorTree>(); 442 au.addPreserved<MachineDominatorTree>(); 443 au.addRequired<MachineLoopInfo>(); 444 au.addPreserved<MachineLoopInfo>(); 445 au.addRequired<VirtRegMap>(); 446 MachineFunctionPass::getAnalysisUsage(au); 447 } 448 449 void RegAllocPBQP::findVRegIntervalsToAlloc() { 450 451 // Iterate over all live ranges. 452 for (unsigned i = 0, e = mri->getNumVirtRegs(); i != e; ++i) { 453 unsigned Reg = TargetRegisterInfo::index2VirtReg(i); 454 if (mri->reg_nodbg_empty(Reg)) 455 continue; 456 LiveInterval *li = &lis->getInterval(Reg); 457 458 // If this live interval is non-empty we will use pbqp to allocate it. 459 // Empty intervals we allocate in a simple post-processing stage in 460 // finalizeAlloc. 461 if (!li->empty()) { 462 vregsToAlloc.insert(li->reg); 463 } else { 464 emptyIntervalVRegs.insert(li->reg); 465 } 466 } 467 } 468 469 bool RegAllocPBQP::mapPBQPToRegAlloc(const PBQPRAProblem &problem, 470 const PBQP::Solution &solution) { 471 // Set to true if we have any spills 472 bool anotherRoundNeeded = false; 473 474 // Clear the existing allocation. 475 vrm->clearAllVirt(); 476 477 const PBQP::Graph &g = problem.getGraph(); 478 // Iterate over the nodes mapping the PBQP solution to a register 479 // assignment. 480 for (PBQP::Graph::ConstNodeItr node = g.nodesBegin(), 481 nodeEnd = g.nodesEnd(); 482 node != nodeEnd; ++node) { 483 unsigned vreg = problem.getVRegForNode(node); 484 unsigned alloc = solution.getSelection(node); 485 486 if (problem.isPRegOption(vreg, alloc)) { 487 unsigned preg = problem.getPRegForOption(vreg, alloc); 488 DEBUG(dbgs() << "VREG " << PrintReg(vreg, tri) << " -> " 489 << tri->getName(preg) << "\n"); 490 assert(preg != 0 && "Invalid preg selected."); 491 vrm->assignVirt2Phys(vreg, preg); 492 } else if (problem.isSpillOption(vreg, alloc)) { 493 vregsToAlloc.erase(vreg); 494 SmallVector<LiveInterval*, 8> newSpills; 495 LiveRangeEdit LRE(&lis->getInterval(vreg), newSpills, *mf, *lis, vrm); 496 spiller->spill(LRE); 497 498 DEBUG(dbgs() << "VREG " << PrintReg(vreg, tri) << " -> SPILLED (Cost: " 499 << LRE.getParent().weight << ", New vregs: "); 500 501 // Copy any newly inserted live intervals into the list of regs to 502 // allocate. 503 for (LiveRangeEdit::iterator itr = LRE.begin(), end = LRE.end(); 504 itr != end; ++itr) { 505 assert(!(*itr)->empty() && "Empty spill range."); 506 DEBUG(dbgs() << PrintReg((*itr)->reg, tri) << " "); 507 vregsToAlloc.insert((*itr)->reg); 508 } 509 510 DEBUG(dbgs() << ")\n"); 511 512 // We need another round if spill intervals were added. 513 anotherRoundNeeded |= !LRE.empty(); 514 } else { 515 llvm_unreachable("Unknown allocation option."); 516 } 517 } 518 519 return !anotherRoundNeeded; 520 } 521 522 523 void RegAllocPBQP::finalizeAlloc() const { 524 // First allocate registers for the empty intervals. 525 for (RegSet::const_iterator 526 itr = emptyIntervalVRegs.begin(), end = emptyIntervalVRegs.end(); 527 itr != end; ++itr) { 528 LiveInterval *li = &lis->getInterval(*itr); 529 530 unsigned physReg = vrm->getRegAllocPref(li->reg); 531 532 if (physReg == 0) { 533 const TargetRegisterClass *liRC = mri->getRegClass(li->reg); 534 physReg = liRC->getRawAllocationOrder(*mf).front(); 535 } 536 537 vrm->assignVirt2Phys(li->reg, physReg); 538 } 539 } 540 541 bool RegAllocPBQP::runOnMachineFunction(MachineFunction &MF) { 542 543 mf = &MF; 544 tm = &mf->getTarget(); 545 tri = tm->getRegisterInfo(); 546 tii = tm->getInstrInfo(); 547 mri = &mf->getRegInfo(); 548 549 lis = &getAnalysis<LiveIntervals>(); 550 lss = &getAnalysis<LiveStacks>(); 551 loopInfo = &getAnalysis<MachineLoopInfo>(); 552 553 vrm = &getAnalysis<VirtRegMap>(); 554 spiller.reset(createInlineSpiller(*this, MF, *vrm)); 555 556 mri->freezeReservedRegs(MF); 557 558 DEBUG(dbgs() << "PBQP Register Allocating for " << mf->getName() << "\n"); 559 560 // Allocator main loop: 561 // 562 // * Map current regalloc problem to a PBQP problem 563 // * Solve the PBQP problem 564 // * Map the solution back to a register allocation 565 // * Spill if necessary 566 // 567 // This process is continued till no more spills are generated. 568 569 // Find the vreg intervals in need of allocation. 570 findVRegIntervalsToAlloc(); 571 572 #ifndef NDEBUG 573 const Function* func = mf->getFunction(); 574 std::string fqn = 575 func->getParent()->getModuleIdentifier() + "." + 576 func->getName().str(); 577 #endif 578 579 // If there are non-empty intervals allocate them using pbqp. 580 if (!vregsToAlloc.empty()) { 581 582 bool pbqpAllocComplete = false; 583 unsigned round = 0; 584 585 while (!pbqpAllocComplete) { 586 DEBUG(dbgs() << " PBQP Regalloc round " << round << ":\n"); 587 588 std::auto_ptr<PBQPRAProblem> problem = 589 builder->build(mf, lis, loopInfo, vregsToAlloc); 590 591 #ifndef NDEBUG 592 if (pbqpDumpGraphs) { 593 std::ostringstream rs; 594 rs << round; 595 std::string graphFileName(fqn + "." + rs.str() + ".pbqpgraph"); 596 std::string tmp; 597 raw_fd_ostream os(graphFileName.c_str(), tmp); 598 DEBUG(dbgs() << "Dumping graph for round " << round << " to \"" 599 << graphFileName << "\"\n"); 600 problem->getGraph().dump(os); 601 } 602 #endif 603 604 PBQP::Solution solution = 605 PBQP::HeuristicSolver<PBQP::Heuristics::Briggs>::solve( 606 problem->getGraph()); 607 608 pbqpAllocComplete = mapPBQPToRegAlloc(*problem, solution); 609 610 ++round; 611 } 612 } 613 614 // Finalise allocation, allocate empty ranges. 615 finalizeAlloc(); 616 vregsToAlloc.clear(); 617 emptyIntervalVRegs.clear(); 618 619 DEBUG(dbgs() << "Post alloc VirtRegMap:\n" << *vrm << "\n"); 620 621 return true; 622 } 623 624 FunctionPass* llvm::createPBQPRegisterAllocator( 625 std::auto_ptr<PBQPBuilder> builder, 626 char *customPassID) { 627 return new RegAllocPBQP(builder, customPassID); 628 } 629 630 FunctionPass* llvm::createDefaultPBQPRegisterAllocator() { 631 if (pbqpCoalescing) { 632 return createPBQPRegisterAllocator( 633 std::auto_ptr<PBQPBuilder>(new PBQPBuilderWithCoalescing())); 634 } // else 635 return createPBQPRegisterAllocator( 636 std::auto_ptr<PBQPBuilder>(new PBQPBuilder())); 637 } 638 639 #undef DEBUG_TYPE 640