1 //===-- PPCRegisterInfo.h - PowerPC Register Information Impl ---*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file contains the PowerPC implementation of the TargetRegisterInfo 11 // class. 12 // 13 //===----------------------------------------------------------------------===// 14 15 #ifndef POWERPC32_REGISTERINFO_H 16 #define POWERPC32_REGISTERINFO_H 17 18 #include "PPC.h" 19 #include <map> 20 21 #define GET_REGINFO_HEADER 22 #include "PPCGenRegisterInfo.inc" 23 24 namespace llvm { 25 class PPCSubtarget; 26 class TargetInstrInfo; 27 class Type; 28 29 class PPCRegisterInfo : public PPCGenRegisterInfo { 30 std::map<unsigned, unsigned> ImmToIdxMap; 31 const PPCSubtarget &Subtarget; 32 const TargetInstrInfo &TII; 33 public: 34 PPCRegisterInfo(const PPCSubtarget &SubTarget, const TargetInstrInfo &tii); 35 36 /// getPointerRegClass - Return the register class to use to hold pointers. 37 /// This is used for addressing modes. 38 virtual const TargetRegisterClass * 39 getPointerRegClass(const MachineFunction &MF, unsigned Kind=0) const; 40 41 unsigned getRegPressureLimit(const TargetRegisterClass *RC, 42 MachineFunction &MF) const; 43 44 /// Code Generation virtual methods... 45 const uint16_t *getCalleeSavedRegs(const MachineFunction* MF = 0) const; 46 const unsigned *getCallPreservedMask(CallingConv::ID CC) const; 47 48 BitVector getReservedRegs(const MachineFunction &MF) const; 49 50 virtual bool avoidWriteAfterWrite(const TargetRegisterClass *RC) const; 51 52 /// requiresRegisterScavenging - We require a register scavenger. 53 /// FIXME (64-bit): Should be inlined. 54 bool requiresRegisterScavenging(const MachineFunction &MF) const; 55 56 bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const; 57 58 void eliminateCallFramePseudoInstr(MachineFunction &MF, 59 MachineBasicBlock &MBB, 60 MachineBasicBlock::iterator I) const; 61 62 void lowerDynamicAlloc(MachineBasicBlock::iterator II, 63 int SPAdj, RegScavenger *RS) const; 64 void lowerCRSpilling(MachineBasicBlock::iterator II, unsigned FrameIndex, 65 int SPAdj, RegScavenger *RS) const; 66 void lowerCRRestore(MachineBasicBlock::iterator II, unsigned FrameIndex, 67 int SPAdj, RegScavenger *RS) const; 68 void eliminateFrameIndex(MachineBasicBlock::iterator II, 69 int SPAdj, RegScavenger *RS = NULL) const; 70 71 // Debug information queries. 72 unsigned getFrameRegister(const MachineFunction &MF) const; 73 74 // Exception handling queries. 75 unsigned getEHExceptionRegister() const; 76 unsigned getEHHandlerRegister() const; 77 }; 78 79 } // end namespace llvm 80 81 #endif 82
