| /external/chromium_org/third_party/yasm/source/patched-yasm/tools/re2c/ |
| ins.h | 15 typedef union Ins {
26 } Ins;
28 static int isMarked(Ins *i){
32 static void mark(Ins *i){
36 static void unmark(Ins *i){
|
| /external/llvm/lib/Transforms/IPO/ |
| IPConstantPropagation.cpp | 250 Instruction *Ins = cast<Instruction>(*I);
257 if (ExtractValueInst *EV = dyn_cast<ExtractValueInst>(Ins))
270 Ins->replaceAllUsesWith(New);
271 Ins->eraseFromParent();
|
| PartialInlining.cpp | 94 BasicBlock::iterator Ins = newReturnBlock->begin();
99 PHINode* retPhi = PHINode::Create(OldPhi->getType(), 2, "", Ins);
101 Ins = newReturnBlock->getFirstNonPHI();
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64RegisterInfo.cpp | 289 MachineBasicBlock::iterator Ins = MBB->begin();
291 if (Ins != MBB->end())
292 DL = Ins->getDebugLoc();
300 BuildMI(*MBB, Ins, DL, MCID, BaseReg)
|
| AArch64ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMBaseRegisterInfo.cpp | 587 MachineBasicBlock::iterator Ins = MBB->begin();
589 if (Ins != MBB->end())
590 DL = Ins->getDebugLoc();
598 MachineInstrBuilder MIB = AddDefaultPred(BuildMI(*MBB, Ins, DL, MCID, BaseReg)
|
| ARMISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCRegisterInfo.cpp | [all...] |
| /frameworks/compile/slang/ |
| slang_rs_reflection_cpp.cpp | 266 const RSExportForEach::InVec &Ins = ForEach->getIns();
267 for (RSExportForEach::InIter BI = Ins.begin(), EI = Ins.end();
[all...] |
| slang_rs_reflection.cpp | 689 const RSExportForEach::InVec &Ins = EF->getIns();
693 if (Ins.size() == 1) {
696 } else if (Ins.size() > 1) {
697 for (RSExportForEach::InIter BI = Ins.begin(), EI = Ins.end(); BI != EI;
736 if (Ins.size() == 1) {
739 } else if (Ins.size() > 1) {
740 for (RSExportForEach::InIter BI = Ins.begin(), EI = Ins.end(); BI != EI;
777 genTypeCheck(*BI, ("ain_" + Ins[Index]->getName()).str().c_str())
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | 366 SmallVectorImpl<ISD::InputArg> &Ins,
378 CCInfo.AnalyzeCallResult(Ins, RetCC_Hexagon);
401 SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins;
446 Outs, OutVals, Ins, DAG);
611 return LowerCallResult(Chain, InFlag, CallConv, isVarArg, Ins, dl, DAG,
832 SmallVectorImpl<ISD::InputArg> &Ins,
849 CCInfo.AnalyzeFormalArguments(Ins, CC_Hexagon);
862 ISD::ArgFlagsTy Flags = Ins[i].Flags;
[all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.cpp | 272 const SmallVectorImpl<ISD::InputArg> &Ins) {
273 State.AnalyzeFormalArguments(Ins, CC_MSP430_AssignStack);
347 const SmallVectorImpl<ISD::InputArg> &Ins) {
348 State.AnalyzeCallResult(Ins, RetCC_MSP430);
372 &Ins,
383 return LowerCCCArguments(Chain, CallConv, isVarArg, Ins, dl, DAG, InVals);
385 if (Ins.empty())
398 SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins;
414 Outs, OutVals, Ins, dl, DAG, InVals)
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.h | 104 Ins,
364 void analyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins,
368 void analyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins,
466 const SmallVectorImpl<ISD::InputArg> &Ins,
529 const SmallVectorImpl<ISD::InputArg> &Ins,
|
| MipsISelLowering.cpp | 154 case MipsISD::Ins: return "MipsISD::Ins";
660 // Pattern match INS.
663 // => ins $dst, $src, size, pos, $src1
706 return DAG.getNode(MipsISD::Ins, SDLoc(N), ValTy, Shl.getOperand(0),
[all...] |
| /external/llvm/utils/TableGen/ |
| CodeGenRegisters.h | 82 std::pair<CompMap::iterator, bool> Ins =
93 return (Ins.second || Ins.first->second == B) ? nullptr
94 : Ins.first->second;
|
| CodeGenRegisters.cpp | 327 DenseMap<const CodeGenRegister*, CodeGenSubRegIndex*>::iterator Ins =
329 if (Ins->second == SI->first)
337 SI->first->getName() + " and " + Ins->second->getName());
[all...] |
| /external/llvm/include/llvm/TableGen/ |
| Record.h | [all...] |
| /external/llvm/lib/CodeGen/ |
| RegAllocGreedy.cpp | [all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXISelLowering.cpp | 75 /// same number of types as the Ins/Outs arrays in LowerFormalArguments,
657 SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins;
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | 324 const SmallVectorImpl<ISD::InputArg> &Ins,
329 return LowerFormalArguments_64(Chain, CallConv, IsVarArg, Ins,
331 return LowerFormalArguments_32(Chain, CallConv, IsVarArg, Ins,
342 const SmallVectorImpl<ISD::InputArg> &Ins,
354 CCInfo.AnalyzeFormalArguments(Ins, CC_Sparc32);
362 if (Ins[InIdx].Flags.isSRet()) {
544 const SmallVectorImpl<ISD::InputArg> &Ins,
554 CCInfo.AnalyzeFormalArguments(Ins, CC_Sparc64);
689 SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins;
[all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelLowering.cpp | 668 const SmallVectorImpl<ISD::InputArg> &Ins,
683 CCInfo.AnalyzeFormalArguments(Ins, CC_SystemZ);
809 SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins;
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86FastISel.cpp | [all...] |
| X86ISelLowering.cpp | [all...] |
| /external/llvm/lib/Transforms/Instrumentation/ |
| AddressSanitizer.cpp | 124 static cl::opt<int> ClMaxInsnsToInstrumentPerBB("asan-max-ins-per-bb",
[all...] |
