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  /external/v8/test/webkit/
dfg-weak-js-constant-silent-fill.js 25 "Tests that DFG silent spill and fill of WeakJSConstants does not result in nonsense."
  /packages/apps/SoundRecorder/res/values-nb/
strings.xml 22 <string name="review_message" msgid="201616012287839474">"Spill tilbake melding"</string>
  /external/v8/src/compiler/
register-allocator.cc 184 // We cannot spill a live range that has a use requiring a register
768 // This value is produced on the stack, we never need to spill it.
800 // This move to spill operand is not a real use. Liveness analysis
844 // This value is produced on the stack, we never need to spill it.
858 // This move to spill operand is not a real use. Liveness analysis
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  /system/core/libpixelflinger/codeflinger/
texturing.cpp 383 CONTEXT_STORE(s.reg, generated_vars.texture[i].spill[0]);
384 CONTEXT_STORE(t.reg, generated_vars.texture[i].spill[1]);
407 // We don't have a way to spill registers automatically
408 // spill depth and AA regs, when we know we may have to.
409 // build the spill list...
433 Spill spill(registerFile(), *this, spill_list);
459 CONTEXT_LOAD(s.reg, generated_vars.texture[i].spill[0]);
460 CONTEXT_LOAD(t.reg, generated_vars.texture[i].spill[1]);
610 CONTEXT_STORE(s.reg, generated_vars.texture[i].spill[0])
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  /external/llvm/lib/CodeGen/SelectionDAG/
StatepointLowering.cpp 111 /// statepoint spilling. If we can find a spill slot for the incoming value,
119 // We won't need to spill this, so no need to check for previously
192 /// StackMap section. It has no effect on the number of spill slots required
349 /// Spill a value incoming to the statepoint. It might be either part of
351 /// or gcstate. In both cases unconditionally spill it on the stack unless it
406 // Otherwise, locate a spill slot and explicitly spill it so it
409 // spill location. This would be a useful optimization, but would
470 // Before we actually start lowering (and allocating spill slots for values),
526 // If there are any explicit spill slots passed to the statepoint, record
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StatepointLowering.h 29 /// used for a debug mode consistency check only). The spill slot tracking
45 /// Returns the spill location of a value incoming to the current
  /external/llvm/include/llvm/CodeGen/
PseudoSourceValue.h 28 /// stack frame (e.g., a spill slot), below the stack frame (e.g., argument
62 /// e.g., a spill slot.
VirtRegMap.h 13 // adds spill code and rewrites virtual into physical register references.
63 /// createSpillSlot - Allocate a spill slot for RC from MFI.
MachineFrameInfo.h 71 /// example, register allocator spill code never needs variable sized
100 // isSpillSlot - If true the stack object is used as spill slot. It
113 // Normally, spill slots and fixed-offset objects don't alias IR-accessible
515 /// CreateFixedSpillStackObject - Create a spill slot at a fixed location
542 /// to a spill slot..
564 /// represents a spill slot, returning a nonnegative identifier to represent
607 /// Before the PrologueEpilogueInserter has placed the CSR spill code, this
  /external/llvm/test/CodeGen/Mips/
no-odd-spreg.ll 18 ; allocator will choose $f12 and $f13 to avoid the spill/reload.
21 ; will be forced to spill/reload either %a or %0.
  /external/llvm/test/CodeGen/SystemZ/
frame-18.ll 6 ; We need to allocate a 4-byte spill slot, rounded to 8 bytes. The frame
52 ; Same for i64, except that the full spill slot is used.
frame-17.ll 6 ; 4-byte spill slot, rounded to 8 bytes. The frame size should be exactly
71 ; Same for doubles, except that the full spill slot is used.
132 ; The long double case needs a 16-byte spill slot.
  /external/llvm/test/CodeGen/X86/
fold-tied-op.ll 9 ; CHECK: shldl {{.*#+}} 4-byte Folded Spill
11 ; CHECK: shldl {{.*#+}} 4-byte Folded Spill
musttail-fastcall.ll 22 ; Check that we spill and fill around the call to puts.
51 ; Check that we spill and fill SSE registers around the call to puts.
win64_eh.ll 162 ; WIN64: movaps %xmm7, -16(%rbp) # 16-byte Spill
164 ; WIN64: movaps %xmm6, -32(%rbp) # 16-byte Spill
  /external/v8/test/mjsunit/
codegen-coverage.js 53 // The call will spill registers and leave x in {eax,rax}.
55 // The add will spill x and reuse {eax,rax} for the result.
  /external/llvm/lib/Target/PowerPC/
PPCFrameLowering.cpp 256 /// the spill instruction refers to an undefined register. This code needs
705 // FIXME: On PPC32 SVR4, we must not spill before claiming the stackframe.
712 // FIXME: On PPC32 SVR4, we must not spill before claiming the stackframe.
719 // FIXME: On PPC32 SVR4, we must not spill before claiming the stackframe.
726 // FIXME: On PPC32 SVR4, we must not spill before claiming the stackframe.
888 // For SVR4, don't emit a move for the CR spill slot if we haven't
894 // For 64-bit SVR4 when we have spilled CRs, the spill location
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  /external/v8/src/x87/
lithium-gap-resolver-x87.cc 234 // 3. Prefer to spill a register that is not used in any remaining move
274 // Spill on demand to use a temporary register for memory-to-memory
373 // spill on demand because the simple spill implementation cannot avoid
391 // Memory-memory. Spill on demand to use a temporary. If there is a
  /art/compiler/utils/x86_64/
assembler_x86_64.cc 2365 x86_64::X86_64ManagedRegister spill = spill_regs.at(i).AsX86_64(); local
2383 x86_64::X86_64ManagedRegister spill = spill_regs.at(i).AsX86_64(); local
2396 ManagedRegisterSpill spill = entry_spills.at(i); local
2424 x86_64::X86_64ManagedRegister spill = spill_regs.at(i).AsX86_64(); local
2437 x86_64::X86_64ManagedRegister spill = spill_regs.at(i).AsX86_64(); local
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  /external/v8/src/
lithium-allocator.cc 188 // We cannot spill a live range that has a use requiring a register
793 // This value is produced on the stack, we never need to spill it.
805 // This move to spill operand is not a real use. Liveness analysis
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  /external/llvm/lib/CodeGen/
RegAllocPBQP.cpp 14 // register assignment. If any variables are selected for spilling then spill
131 /// \brief Spill the given VReg.
152 /// @brief Set spill costs for each node in the PBQP reg-alloc graph.
158 // A minimum spill costs, so that register constraints can can be set
634 VRegSpiller.spill(LRE);
646 assert(!LI.empty() && "Empty spill range.");
682 // Spill VReg. If this introduces new intervals we'll need another round
717 // All intervals have a spill weight that is mostly proportional to the number
743 // * Spill if necessary
RegAllocFast.cpp 75 bool Dirty; // Register needs spill.
207 // Allocate a new stack object for this spill location...
282 // instruction, not on the spill.
315 DEBUG(dbgs() << "Inserting debug info due to spill:" << "\n" << *NewDV);
327 /// spillAll - Spill all dirty virtregs without killing them.
532 // Ignore the hint if we would have to spill a dirty register.
721 // we must spill and reallocate.
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  /art/compiler/jni/quick/arm/
calling_convention_arm.cc 127 // We spill the argument registers on ARM to free them up for scratch use, we then assume
240 // Compute spill mask to agree with callee saves initialized in the constructor
263 // Plus return value spill area size
  /external/llvm/lib/Target/Sparc/
SparcRegisterInfo.td 197 // Register class for 64-bit mode, with a 64-bit spill slot size.
200 // spill slot is a stricter constraint than only requiring a 32-bit spill slot.
  /art/compiler/utils/x86/
assembler_x86.cc 1719 Register spill = spill_regs.at(i).AsX86().AsCpuRegister(); local
1737 ManagedRegisterSpill spill = entry_spills.at(i); local
1761 Register spill = spill_regs.at(i).AsX86().AsCpuRegister(); local
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