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      1 //===- CodeGenInstruction.h - Instruction Class Wrapper ---------*- C++ -*-===//
      2 //
      3 //                     The LLVM Compiler Infrastructure
      4 //
      5 // This file is distributed under the University of Illinois Open Source
      6 // License. See LICENSE.TXT for details.
      7 //
      8 //===----------------------------------------------------------------------===//
      9 //
     10 // This file defines a wrapper class for the 'Instruction' TableGen class.
     11 //
     12 //===----------------------------------------------------------------------===//
     13 
     14 #ifndef LLVM_UTILS_TABLEGEN_CODEGENINSTRUCTION_H
     15 #define LLVM_UTILS_TABLEGEN_CODEGENINSTRUCTION_H
     16 
     17 #include "llvm/ADT/ArrayRef.h"
     18 #include "llvm/ADT/StringRef.h"
     19 #include "llvm/CodeGen/MachineValueType.h"
     20 #include "llvm/Support/SMLoc.h"
     21 #include <string>
     22 #include <utility>
     23 #include <vector>
     24 
     25 namespace llvm {
     26   class Record;
     27   class DagInit;
     28   class CodeGenTarget;
     29   class StringRef;
     30 
     31   class CGIOperandList {
     32   public:
     33     class ConstraintInfo {
     34       enum { None, EarlyClobber, Tied } Kind;
     35       unsigned OtherTiedOperand;
     36     public:
     37       ConstraintInfo() : Kind(None) {}
     38 
     39       static ConstraintInfo getEarlyClobber() {
     40         ConstraintInfo I;
     41         I.Kind = EarlyClobber;
     42         I.OtherTiedOperand = 0;
     43         return I;
     44       }
     45 
     46       static ConstraintInfo getTied(unsigned Op) {
     47         ConstraintInfo I;
     48         I.Kind = Tied;
     49         I.OtherTiedOperand = Op;
     50         return I;
     51       }
     52 
     53       bool isNone() const { return Kind == None; }
     54       bool isEarlyClobber() const { return Kind == EarlyClobber; }
     55       bool isTied() const { return Kind == Tied; }
     56 
     57       unsigned getTiedOperand() const {
     58         assert(isTied());
     59         return OtherTiedOperand;
     60       }
     61     };
     62 
     63     /// OperandInfo - The information we keep track of for each operand in the
     64     /// operand list for a tablegen instruction.
     65     struct OperandInfo {
     66       /// Rec - The definition this operand is declared as.
     67       ///
     68       Record *Rec;
     69 
     70       /// Name - If this operand was assigned a symbolic name, this is it,
     71       /// otherwise, it's empty.
     72       std::string Name;
     73 
     74       /// PrinterMethodName - The method used to print operands of this type in
     75       /// the asmprinter.
     76       std::string PrinterMethodName;
     77 
     78       /// EncoderMethodName - The method used to get the machine operand value
     79       /// for binary encoding. "getMachineOpValue" by default.
     80       std::string EncoderMethodName;
     81 
     82       /// OperandType - A value from MCOI::OperandType representing the type of
     83       /// the operand.
     84       std::string OperandType;
     85 
     86       /// MIOperandNo - Currently (this is meant to be phased out), some logical
     87       /// operands correspond to multiple MachineInstr operands.  In the X86
     88       /// target for example, one address operand is represented as 4
     89       /// MachineOperands.  Because of this, the operand number in the
     90       /// OperandList may not match the MachineInstr operand num.  Until it
     91       /// does, this contains the MI operand index of this operand.
     92       unsigned MIOperandNo;
     93       unsigned MINumOperands;   // The number of operands.
     94 
     95       /// DoNotEncode - Bools are set to true in this vector for each operand in
     96       /// the DisableEncoding list.  These should not be emitted by the code
     97       /// emitter.
     98       std::vector<bool> DoNotEncode;
     99 
    100       /// MIOperandInfo - Default MI operand type. Note an operand may be made
    101       /// up of multiple MI operands.
    102       DagInit *MIOperandInfo;
    103 
    104       /// Constraint info for this operand.  This operand can have pieces, so we
    105       /// track constraint info for each.
    106       std::vector<ConstraintInfo> Constraints;
    107 
    108       OperandInfo(Record *R, const std::string &N, const std::string &PMN,
    109                   const std::string &EMN, const std::string &OT, unsigned MION,
    110                   unsigned MINO, DagInit *MIOI)
    111       : Rec(R), Name(N), PrinterMethodName(PMN), EncoderMethodName(EMN),
    112         OperandType(OT), MIOperandNo(MION), MINumOperands(MINO),
    113         MIOperandInfo(MIOI) {}
    114 
    115 
    116       /// getTiedOperand - If this operand is tied to another one, return the
    117       /// other operand number.  Otherwise, return -1.
    118       int getTiedRegister() const {
    119         for (unsigned j = 0, e = Constraints.size(); j != e; ++j) {
    120           const CGIOperandList::ConstraintInfo &CI = Constraints[j];
    121           if (CI.isTied()) return CI.getTiedOperand();
    122         }
    123         return -1;
    124       }
    125     };
    126 
    127     CGIOperandList(Record *D);
    128 
    129     Record *TheDef;            // The actual record containing this OperandList.
    130 
    131     /// NumDefs - Number of def operands declared, this is the number of
    132     /// elements in the instruction's (outs) list.
    133     ///
    134     unsigned NumDefs;
    135 
    136     /// OperandList - The list of declared operands, along with their declared
    137     /// type (which is a record).
    138     std::vector<OperandInfo> OperandList;
    139 
    140     // Information gleaned from the operand list.
    141     bool isPredicable;
    142     bool hasOptionalDef;
    143     bool isVariadic;
    144 
    145     // Provide transparent accessors to the operand list.
    146     bool empty() const { return OperandList.empty(); }
    147     unsigned size() const { return OperandList.size(); }
    148     const OperandInfo &operator[](unsigned i) const { return OperandList[i]; }
    149     OperandInfo &operator[](unsigned i) { return OperandList[i]; }
    150     OperandInfo &back() { return OperandList.back(); }
    151     const OperandInfo &back() const { return OperandList.back(); }
    152 
    153     typedef std::vector<OperandInfo>::iterator iterator;
    154     typedef std::vector<OperandInfo>::const_iterator const_iterator;
    155     iterator begin() { return OperandList.begin(); }
    156     const_iterator begin() const { return OperandList.begin(); }
    157     iterator end() { return OperandList.end(); }
    158     const_iterator end() const { return OperandList.end(); }
    159 
    160     /// getOperandNamed - Return the index of the operand with the specified
    161     /// non-empty name.  If the instruction does not have an operand with the
    162     /// specified name, abort.
    163     unsigned getOperandNamed(StringRef Name) const;
    164 
    165     /// hasOperandNamed - Query whether the instruction has an operand of the
    166     /// given name. If so, return true and set OpIdx to the index of the
    167     /// operand. Otherwise, return false.
    168     bool hasOperandNamed(StringRef Name, unsigned &OpIdx) const;
    169 
    170     /// ParseOperandName - Parse an operand name like "$foo" or "$foo.bar",
    171     /// where $foo is a whole operand and $foo.bar refers to a suboperand.
    172     /// This aborts if the name is invalid.  If AllowWholeOp is true, references
    173     /// to operands with suboperands are allowed, otherwise not.
    174     std::pair<unsigned,unsigned> ParseOperandName(const std::string &Op,
    175                                                   bool AllowWholeOp = true);
    176 
    177     /// getFlattenedOperandNumber - Flatten a operand/suboperand pair into a
    178     /// flat machineinstr operand #.
    179     unsigned getFlattenedOperandNumber(std::pair<unsigned,unsigned> Op) const {
    180       return OperandList[Op.first].MIOperandNo + Op.second;
    181     }
    182 
    183     /// getSubOperandNumber - Unflatten a operand number into an
    184     /// operand/suboperand pair.
    185     std::pair<unsigned,unsigned> getSubOperandNumber(unsigned Op) const {
    186       for (unsigned i = 0; ; ++i) {
    187         assert(i < OperandList.size() && "Invalid flat operand #");
    188         if (OperandList[i].MIOperandNo+OperandList[i].MINumOperands > Op)
    189           return std::make_pair(i, Op-OperandList[i].MIOperandNo);
    190       }
    191     }
    192 
    193 
    194     /// isFlatOperandNotEmitted - Return true if the specified flat operand #
    195     /// should not be emitted with the code emitter.
    196     bool isFlatOperandNotEmitted(unsigned FlatOpNo) const {
    197       std::pair<unsigned,unsigned> Op = getSubOperandNumber(FlatOpNo);
    198       if (OperandList[Op.first].DoNotEncode.size() > Op.second)
    199         return OperandList[Op.first].DoNotEncode[Op.second];
    200       return false;
    201     }
    202 
    203     void ProcessDisableEncoding(std::string Value);
    204   };
    205 
    206 
    207   class CodeGenInstruction {
    208   public:
    209     Record *TheDef;            // The actual record defining this instruction.
    210     std::string Namespace;     // The namespace the instruction is in.
    211 
    212     /// AsmString - The format string used to emit a .s file for the
    213     /// instruction.
    214     std::string AsmString;
    215 
    216     /// Operands - This is information about the (ins) and (outs) list specified
    217     /// to the instruction.
    218     CGIOperandList Operands;
    219 
    220     /// ImplicitDefs/ImplicitUses - These are lists of registers that are
    221     /// implicitly defined and used by the instruction.
    222     std::vector<Record*> ImplicitDefs, ImplicitUses;
    223 
    224     // Various boolean values we track for the instruction.
    225     bool isReturn : 1;
    226     bool isBranch : 1;
    227     bool isIndirectBranch : 1;
    228     bool isCompare : 1;
    229     bool isMoveImm : 1;
    230     bool isBitcast : 1;
    231     bool isSelect : 1;
    232     bool isBarrier : 1;
    233     bool isCall : 1;
    234     bool canFoldAsLoad : 1;
    235     bool mayLoad : 1;
    236     bool mayLoad_Unset : 1;
    237     bool mayStore : 1;
    238     bool mayStore_Unset : 1;
    239     bool isPredicable : 1;
    240     bool isConvertibleToThreeAddress : 1;
    241     bool isCommutable : 1;
    242     bool isTerminator : 1;
    243     bool isReMaterializable : 1;
    244     bool hasDelaySlot : 1;
    245     bool usesCustomInserter : 1;
    246     bool hasPostISelHook : 1;
    247     bool hasCtrlDep : 1;
    248     bool isNotDuplicable : 1;
    249     bool hasSideEffects : 1;
    250     bool hasSideEffects_Unset : 1;
    251     bool isAsCheapAsAMove : 1;
    252     bool hasExtraSrcRegAllocReq : 1;
    253     bool hasExtraDefRegAllocReq : 1;
    254     bool isCodeGenOnly : 1;
    255     bool isPseudo : 1;
    256     bool isRegSequence : 1;
    257     bool isExtractSubreg : 1;
    258     bool isInsertSubreg : 1;
    259     bool isConvergent : 1;
    260 
    261     std::string DeprecatedReason;
    262     bool HasComplexDeprecationPredicate;
    263 
    264     /// Are there any undefined flags?
    265     bool hasUndefFlags() const {
    266       return mayLoad_Unset || mayStore_Unset || hasSideEffects_Unset;
    267     }
    268 
    269     // The record used to infer instruction flags, or NULL if no flag values
    270     // have been inferred.
    271     Record *InferredFrom;
    272 
    273     CodeGenInstruction(Record *R);
    274 
    275     /// HasOneImplicitDefWithKnownVT - If the instruction has at least one
    276     /// implicit def and it has a known VT, return the VT, otherwise return
    277     /// MVT::Other.
    278     MVT::SimpleValueType
    279       HasOneImplicitDefWithKnownVT(const CodeGenTarget &TargetInfo) const;
    280 
    281 
    282     /// FlattenAsmStringVariants - Flatten the specified AsmString to only
    283     /// include text from the specified variant, returning the new string.
    284     static std::string FlattenAsmStringVariants(StringRef AsmString,
    285                                                 unsigned Variant);
    286   };
    287 
    288 
    289   /// CodeGenInstAlias - This represents an InstAlias definition.
    290   class CodeGenInstAlias {
    291   public:
    292     Record *TheDef;            // The actual record defining this InstAlias.
    293 
    294     /// AsmString - The format string used to emit a .s file for the
    295     /// instruction.
    296     std::string AsmString;
    297 
    298     /// Result - The result instruction.
    299     DagInit *Result;
    300 
    301     /// ResultInst - The instruction generated by the alias (decoded from
    302     /// Result).
    303     CodeGenInstruction *ResultInst;
    304 
    305 
    306     struct ResultOperand {
    307     private:
    308       std::string Name;
    309       Record *R;
    310 
    311       int64_t Imm;
    312     public:
    313       enum {
    314         K_Record,
    315         K_Imm,
    316         K_Reg
    317       } Kind;
    318 
    319       ResultOperand(std::string N, Record *r) : Name(N), R(r), Kind(K_Record) {}
    320       ResultOperand(int64_t I) : Imm(I), Kind(K_Imm) {}
    321       ResultOperand(Record *r) : R(r), Kind(K_Reg) {}
    322 
    323       bool isRecord() const { return Kind == K_Record; }
    324       bool isImm() const { return Kind == K_Imm; }
    325       bool isReg() const { return Kind == K_Reg; }
    326 
    327       StringRef getName() const { assert(isRecord()); return Name; }
    328       Record *getRecord() const { assert(isRecord()); return R; }
    329       int64_t getImm() const { assert(isImm()); return Imm; }
    330       Record *getRegister() const { assert(isReg()); return R; }
    331 
    332       unsigned getMINumOperands() const;
    333     };
    334 
    335     /// ResultOperands - The decoded operands for the result instruction.
    336     std::vector<ResultOperand> ResultOperands;
    337 
    338     /// ResultInstOperandIndex - For each operand, this vector holds a pair of
    339     /// indices to identify the corresponding operand in the result
    340     /// instruction.  The first index specifies the operand and the second
    341     /// index specifies the suboperand.  If there are no suboperands or if all
    342     /// of them are matched by the operand, the second value should be -1.
    343     std::vector<std::pair<unsigned, int> > ResultInstOperandIndex;
    344 
    345     CodeGenInstAlias(Record *R, unsigned Variant, CodeGenTarget &T);
    346 
    347     bool tryAliasOpMatch(DagInit *Result, unsigned AliasOpNo,
    348                          Record *InstOpRec, bool hasSubOps, ArrayRef<SMLoc> Loc,
    349                          CodeGenTarget &T, ResultOperand &ResOp);
    350   };
    351 }
    352 
    353 #endif
    354