| /external/v8/src/crankshaft/ |
| hydrogen-environment-liveness.h | 17 // unnecessary spill slot moves. Therefore it is beneficial to trim the
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| lithium-allocator.h | 454 // Spill the given life range after position pos.
457 // Spill the given life range after position [start] and up to position [end].
462 // Spill the given life range after position [start] and up to position [end].
471 // If we are trying to spill a range inside the loop try to
472 // hoist spill position out to the point just before the loop.
476 void Spill(LiveRange* range);
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| /external/webrtc/webrtc/base/ |
| logsinks.h | 35 // Writes the message to the current file. It will spill over to the next
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| /frameworks/base/packages/SystemUI/res/values-nb/ |
| strings_tv.xml | 24 <string name="pip_play" msgid="674145557658227044">"Spill av"</string>
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| /frameworks/support/v7/mediarouter/res/values-nb/ |
| strings.xml | 27 <string name="mr_controller_play" msgid="683634565969987458">"Spill av"</string>
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| /prebuilts/sdk/current/support/v7/mediarouter/res/values-nb/ |
| strings.xml | 27 <string name="mr_controller_play" msgid="683634565969987458">"Spill av"</string>
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| /art/compiler/jni/quick/mips64/ |
| calling_convention_mips64.cc | 94 // We spill the argument registers on MIPS64 to free them up for scratch use,
140 // Compute spill mask to agree with callee saves initialized in the constructor
157 // Plus return value spill area size
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| /external/llvm/test/CodeGen/X86/ |
| statepoint-allocas.ll | 3 ; exact meaning is up to the consumer of the stackmap) and as an explicit spill
91 ; Direct Spill Slot [RSP+0]
120 ; Direct Spill Slot [RSP+0]
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| pmul.ll | 259 ; SSE2-NEXT: movaps %xmm1, {{[0-9]+}}(%rsp) # 16-byte Spill
260 ; SSE2-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
277 ; SSE41-NEXT: movaps %xmm1, {{[0-9]+}}(%rsp) # 16-byte Spill
278 ; SSE41-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
288 ; AVX2-NEXT: vmovaps %xmm1, {{[0-9]+}}(%rsp) # 16-byte Spill
289 ; AVX2-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
306 ; SSE-NEXT: movaps %xmm1, {{[0-9]+}}(%rsp) # 16-byte Spill
307 ; SSE-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
328 ; AVX2-NEXT: vmovaps %xmm1, {{[0-9]+}}(%rsp) # 16-byte Spill
329 ; AVX2-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
[all...] |
| /external/llvm/test/MC/Mips/ |
| elf-tls.s | 34 sw $ra, 20($sp) # 4-byte Folded Spill
66 sw $ra, 20($sp) # 4-byte Folded Spill
98 sw $ra, 20($sp) # 4-byte Folded Spill
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| /external/v8/src/compiler/ |
| greedy-allocator.h | 174 // While we attempt to merge spill ranges later on in the allocation pipeline,
177 // between spill ranges of group members.
184 // Necessary heuristic: spill when all else failed.
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| register-allocator.cc | 323 void LiveRange::Spill() {
400 // We cannot spill a live range that has a use requiring a register
744 // make sure we insert the spill.
750 // Insert spill at the end to let live range connections happen at START.
2169 SpillRange* spill = range->HasSpillRange() local
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/ia64/ |
| unwind-ok.s | 11 .spill 0
88 .spill 0
137 .spill 0
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| /art/compiler/optimizing/ |
| register_allocator.cc | 518 message << "Spill slot conflict at " << j;
690 // (5) If no register could be found, we need to spill.
[all...] |
| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| brw_wm_pass2.c | 166 /* Allocate a spill slot. Note that allocations start from 0x40 -
174 /* The spill will be done in brw_wm_emit.c immediately after the
188 * TODO: implement spill-to-reg so that we can rearrange discontigous
189 * free regs and then spill the oldest non-free regs in sequence.
303 * result registers. Where necessary spill registers to scratch space
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| /external/llvm/lib/Target/ARM/ |
| ARMFrameLowering.cpp | 104 // Integer spill area is handled with "pop".
315 // Determine the sizes of each callee-save spill areas and record which frame
316 // belongs to which callee-save spill areas.
348 // Determine spill area sizes.
392 // Determine starting offsets of spill areas.
518 // For iOS, FP is R7, which has now been stored in spill area 1.
520 // into spill area 1, including the FP in R11. In either case, it
735 // Move SP to start of FP callee save spill area.
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsSEFrameLowering.cpp | 272 // spill + reload via ldc1
277 // The FP64A ABI (fp64 with nooddspreg) must also use a spill/reload sequence
281 // allocation so for now we use a spill/reload sequence for all
299 // We re-use the same spill slot each time so that the stack frame doesn't
333 // spill + reload via ldc1
338 // The FP64A ABI (fp64 with nooddspreg) must also use a spill/reload sequence
342 // allocation so for now we use a spill/reload sequence for all
362 // We re-use the same spill slot each time so that the stack frame doesn't
484 // Insert instructions that spill eh data registers.
588 // Fetch and spill EP
[all...] |
| /external/llvm/lib/CodeGen/ |
| PrologEpilogInserter.cpp | 185 // Insert spill code for any callee saved registers that are modified.
188 // Determine placement of CSR spill/restore code:
345 // Nope, just spill it anywhere convenient.
357 // Spill it to the stack where we must.
420 // It's killed at the spill.
427 /// insertCSRSpillsAndRestores - Insert spill and restore code for
446 // Spill using target interface.
451 // Insert the spill to the stack frame.
589 // First assign frame offsets to stack objects that are used to spill
617 // Make sure the special register scavenging spill slot is closest to th
[all...] |
| /external/llvm/lib/Target/WebAssembly/ |
| WebAssemblyPEI.cpp | 200 // Insert spill code for any callee saved registers that are modified.
203 // Determine placement of CSR spill/restore code:
361 // Nope, just spill it anywhere convenient.
373 // Spill it to the stack where we must.
436 // It's killed at the spill.
443 /// insertCSRSpillsAndRestores - Insert spill and restore code for
462 // Spill using target interface.
467 // Insert the spill to the stack frame.
605 // First assign frame offsets to stack objects that are used to spill
633 // Make sure the special register scavenging spill slot is closest to th
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64FrameLowering.cpp | 57 // | including spill slots |
666 // right thing for the emergency spill slot.
734 assert((Count & 1) == 0 && "Odd number of callee-saved regs to spill!");
749 assert((Count & 1) == 0 && "Odd number of callee-saved regs to spill!");
750 assert((i & 1) == 0 && "Odd index for callee-saved reg spill!");
752 // first spill is a pre-increment that allocates the stack.
763 // For first spill use pre-increment store.
771 // For first spill use pre-increment store.
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonExpandPredSpillCode.cpp | 1 //===-- HexagonExpandPredSpillCode.cpp - Expand Predicate Spill Code ------===//
60 return "Hexagon Expand Predicate Spill Code";
246 "Not a Frame Pointer, Nor a Spill Slot");
293 "Not a Frame Pointer, Nor a Spill Slot");
343 const char *Name = "Hexagon Expand Predicate Spill Code";
344 PassInfo *PI = new PassInfo(Name, "hexagon-spill-pred",
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| /external/v8/src/crankshaft/ia32/ |
| lithium-gap-resolver-ia32.cc | 239 // 3. Prefer to spill a register that is not used in any remaining move
282 // Spill on demand to use a temporary register for memory-to-memory
379 // spill on demand because the simple spill implementation cannot avoid
397 // Memory-memory. Spill on demand to use a temporary. If there is a
437 // Double-width memory-to-memory. Spill on demand to use a general
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| /art/compiler/jni/quick/arm64/ |
| calling_convention_arm64.cc | 109 // We spill the argument registers on ARM64 to free them up for scratch use, we then assume
179 // Compute spill mask to agree with callee saves initialized in the constructor.
213 // Plus return value spill area size
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| /art/compiler/jni/quick/mips/ |
| calling_convention_mips.cc | 94 // We spill the argument registers on MIPS to free them up for scratch use, we then assume
175 // Compute spill mask to agree with callee saves initialized in the constructor
191 // Plus return value spill area size
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| /external/llvm/include/llvm/CodeGen/ |
| RegisterScavenging.h | 13 // to spill slots.
42 /// Information on scavenged registers (held in a spill slot).
46 /// A spill slot used for scavenging a register post register allocation.
|
