| /art/compiler/utils/x86_64/ |
| assembler_x86_64.cc | 449 EmitOperand(dst.LowBits(), Operand(src));
458 EmitOperand(src.LowBits(), Operand(dst));
682 // Emit a REX.W prefix if the operand size is 64 bits.
689 EmitOperand(dst.LowBits(), Operand(src));
697 // Emit a REX.W prefix if the operand size is 64 bits.
717 // Emit a REX.W prefix if the operand size is 64 bits.
724 EmitOperand(dst.LowBits(), Operand(src));
732 // Emit a REX.W prefix if the operand size is 64 bits.
792 // Emit a REX.W prefix if the operand size is 64 bits.
812 // Emit a REX.W prefix if the operand size is 64 bits
[all...] |
| assembler_x86_64.h | 59 class Operand : public ValueObject {
108 // Operand can be sub classed (e.g: Address).
109 Operand() : rex_(0), length_(0), fixup_(nullptr) { }
156 explicit Operand(CpuRegister reg) : rex_(0), length_(0), fixup_(nullptr) { SetModRM(3, reg); }
158 // Get the operand encoding byte at the given index.
169 class Address : public Operand {
592 void shll(CpuRegister operand, CpuRegister shifter);
594 void shrl(CpuRegister operand, CpuRegister shifter);
596 void sarl(CpuRegister operand, CpuRegister shifter);
599 void shlq(CpuRegister operand, CpuRegister shifter)
[all...] |
| /external/llvm/lib/CodeGen/ |
| AggressiveAntiDepBreaker.h | 40 /// The registers operand
41 MachineOperand *Operand;
|
| MIRPrinter.cpp | 70 /// Maps from stack object indices to operand indices which will be used when
515 const auto &Operand = MI.getOperand(I);
516 if (!Operand.isReg() || Operand.isDef())
520 int TiedIdx = Operand.isTied() ? int(MI.findTiedOperandIdx(I)) : -1;
534 assert(MI.getNumOperands() == 1 && "Expected 1 operand in CFI instruction");
639 const FrameIndexOperand &Operand = ObjectInfo->second;
640 if (Operand.IsFixed) {
641 OS << "%fixed-stack." << Operand.ID;
644 OS << "%stack." << Operand.ID
[all...] |
| /external/v8/src/arm64/ |
| macro-assembler-arm64.cc | 57 const Operand& operand,
61 if (operand.NeedsRelocation(this)) {
63 Ldr(temp, operand.immediate());
66 } else if (operand.IsImmediate()) {
67 int64_t immediate = operand.ImmediateValue();
129 Operand imm_operand = MoveImmediateForShiftedOp(temp, immediate);
141 } else if (operand.IsExtendedRegister()) {
142 DCHECK(operand.reg().SizeInBits() <= rd.SizeInBits());
145 DCHECK(operand.shift_amount() <= 4)
[all...] |
| code-stubs-arm64.cc | 237 __ Cmp(right_type, Operand(HEAP_NUMBER_TYPE));
239 __ Tst(right_type, Operand(kIsNotStringMask));
260 __ Tst(right_type, Operand(kIsNotStringMask));
336 // If either operand is a JS object or an oddball value, then they are not
529 __ Sub(result, lhs, Operand::UntagSmi(rhs));
535 // certain that at least one operand isn't a smi.
546 // Exactly one operand is a smi. EmitSmiNonsmiComparison generates code that
[all...] |
| /external/v8/src/crankshaft/ia32/ |
| lithium-codegen-ia32.h | 60 Operand ToOperand(LOperand* op) const;
73 // The operand denoting the second word (the one with a higher address) of
75 Operand HighOperand(LOperand* op);
227 Operand BuildFastArrayOperand(LOperand* elements_pointer,
233 Operand BuildSeqStringOperand(Register string,
302 // register, or a stack slot operand.
303 void EmitPushTaggedOperand(LOperand* operand);
|
| /external/v8/src/crankshaft/mips64/ |
| lithium-gap-resolver-mips64.cc | 125 // No operand should be the destination for more than one move.
190 // Dispatch on the source and destination operand kinds. Not all
231 __ li(dst, Operand(cgen_->ToSmi(constant_source)));
233 __ li(dst, Operand(cgen_->ToInteger32(constant_source)));
245 __ li(kLithiumScratchReg, Operand(cgen_->ToSmi(constant_source)));
248 __ li(kLithiumScratchReg, Operand(cgen_->ToInteger32(constant_source)));
|
| /frameworks/compile/mclinker/lib/Script/ |
| RpnExpr.cpp | 12 #include "mcld/Script/Operand.h"
36 if ((*it)->kind() == ExprToken::OPERAND &&
37 llvm::cast<Operand>(*it)->isDot())
|
| /external/llvm/lib/Analysis/ |
| ScalarEvolutionNormalization.cpp | 29 static bool IVUseShouldUsePostIncValue(Instruction *User, Value *Operand,
48 if (!PN || !Operand) return false; // not a phi, not dominated by latch block.
50 // Look at all of the uses of Operand by the PHI node. If any use corresponds
54 if (PN->getIncomingValue(i) == Operand &&
58 // Okay, all uses of Operand by PN are in predecessor blocks that really are
113 // Transform each operand.
193 // Transform each operand.
201 // If any operand actually changed, return a transformed result.
|
| /external/llvm/lib/Target/AMDGPU/ |
| R600InstrInfo.h | 103 /// \returns The operand index for the given source number. Legal values
106 /// \returns The operand Index for the Sel operand given an index to one
237 /// modifier operand when building a new instruction.
275 /// \returns true if this instruction has an operand for storing target flags.
278 ///\brief Add one of the MO_FLAG* flags to the specified \p Operand.
279 void addFlag(MachineInstr *MI, unsigned Operand, unsigned Flag) const;
281 ///\brief Determine if the specified \p Flag is set on this \p Operand.
282 bool isFlagSet(const MachineInstr &MI, unsigned Operand, unsigned Flag) const;
287 /// \returns the operand containing the flags for this instruction
[all...] |
| /external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| HexagonMCInstrInfo.cpp | 144 llvm_unreachable("invalid extendable operand");
181 // Return constant extended operand number.
223 // Return the max value that a constant extendable operand can have
238 // Return the min value that a constant extendable operand can have
480 // Return whether the operand can be constant extended.
625 MCOperand &Operand = MCI.getOperand(0);
626 Operand.setImm(Operand.getImm() | innerLoopMask);
631 MCOperand &Operand = MCI.getOperand(0);
632 Operand.setImm(Operand.getImm() | memReorderDisabledMask)
[all...] |
| /external/v8/src/ic/arm64/ |
| ic-arm64.cc | 185 __ Cmp(key, Operand(Smi::FromInt(0)));
410 __ Mov(slot, Operand(Smi::FromInt(slot_index)));
501 Operand(masm->isolate()->factory()->fixed_array_map()));
510 __ Add(x10, x10, Operand::UntagSmiAndScale(key, kPointerSizeLog2));
531 __ Add(address, address, Operand::UntagSmiAndScale(key, kPointerSizeLog2));
557 __ Add(x10, x10, Operand::UntagSmiAndScale(key, kPointerSizeLog2));
664 __ Cmp(x10, Operand::UntagSmi(key));
692 __ Mov(slot, Operand(Smi::FromInt(slot_index)));
709 __ Cmp(x10, Operand::UntagSmi(key));
713 __ Cmp(elements_map, Operand(masm->isolate()->factory()->fixed_array_map()))
[all...] |
| stub-cache-arm64.cc | 48 __ Add(scratch3, offset, Operand(offset, LSL, 1));
52 __ Add(scratch, scratch, Operand(scratch3, LSL, kPointerSizeLog2));
147 __ Sub(scratch, scratch, Operand(name, LSR, kCacheIndexShift));
|
| /external/v8/src/ic/ppc/ |
| handler-compiler-ppc.cc | 119 __ addi(sp, sp, Operand(2 * kPointerSize));
141 __ andi(r0, scratch0, Operand(kInterceptorOrAccessCheckNeededMask));
146 __ cmpi(scratch0, Operand(FIRST_JS_RECEIVER_TYPE));
308 __ mov(api_function_address, Operand(ref));
350 __ mov(this->name(), Operand(name));
356 __ mov(this->name(), Operand(name));
440 __ mov(scratch1, Operand(validity_cell));
624 __ mov(scratch4(), Operand(ExternalReference::isolate_address(isolate())));
635 __ mov(getter_address_reg, Operand(ref));
723 __ mov(ip, Operand(callback))
[all...] |
| /external/v8/src/crankshaft/arm64/ |
| lithium-codegen-arm64.cc | 82 const Operand& rhs)
99 const Operand& rhs_;
386 __ Mov(slot_register, Operand(Smi::FromInt(index)));
404 __ Mov(x0, Operand(instr->arity()));
652 __ Mov(x10, Operand(info()->scope()->GetScopeInfo(info()->isolate())));
851 __ Mov(deopt_entry, Operand(reinterpret_cast<uint64_t>(base),
4529 MemOperand operand = local
4556 MemOperand operand = local
[all...] |
| /external/v8/src/arm/ |
| macro-assembler-arm.h | 142 void And(Register dst, Register src1, const Operand& src2,
158 void Usat(Register dst, int satpos, const Operand& src,
166 void Move(Register dst, Smi* smi) { mov(dst, Operand(smi)); }
169 void Move(Register dst, const Operand& src, SBit sbit = LeaveCC,
631 mov(kRootRegister, Operand(roots_array_start));
[all...] |
| /external/vixl/test/ |
| test-assembler-a64.cc | 53 // __ mov(x0, Operand(1));
254 __ Add(sp, sp, Operand(x17, SXTB));
292 __ Mvn(w2, Operand(w0, LSL, 1));
293 __ Mvn(x3, Operand(x1, LSL, 2));
294 __ Mvn(w4, Operand(w0, LSR, 3));
295 __ Mvn(x5, Operand(x1, LSR, 4));
296 __ Mvn(w6, Operand(w0, ASR, 11));
297 __ Mvn(x7, Operand(x1, ASR, 12));
298 __ Mvn(w8, Operand(w0, ROR, 13));
299 __ Mvn(x9, Operand(x1, ROR, 14))
[all...] |
| /art/compiler/utils/x86/ |
| assembler_x86.cc | 341 EmitOperand(0, Operand(dst));
385 EmitOperand(dst, Operand(src));
394 EmitOperand(src, Operand(dst));
646 EmitOperand(dst, Operand(src));
655 EmitOperand(dst, Operand(src));
1042 EmitComplex(7, Operand(reg), imm);
1049 EmitOperand(reg0, Operand(reg1));
1120 EmitOperand(0, Operand(reg));
1129 EmitOperand(dst, Operand(src));
1142 EmitComplex(4, Operand(dst), imm)
[all...] |
| /external/vixl/src/vixl/a64/ |
| assembler-a64.h | 649 // Operand.
650 class Operand {
654 // This is allowed to be an implicit constructor because Operand is
656 Operand(int64_t immediate = 0); // NOLINT(runtime/explicit)
661 // This is allowed to be an implicit constructor because Operand is
663 Operand(Register reg,
670 explicit Operand(Register reg, Extend extend, unsigned shift_amount = 0);
677 // This returns an LSL shift (<= 4) operand as an equivalent extend operand,
679 Operand ToExtendedRegister() const
[all...] |
| macro-assembler-a64.h | 608 const Operand& operand);
611 const Operand& operand);
614 const Operand& operand);
617 const Operand& operand);
620 const Operand& operand);
[all...] |
| /external/llvm/include/llvm/Analysis/ |
| ScalarEvolutionExpressions.h | 137 // Since SCEVs are immutable, ScalarEvolution allocates operand
151 assert(i < NumOperands && "Operand index out of range!");
218 // Use the type of the last operand, which is likely to be a pointer
570 const SCEV *Operand = ((SC*)this)->visit(Expr->getOperand());
571 return SE.getTruncateExpr(Operand, Expr->getType());
575 const SCEV *Operand = ((SC*)this)->visit(Expr->getOperand());
576 return SE.getZeroExtendExpr(Operand, Expr->getType());
580 const SCEV *Operand = ((SC*)this)->visit(Expr->getOperand());
581 return SE.getSignExtendExpr(Operand, Expr->getType());
|
| IVUsers.h | 35 /// instruction of the operand, and 'OperandValToReplace' is the operand of
54 /// getOperandValToReplace - Return the Value of the operand in the user
60 /// setOperandValToReplace - Assign a new Value as the operand value
80 /// OperandValToReplace - The Value of the operand in the user instruction
153 IVStrideUse &AddUser(Instruction *User, Value *Operand);
|
| /external/v8/src/crankshaft/x64/ |
| lithium-codegen-x64.h | 70 Operand ToOperand(LOperand* op) const;
222 Operand BuildFastArrayOperand(
229 Operand BuildSeqStringOperand(Register string,
275 // register, or a stack slot operand.
276 void EmitPushTaggedOperand(LOperand* operand);
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| R600InstrInfo.cpp | 498 void R600InstrInfo::addFlag(MachineInstr *MI, unsigned Operand,
502 FlagOp.setImm(FlagOp.getImm() | (Flag << (NUM_MO_FLAGS * Operand)));
505 void R600InstrInfo::clearFlag(MachineInstr *MI, unsigned Operand,
510 InstFlags &= ~(Flag << (NUM_MO_FLAGS * Operand));
|
