/external/llvm/lib/Transforms/InstCombine/ |
InstCombineShifts.cpp | 66 /// %F = lshr i128 %E, 64 90 // lshr iff we know that the bits we would otherwise be shifting in are 142 case Instruction::LShr: { 147 // We can always fold lshr(c1)+lshr(c2) -> lshr(c1+c2). 150 // We can always turn lshr(c)+shl(c) -> and(c2). 155 // We can always turn lshr(c1)+shl(c2) -> lshr(c3)+and(c4), but it isn't 238 // We turn shl(c)+lshr(c) -> and(c2) if the input doesn't already hav [all...] |
InstCombineMulDivRem.cpp | 60 if (I->getOpcode() == Instruction::LShr && !I->isExact()) { [all...] |
InstCombineVectorOps.cpp | 574 case Instruction::LShr: 637 case Instruction::LShr: 737 case Instruction::LShr: [all...] |
InstCombineCompares.cpp | [all...] |
InstCombineSelect.cpp | 91 case Instruction::LShr: 109 case Instruction::LShr: [all...] |
/external/llvm/lib/Transforms/Scalar/ |
SpeculativeExecution.cpp | 182 case Instruction::LShr:
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LoopRotation.cpp | 442 case Instruction::LShr:
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/external/llvm/include/llvm/IR/ |
Operator.h | 149 OpC == Instruction::LShr; 357 : public ConcreteOperator<PossiblyExactOperator, Instruction::LShr> {
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Instruction.h | 132 return getOpcode() == Shl || getOpcode() == LShr;
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PatternMatch.h | 530 inline BinaryOp_match<LHS, RHS, Instruction::LShr> m_LShr(const LHS &L, 532 return BinaryOp_match<LHS, RHS, Instruction::LShr>(L, R); 655 /// \brief Matches LShr or AShr. 657 inline BinOp2_match<LHS, RHS, Instruction::LShr, Instruction::AShr> 659 return BinOp2_match<LHS, RHS, Instruction::LShr, Instruction::AShr>(L, R); 662 /// \brief Matches LShr or Shl. 664 inline BinOp2_match<LHS, RHS, Instruction::LShr, Instruction::Shl> 666 return BinOp2_match<LHS, RHS, Instruction::LShr, Instruction::Shl>(L, R); [all...] |
/external/llvm/include/llvm/MC/ |
MCExpr.h | 430 LShr, ///< Logical shift right. 514 return create(LShr, LHS, RHS, Ctx);
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/external/llvm/lib/Target/SystemZ/ |
SystemZTargetTransformInfo.cpp | 157 case Instruction::LShr:
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/external/llvm/lib/Target/XCore/ |
XCoreLowerThreadLocal.cpp | 99 case Instruction::LShr:
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/external/llvm/lib/Transforms/Utils/ |
SimplifyIndVar.cpp | 101 case Instruction::LShr: 119 if (UseInst->getOpcode() == Instruction::LShr) {
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/external/llvm/lib/Analysis/ |
DemandedBits.cpp | 146 AB = AOut.lshr(ShiftAmt); 157 case Instruction::LShr:
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CostModel.cpp | 404 case Instruction::LShr:
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ObjCARCInstKind.cpp | 280 case Instruction::LShr:
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/external/llvm/lib/Target/PowerPC/ |
PPCTargetTransformInfo.cpp | 136 case Instruction::LShr:
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PPCCTRLoops.cpp | 409 J->getOpcode() == Instruction::LShr)) {
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/external/mesa3d/src/gallium/drivers/radeon/ |
AMDILPeepholeOptimizer.cpp | 602 LHSSrc = BinaryOperator::Create(Instruction::LShr, LHSSrc, offset, 605 LHSSrc = BinaryOperator::Create(Instruction::LShr, LHSSrc, offset, 624 LHSSrc = BinaryOperator::Create(Instruction::LShr, LHSSrc, offset, 627 LHSSrc = BinaryOperator::Create(Instruction::LShr, LHSSrc, offset, [all...] |
/external/llvm/lib/IR/ |
Instruction.cpp | 260 case LShr: return "lshr";
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ConstantFold.cpp | 225 V = V.lshr(ByteStart*8); 266 case Instruction::LShr: { [all...] |
/external/llvm/lib/MC/ |
MCExpr.cpp | 104 case MCBinaryExpr::LShr: OS << ">>"; break; 760 case MCBinaryExpr::LShr: Result = uint64_t(LHS) >> uint64_t(RHS); break;
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/external/llvm/lib/Target/Mips/ |
MipsFastISel.cpp | [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64TargetTransformInfo.cpp | 101 case Instruction::LShr:
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