| /external/llvm/lib/Target/X86/InstPrinter/ |
| X86InstComments.cpp | 40 unsigned OpReg = MI->getOperand(OperandIndex).getReg();
221 Src2Name = getRegName(MI->getOperand(2).getReg());
226 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
228 MI->getOperand(MI->getNumOperands() - 1).getImm(),
230 Src1Name = getRegName(MI->getOperand(1).getReg());
231 DestName = getRegName(MI->getOperand(0).getReg());
237 Src2Name = getRegName(MI->getOperand(2).getReg());
242 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
244 MI->getOperand(MI->getNumOperands() - 1).getImm(),
246 Src1Name = getRegName(MI->getOperand(1).getReg())
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCVSXFMAMutate.cpp | 105 LIS->getInterval(MI->getOperand(1).getReg()).Query(FMAIdx).valueIn();
123 unsigned AddendSrcReg = AddendMI->getOperand(1).getReg();
125 if (MRI.getRegClass(AddendMI->getOperand(0).getReg()) !=
131 if (!MRI.getRegClass(AddendMI->getOperand(0).getReg())
157 if (J->readsVirtualRegister(AddendMI->getOperand(0).getReg())) {
174 if (LIS->getInterval(MI->getOperand(2).getReg())
178 } else if (LIS->getInterval(MI->getOperand(3).getReg())
200 unsigned KilledProdReg = MI->getOperand(KilledProdOp).getReg();
201 unsigned OtherProdReg = MI->getOperand(OtherProdOp).getReg();
203 unsigned AddSubReg = AddendMI->getOperand(1).getSubReg()
[all...] |
| PPCMIPeephole.cpp | 109 int Immed = MI.getOperand(3).getImm();
119 unsigned TrueReg1 = lookThruCopyLike(MI.getOperand(1).getReg());
120 unsigned TrueReg2 = lookThruCopyLike(MI.getOperand(2).getReg());
129 unsigned FeedImmed = DefMI->getOperand(3).getImm();
131 = lookThruCopyLike(DefMI->getOperand(1).getReg());
133 = lookThruCopyLike(DefMI->getOperand(2).getReg());
141 TII->get(PPC::COPY), MI.getOperand(0).getReg())
142 .addOperand(MI.getOperand(1));
154 MI.getOperand(1).setReg(DefMI->getOperand(1).getReg())
[all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| R600ClauseMergePass.cpp | 76 return MI->getOperand(
82 return MI->getOperand(
99 CFAlu->getOperand(CntIdx).setImm(getCFAluSize(CFAlu) + getCFAluSize(MI));
124 if (LatrCFAlu->getOperand(Mode0Idx).getImm() &&
125 RootCFAlu->getOperand(Mode0Idx).getImm() &&
126 (LatrCFAlu->getOperand(KBank0Idx).getImm() !=
127 RootCFAlu->getOperand(KBank0Idx).getImm() ||
128 LatrCFAlu->getOperand(KBank0LineIdx).getImm() !=
129 RootCFAlu->getOperand(KBank0LineIdx).getImm())) {
140 if (LatrCFAlu->getOperand(Mode1Idx).getImm() &
[all...] |
| SIFixSGPRCopies.cpp | 118 if (!MI.getOperand(i).isReg() ||
119 !TargetRegisterInfo::isVirtualRegister(MI.getOperand(i).getReg()))
122 if (TRI->hasVGPRs(MRI.getRegClass(MI.getOperand(i).getReg())))
132 unsigned DstReg = Copy.getOperand(0).getReg();
133 unsigned SrcReg = Copy.getOperand(1).getReg();
141 // SrcRC = TRI.getSubRegClass(SrcRC, Copy.getOperand(1).getSubReg());
182 unsigned DstReg = MI.getOperand(0).getReg();
200 unsigned SubReg = CopyUse.getOperand(1).getSubReg();
214 MI.getOperand(0).setReg(CopyUse.getOperand(0).getReg())
[all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZAsmPrinter.cpp | 34 .addReg(SystemZMC::getRegAsGR32(MI->getOperand(0).getReg()))
35 .addImm(MI->getOperand(1).getImm());
38 .addReg(SystemZMC::getRegAsGR32(MI->getOperand(0).getReg()))
39 .addReg(SystemZMC::getRegAsGR32(MI->getOperand(1).getReg()))
40 .addImm(MI->getOperand(2).getImm());
48 .addReg(SystemZMC::getRegAsGRH32(MI->getOperand(0).getReg()))
49 .addImm(MI->getOperand(1).getImm());
52 .addReg(SystemZMC::getRegAsGRH32(MI->getOperand(0).getReg()))
53 .addReg(SystemZMC::getRegAsGRH32(MI->getOperand(1).getReg()))
54 .addImm(MI->getOperand(2).getImm())
[all...] |
| SystemZShortenInst.cpp | 65 !MI.getOperand(0).isTied())
74 unsigned Reg = MI.getOperand(0).getReg();
87 uint64_t Imm = MI.getOperand(1).getImm();
90 MI.getOperand(0).setReg(SystemZMC::getRegAsGR64(Reg));
95 MI.getOperand(0).setReg(SystemZMC::getRegAsGR64(Reg));
96 MI.getOperand(1).setImm(Imm >> 16);
104 if (SystemZMC::getFirstReg(MI.getOperand(0).getReg()) < 16) {
114 if (SystemZMC::getFirstReg(MI.getOperand(0).getReg()) < 16 &&
115 SystemZMC::getFirstReg(MI.getOperand(1).getReg()) < 16) {
126 if (SystemZMC::getFirstReg(MI.getOperand(0).getReg()) < 16 &
[all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelDAGToDAG.cpp | 98 if ((FIN = dyn_cast<FrameIndexSDNode>(Addr.getOperand(0)))
99 && (CN = dyn_cast<ConstantSDNode>(Addr.getOperand(1)))
129 OutOps.push_back(Op.getOperand(0));
163 SDValue Ops[] = { N->getOperand(0), N->getOperand(1),
164 N->getOperand(2) };
169 SDValue Ops[] = { N->getOperand(0), N->getOperand(1),
170 N->getOperand(2) };
175 SDValue Ops[] = { N->getOperand(0), N->getOperand(1)
[all...] |
| /external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| HexagonMCCompound.cpp | 100 DstReg = MI.getOperand(0).getReg();
101 Src1Reg = MI.getOperand(1).getReg();
102 Src2Reg = MI.getOperand(2).getReg();
114 DstReg = MI.getOperand(0).getReg();
115 SrcReg = MI.getOperand(1).getReg();
126 DstReg = MI.getOperand(0).getReg();
127 SrcReg = MI.getOperand(1).getReg();
136 DstReg = MI.getOperand(0).getReg();
145 DstReg = MI.getOperand(0).getReg();
146 Src1Reg = MI.getOperand(1).getReg()
[all...] |
| HexagonMCDuplexInfo.cpp | 192 DstReg = MCI.getOperand(0).getReg();
193 SrcReg = MCI.getOperand(1).getReg();
210 DstReg = MCI.getOperand(0).getReg();
211 SrcReg = MCI.getOperand(1).getReg();
231 DstReg = MCI.getOperand(0).getReg();
232 SrcReg = MCI.getOperand(1).getReg();
241 DstReg = MCI.getOperand(0).getReg();
242 SrcReg = MCI.getOperand(1).getReg();
251 DstReg = MCI.getOperand(0).getReg();
252 SrcReg = MCI.getOperand(1).getReg()
[all...] |
| /external/mesa3d/src/gallium/drivers/radeon/ |
| R600ISelLowering.cpp | 66 .addOperand(MI->getOperand(0))
67 .addOperand(MI->getOperand(1))
77 .addOperand(MI->getOperand(0))
78 .addOperand(MI->getOperand(1))
89 .addOperand(MI->getOperand(0))
90 .addOperand(MI->getOperand(1))
99 int64_t RegIndex = MI->getOperand(1).getImm();
102 .addOperand(MI->getOperand(0))
109 unsigned maskedRegister = MI->getOperand(0).getReg();
135 .addOperand(MI->getOperand(1)
[all...] |
| SIISelLowering.cpp | 83 .addOperand(MI->getOperand(0))
84 .addOperand(MI->getOperand(1))
87 .addOperand(MI->getOperand(1))
88 .addOperand(MI->getOperand(1))
98 .addOperand(MI->getOperand(0))
99 .addOperand(MI->getOperand(1))
102 .addOperand(MI->getOperand(1))
103 .addOperand(MI->getOperand(1))
113 .addOperand(MI->getOperand(0))
114 .addOperand(MI->getOperand(1)
[all...] |
| /external/llvm/unittests/IR/ |
| MDBuilderTest.cpp | 39 Metadata *Op = MD1->getOperand(0);
53 EXPECT_TRUE(mdconst::hasa<ConstantInt>(R1->getOperand(0)));
54 EXPECT_TRUE(mdconst::hasa<ConstantInt>(R1->getOperand(1)));
55 ConstantInt *C0 = mdconst::extract<ConstantInt>(R1->getOperand(0));
56 ConstantInt *C1 = mdconst::extract<ConstantInt>(R1->getOperand(1));
67 EXPECT_EQ(R0->getOperand(0), R0);
68 EXPECT_EQ(R1->getOperand(0), R1);
69 EXPECT_TRUE(R0->getNumOperands() == 1 || R0->getOperand(1) == nullptr);
70 EXPECT_TRUE(R1->getNumOperands() == 1 || R1->getOperand(1) == nullptr);
78 EXPECT_TRUE(isa<MDString>(R0->getOperand(0)))
[all...] |
| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| MipsMCCodeEmitter.cpp | 55 assert(Inst.getOperand(2).isImm());
57 int64_t Shift = Inst.getOperand(2).getImm();
63 Inst.getOperand(2).setImm(Shift);
95 assert(InstIn.getOperand(2).isImm());
96 int64_t pos = InstIn.getOperand(2).getImm();
97 assert(InstIn.getOperand(3).isImm());
98 int64_t size = InstIn.getOperand(3).getImm();
104 InstIn.getOperand(2).setImm(pos - 32);
110 InstIn.getOperand(3).setImm(size - 32);
225 const MCOperand &MO = MI.getOperand(OpNo)
[all...] |
| /external/llvm/lib/Target/ARM/InstPrinter/ |
| ARMInstPrinter.cpp | 79 switch (MI->getOperand(0).getImm()) {
115 const MCOperand &Dst = MI->getOperand(0);
116 const MCOperand &MO1 = MI->getOperand(1);
117 const MCOperand &MO2 = MI->getOperand(2);
118 const MCOperand &MO3 = MI->getOperand(3);
138 const MCOperand &Dst = MI->getOperand(0);
139 const MCOperand &MO1 = MI->getOperand(1);
140 const MCOperand &MO2 = MI->getOperand(2);
165 if (MI->getOperand(0).getReg() == ARM::SP && MI->getNumOperands() > 5) {
179 if (MI->getOperand(2).getReg() == ARM::SP &
[all...] |
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXISelDAGToDAG.cpp | 515 unsigned IID = cast<ConstantSDNode>(N->getOperand(1))->getZExtValue();
583 unsigned IID = cast<ConstantSDNode>(N->getOperand(0))->getZExtValue();
594 SDValue Wrapper = N->getOperand(1);
595 SDValue GlobalVal = Wrapper.getOperand(0);
601 SDValue Src = N->getOperand(0);
719 SDValue Chain = N->getOperand(0);
720 SDValue N1 = N->getOperand(1);
899 SDValue Chain = N->getOperand(0);
900 SDValue Op1 = N->getOperand(1);
941 N->getOperand(N->getNumOperands() - 1))->getZExtValue()
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonPeephole.cpp | 139 MachineOperand &Dst = MI->getOperand(0);
140 MachineOperand &Src = MI->getOperand(1);
158 MachineOperand &Dst = MI->getOperand(0);
159 MachineOperand &Src1 = MI->getOperand(1);
160 MachineOperand &Src2 = MI->getOperand(2);
175 MachineOperand &Dst = MI->getOperand(0);
176 MachineOperand &Src1 = MI->getOperand(1);
177 MachineOperand &Src2 = MI->getOperand(2);
190 MachineOperand &Dst = MI->getOperand(0);
191 MachineOperand &Src = MI->getOperand(1)
[all...] |
| HexagonNewValueJump.cpp | 152 if (II->getOperand(i).isReg() &&
153 (II->getOperand(i).isUse() || II->getOperand(i).isDef())) {
156 unsigned Reg = II->getOperand(i).getReg();
227 int64_t v = MI->getOperand(2).getImm();
237 cmpReg1 = MI->getOperand(1).getReg();
240 cmpOp2 = MI->getOperand(2).getReg();
459 predReg = MI->getOperand(0).getReg();
464 // if(!jmpInstr->getOperand(0).isKill()) break;
488 jmpTarget = MI->getOperand(1).getMBB()
[all...] |
| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| ARMMCTargetDesc.cpp | 38 (MI.getOperand(0).isImm() && MI.getOperand(0).getImm() == 15) &&
39 (MI.getOperand(1).isImm() && MI.getOperand(1).getImm() == 0) &&
42 (MI.getOperand(3).isImm() && MI.getOperand(3).getImm() == 7)) {
43 if ((MI.getOperand(5).isImm() && MI.getOperand(5).getImm() == 4)) {
44 if (MI.getOperand(4).isImm() && MI.getOperand(4).getImm() == 5)
[all...] |
| /external/llvm/lib/CodeGen/ |
| AntiDepBreaker.h | 60 if (MI && MI->getOperand(0).isReg() && MI->getOperand(0).getReg() == OldReg)
61 MI->getOperand(0).setReg(NewReg);
|
| /external/llvm/lib/Target/ARM/ |
| ARMOptimizeBarriersPass.cpp | 66 if (MI.getOperand(0).getImm() == DMBType) {
71 DMBType = MI.getOperand(0).getImm();
76 DMBType = MI.getOperand(0).getImm();
|
| ARMFeatures.h | 79 return Instr->getOperand(2).getReg() != ARM::PC;
84 return Instr->getOperand(0).getReg() != ARM::PC;
86 return Instr->getOperand(0).getReg() != ARM::PC &&
87 Instr->getOperand(2).getReg() != ARM::PC;
90 return Instr->getOperand(0).getReg() != ARM::PC &&
91 Instr->getOperand(1).getReg() != ARM::PC;
|
| /external/llvm/lib/Target/BPF/ |
| BPFRegisterInfo.cpp | 54 while (!MI.getOperand(i).isFI()) {
60 int FrameIndex = MI.getOperand(i).getIndex();
67 MI.getOperand(i).ChangeToRegister(FrameReg, false);
68 unsigned reg = MI.getOperand(i - 1).getReg();
76 MI.getOperand(i + 1).getImm();
85 unsigned reg = MI.getOperand(i - 1).getReg();
96 MI.getOperand(i).ChangeToRegister(FrameReg, false);
97 MI.getOperand(i + 1).ChangeToImmediate(Offset);
|
| /external/llvm/lib/Target/SystemZ/InstPrinter/ |
| SystemZInstPrinter.cpp | 65 int64_t Value = MI->getOperand(OpNum).getImm();
72 int64_t Value = MI->getOperand(OpNum).getImm();
139 uint64_t Value = MI->getOperand(OpNum).getImm();
146 const MCOperand &MO = MI->getOperand(OpNum);
161 const MCOperand &MO = MI->getOperand(OpNum + 1);
179 printOperand(MI->getOperand(OpNum), &MAI, O);
184 printAddress(MI->getOperand(OpNum).getReg(),
185 MI->getOperand(OpNum + 1).getImm(), 0, O);
190 printAddress(MI->getOperand(OpNum).getReg(),
191 MI->getOperand(OpNum + 1).getImm()
[all...] |
| /external/llvm/lib/Target/PowerPC/InstPrinter/ |
| PPCInstPrinter.cpp | 60 unsigned char SH = MI->getOperand(2).getImm();
61 unsigned char MB = MI->getOperand(3).getImm();
62 unsigned char ME = MI->getOperand(4).getImm();
83 MI->getOperand(1).getReg() == MI->getOperand(2).getReg()) {
93 unsigned char SH = MI->getOperand(2).getImm();
94 unsigned char ME = MI->getOperand(3).getImm();
116 unsigned char TH = MI->getOperand(0).getImm();
159 unsigned Code = MI->getOperand(OpNo).getImm();
255 unsigned int Value = MI->getOperand(OpNo).getImm()
[all...] |
