| /prebuilts/go/linux-x86/src/cmd/compile/internal/ssa/ |
| rewriteS390X.go | 10 switch v.Op {
[all...] |
| copyelim.go | 20 if v := b.Control; v != nil && v.Op == OpCopy {
29 if v.Op == OpCopy {
36 // copySource returns the (non-copy) op which is the
37 // ultimate source of v. v must be a copy op.
42 // for w.Op == OpCopy {
51 for w.Op == OpCopy {
78 if a.Op == OpCopy {
|
| /prebuilts/go/linux-x86/src/regexp/syntax/ |
| simplify.go | 18 switch re.Op {
39 return simplify1(re.Op, re.Flags, sub, re)
45 return &Regexp{Op: OpEmptyMatch}
64 nre := &Regexp{Op: OpConcat}
87 prefix = &Regexp{Op: OpConcat}
98 nre2 := &Regexp{Op: OpConcat}
113 return &Regexp{Op: OpNoMatch}
123 // Regexp{Op: op, Flags: flags, Sub: {sub}}
134 func simplify1(op Op, flags Flags, sub, re *Regexp) *Regexp
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonExpandCondsets.cpp | 216 RegisterRef(const MachineOperand &Op) : Reg(Op.getReg()),
217 Sub(Op.getSubReg()) {}
350 for (auto &Op : MI->operands()) {
351 if (!Op.isReg() || !Op.isUse() || Op.getReg() != Reg)
353 LaneBitmask SLM = getLaneMask(Reg, Op.getSubReg());
357 Op.setIsKill(true);
411 auto IsRegDef = [this,Reg,LM] (MachineOperand &Op) -> bool
[all...] |
| /external/eigen/unsupported/Eigen/CXX11/src/util/ |
| EmulateCXX11Meta.h | 257 template<typename Reducer, typename Op, typename A, std::size_t N>
261 bool result = Reducer::run(Op::run(a[0]), Op::run(a[1]));
263 result = Reducer::run(result, Op::run(a[i]));
269 template<typename Reducer, typename Op, typename A>
270 struct ArrayApplyAndReduce<Reducer, Op, A, 1> {
272 return Op::run(a[0]);
276 template<typename Reducer, typename Op, typename A, std::size_t N>
278 return ArrayApplyAndReduce<Reducer, Op, A, N>::run(a);
281 template<typename Reducer, typename Op, typename A, typename B, std::size_t N
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| TargetLowering.cpp | 125 for (SDValue Op : Ops) {
126 Entry.Node = Op;
128 Entry.isSExt = shouldSignExtendTypeInLibCall(Op.getValueType(), isSigned);
129 Entry.isZExt = !shouldSignExtendTypeInLibCall(Op.getValueType(), isSigned);
340 bool TargetLowering::TargetLoweringOpt::ShrinkDemandedConstant(SDValue Op,
342 SDLoc dl(Op);
345 switch (Op.getOpcode()) {
350 ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1));
353 if (Op.getOpcode() == ISD::XOR &&
359 EVT VT = Op.getValueType()
[all...] |
| LegalizeTypes.h | 165 SDValue BitConvertToInteger(SDValue Op);
166 SDValue BitConvertVectorToIntegerVector(SDValue Op);
167 SDValue CreateStackStoreLoad(SDValue Op, EVT DestVT);
191 void SplitInteger(SDValue Op, SDValue &Lo, SDValue &Hi);
192 void SplitInteger(SDValue Op, EVT LoVT, EVT HiVT,
199 /// Given a processed operand Op which was promoted to a larger integer type,
201 /// corresponding to the original type are exactly equal to Op.
205 /// For example, if Op is an i16 and was promoted to an i32, then this method
206 /// returns an i32, the lower 16 bits of which coincide with Op, and the upper
208 SDValue GetPromotedInteger(SDValue Op) {
[all...] |
| /external/llvm/lib/Target/NVPTX/InstPrinter/ |
| NVPTXInstPrinter.cpp | 80 const MCOperand &Op = MI->getOperand(OpNo);
81 if (Op.isReg()) {
82 unsigned Reg = Op.getReg();
84 } else if (Op.isImm()) {
85 O << markup("<imm:") << formatImm(Op.getImm()) << markup(">");
87 assert(Op.isExpr() && "Unknown operand kind in printOperand");
88 Op.getExpr()->print(O, &MAI);
281 const MCOperand &Op = MI->getOperand(OpNum);
282 assert(Op.isExpr() && "Call prototype is not an MCExpr?");
283 const MCExpr *Expr = Op.getExpr()
[all...] |
| /external/llvm/lib/Target/WebAssembly/InstPrinter/ |
| WebAssemblyInstPrinter.cpp | 139 const MCOperand &Op = MI->getOperand(OpNo);
140 if (Op.isReg()) {
144 unsigned WAReg = Op.getReg();
156 } else if (Op.isImm()) {
166 O << Op.getImm();
167 } else if (Op.isFPImm()) {
177 O << toString(APFloat(float(Op.getFPImm())));
180 O << toString(APFloat(Op.getFPImm()));
188 assert(Op.isExpr() && "unknown operand kind in printOperand");
189 Op.getExpr()->print(O, &MAI)
[all...] |
| /external/spirv-llvm/lib/SPIRV/libSPIRV/ |
| SPIRVDecorate.h | 55 SPIRVDecorateGeneric(Op OC, SPIRVWord WC, Decoration TheDec,
58 SPIRVDecorateGeneric(Op OC, SPIRVWord WC, Decoration TheDec,
61 SPIRVDecorateGeneric(Op OC);
129 static const Op OC = OpDecorate;
199 static const Op OC = OpMemberDecorate;
234 static const Op OC = OpDecorationGroup;
269 SPIRVGroupDecorateGeneric(Op OC, SPIRVDecorationGroup *TheGroup,
276 SPIRVGroupDecorateGeneric(Op OC)
292 static const Op OC = OpGroupDecorate;
306 static const Op OC = OpGroupMemberDecorate
[all...] |
| /frameworks/base/tests/FrameworkPerf/src/com/android/frameworkperf/ |
| TestService.java | 60 final static Op[] mOpPairs = new Op[] {
116 final static Op[] mAvailOps = new Op[] {
244 Op mForegroundOp;
245 Op mBackgroundOp;
416 RunnerThread(String name, Runnable op, int priority) {
418 mOp = op;
428 static public abstract class Op {
432 public Op(String name, String longName)
[all...] |
| /prebuilts/go/darwin-x86/src/cmd/compile/internal/ssa/ |
| copyelim.go | 20 if v := b.Control; v != nil && v.Op == OpCopy {
29 if v.Op == OpCopy {
36 // copySource returns the (non-copy) op which is the
37 // ultimate source of v. v must be a copy op.
42 // for w.Op == OpCopy {
51 for w.Op == OpCopy {
78 if a.Op == OpCopy {
|
| lower.go | 20 if !opcodeTable[v.Op].generic {
23 switch v.Op {
32 s := "not lowered: " + v.String() + ", " + v.Op.String() + " " + v.Type.SimpleString()
|
| /external/swiftshader/third_party/LLVM/lib/Target/Sparc/ |
| SparcISelLowering.cpp | [all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| X86ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.h | 250 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
393 SDValue lowerLOAD(SDValue Op, SelectionDAG &DAG) const;
394 SDValue lowerSTORE(SDValue Op, SelectionDAG &DAG) const;
431 SDValue lowerBR_JT(SDValue Op, SelectionDAG &DAG) const;
432 SDValue lowerBRCOND(SDValue Op, SelectionDAG &DAG) const;
433 SDValue lowerConstantPool(SDValue Op, SelectionDAG &DAG) const;
434 SDValue lowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
435 SDValue lowerBlockAddress(SDValue Op, SelectionDAG &DAG) const;
436 SDValue lowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const;
437 SDValue lowerJumpTable(SDValue Op, SelectionDAG &DAG) const
[all...] |
| /external/v8/src/ |
| objects-body-descriptors-inl.h | 431 template <typename Op, typename ReturnType, typename T1, typename T2,
439 return Op::template apply<ConsString::BodyDescriptor>(p1, p2, p3);
441 return Op::template apply<SlicedString::BodyDescriptor>(p1, p2, p3);
444 return Op::template apply<ExternalOneByteString::BodyDescriptor>(
447 return Op::template apply<ExternalTwoByteString::BodyDescriptor>(
457 return Op::template apply<FixedArray::BodyDescriptor>(p1, p2, p3);
461 return Op::template apply<TransitionArray::BodyDescriptor>(p1, p2, p3);
524 return Op::template apply<JSObject::BodyDescriptor>(p1, p2, p3);
527 return Op::template apply<JSWeakCollection::BodyDescriptor>(p1, p2, p3);
529 return Op::template apply<JSArrayBuffer::BodyDescriptor>(p1, p2, p3)
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
| SPUISelLowering.cpp | 61 ExpandLibCall(RTLIB::Libcall LC, SDValue Op, SelectionDAG &DAG,
70 for (unsigned i = 0, e = Op.getNumOperands(); i != e; ++i) {
71 EVT ArgVT = Op.getOperand(i).getValueType();
73 Entry.Node = Op.getOperand(i);
84 Op.getNode()->getValueType(0).getTypeForEVT(*DAG.getContext());
89 Callee, Args, DAG, Op.getDebugLoc());
549 LowerLOAD(SDValue Op, SelectionDAG &DAG, const SPUSubtarget *ST) {
550 LoadSDNode *LN = cast<LoadSDNode>(Op);
554 EVT OutVT = Op.getValueType();
558 DebugLoc dl = Op.getDebugLoc()
[all...] |
| /external/llvm/lib/Target/ARM/InstPrinter/ |
| ARMInstPrinter.cpp | 274 const MCOperand &Op = MI->getOperand(OpNo);
275 if (Op.isReg()) {
276 unsigned Reg = Op.getReg();
278 } else if (Op.isImm()) {
279 O << markup("<imm:") << '#' << formatImm(Op.getImm()) << markup(">");
281 assert(Op.isExpr() && "unknown operand kind in printOperand");
282 const MCExpr *Expr = Op.getExpr();
379 void ARMInstPrinter::printAM2PreOrOffsetIndexOp(const MCInst *MI, unsigned Op,
382 const MCOperand &MO1 = MI->getOperand(Op);
383 const MCOperand &MO2 = MI->getOperand(Op + 1)
[all...] |
| /external/llvm/lib/Target/Hexagon/Disassembler/ |
| HexagonDisassembler.cpp | 101 static unsigned GetSubinstOpcode(unsigned IClass, unsigned inst, unsigned &op,
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86FixupSetCC.cpp | 104 for (auto &Op : MI->implicit_operands())
105 if ((Op.getReg() == X86::EFLAGS) && (Op.isDef()))
112 for (auto &Op : MI->implicit_operands())
113 if ((Op.getReg() == X86::EFLAGS) && (Op.isUse()))
|
| /external/llvm/utils/TableGen/ |
| DAGISelEmitter.cpp | 46 Record *Op = P->getOperator();
47 if (Op->isSubClassOf("Instruction")) {
49 CodeGenInstruction &II = CGP.getTargetInfo().getInstruction(Op);
65 Record *Op = P->getOperator();
66 if (Op->isSubClassOf("Instruction")) {
67 Cost += Op->getValueAsInt("CodeSize");
|
| /external/swiftshader/third_party/LLVM/lib/Target/SystemZ/ |
| SystemZISelLowering.h | 63 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
74 SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const;
75 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;
76 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
77 SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) const;
78 SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG) const;
|
| /external/swiftshader/third_party/LLVM/utils/TableGen/ |
| DAGISelEmitter.cpp | 32 Record *Op = P->getOperator();
33 if (Op->isSubClassOf("Instruction")) {
35 CodeGenInstruction &II = CGP.getTargetInfo().getInstruction(Op);
51 Record *Op = P->getOperator();
52 if (Op->isSubClassOf("Instruction")) {
53 Cost += Op->getValueAsInt("CodeSize");
|
| /frameworks/base/libs/hwui/ |
| ClipArea.h | 148 SkRegion::Op op);
150 SkRegion::Op op);
185 void rectangleModeClipRectWithTransform(const Rect& r, const mat4* transform, SkRegion::Op op);
189 const mat4* transform, SkRegion::Op op);
195 SkRegion::Op op);
[all...] |
