1 // arm.cc -- arm target support for gold. 2 3 // Copyright (C) 2009-2016 Free Software Foundation, Inc. 4 // Written by Doug Kwan <dougkwan (at) google.com> based on the i386 code 5 // by Ian Lance Taylor <iant (at) google.com>. 6 // This file also contains borrowed and adapted code from 7 // bfd/elf32-arm.c. 8 9 // This file is part of gold. 10 11 // This program is free software; you can redistribute it and/or modify 12 // it under the terms of the GNU General Public License as published by 13 // the Free Software Foundation; either version 3 of the License, or 14 // (at your option) any later version. 15 16 // This program is distributed in the hope that it will be useful, 17 // but WITHOUT ANY WARRANTY; without even the implied warranty of 18 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 // GNU General Public License for more details. 20 21 // You should have received a copy of the GNU General Public License 22 // along with this program; if not, write to the Free Software 23 // Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, 24 // MA 02110-1301, USA. 25 26 #include "gold.h" 27 28 #include <cstring> 29 #include <limits> 30 #include <cstdio> 31 #include <string> 32 #include <algorithm> 33 #include <map> 34 #include <utility> 35 #include <set> 36 37 #include "elfcpp.h" 38 #include "parameters.h" 39 #include "reloc.h" 40 #include "arm.h" 41 #include "object.h" 42 #include "symtab.h" 43 #include "layout.h" 44 #include "output.h" 45 #include "copy-relocs.h" 46 #include "target.h" 47 #include "target-reloc.h" 48 #include "target-select.h" 49 #include "tls.h" 50 #include "defstd.h" 51 #include "gc.h" 52 #include "attributes.h" 53 #include "arm-reloc-property.h" 54 #include "nacl.h" 55 56 namespace 57 { 58 59 using namespace gold; 60 61 template<bool big_endian> 62 class Output_data_plt_arm; 63 64 template<bool big_endian> 65 class Output_data_plt_arm_short; 66 67 template<bool big_endian> 68 class Output_data_plt_arm_long; 69 70 template<bool big_endian> 71 class Stub_table; 72 73 template<bool big_endian> 74 class Arm_input_section; 75 76 class Arm_exidx_cantunwind; 77 78 class Arm_exidx_merged_section; 79 80 class Arm_exidx_fixup; 81 82 template<bool big_endian> 83 class Arm_output_section; 84 85 class Arm_exidx_input_section; 86 87 template<bool big_endian> 88 class Arm_relobj; 89 90 template<bool big_endian> 91 class Arm_relocate_functions; 92 93 template<bool big_endian> 94 class Arm_output_data_got; 95 96 template<bool big_endian> 97 class Target_arm; 98 99 // For convenience. 100 typedef elfcpp::Elf_types<32>::Elf_Addr Arm_address; 101 102 // Maximum branch offsets for ARM, THUMB and THUMB2. 103 const int32_t ARM_MAX_FWD_BRANCH_OFFSET = ((((1 << 23) - 1) << 2) + 8); 104 const int32_t ARM_MAX_BWD_BRANCH_OFFSET = ((-((1 << 23) << 2)) + 8); 105 const int32_t THM_MAX_FWD_BRANCH_OFFSET = ((1 << 22) -2 + 4); 106 const int32_t THM_MAX_BWD_BRANCH_OFFSET = (-(1 << 22) + 4); 107 const int32_t THM2_MAX_FWD_BRANCH_OFFSET = (((1 << 24) - 2) + 4); 108 const int32_t THM2_MAX_BWD_BRANCH_OFFSET = (-(1 << 24) + 4); 109 110 // Thread Control Block size. 111 const size_t ARM_TCB_SIZE = 8; 112 113 // The arm target class. 114 // 115 // This is a very simple port of gold for ARM-EABI. It is intended for 116 // supporting Android only for the time being. 117 // 118 // TODOs: 119 // - Implement all static relocation types documented in arm-reloc.def. 120 // - Make PLTs more flexible for different architecture features like 121 // Thumb-2 and BE8. 122 // There are probably a lot more. 123 124 // Ideally we would like to avoid using global variables but this is used 125 // very in many places and sometimes in loops. If we use a function 126 // returning a static instance of Arm_reloc_property_table, it will be very 127 // slow in an threaded environment since the static instance needs to be 128 // locked. The pointer is below initialized in the 129 // Target::do_select_as_default_target() hook so that we do not spend time 130 // building the table if we are not linking ARM objects. 131 // 132 // An alternative is to to process the information in arm-reloc.def in 133 // compilation time and generate a representation of it in PODs only. That 134 // way we can avoid initialization when the linker starts. 135 136 Arm_reloc_property_table* arm_reloc_property_table = NULL; 137 138 // Instruction template class. This class is similar to the insn_sequence 139 // struct in bfd/elf32-arm.c. 140 141 class Insn_template 142 { 143 public: 144 // Types of instruction templates. 145 enum Type 146 { 147 THUMB16_TYPE = 1, 148 // THUMB16_SPECIAL_TYPE is used by sub-classes of Stub for instruction 149 // templates with class-specific semantics. Currently this is used 150 // only by the Cortex_a8_stub class for handling condition codes in 151 // conditional branches. 152 THUMB16_SPECIAL_TYPE, 153 THUMB32_TYPE, 154 ARM_TYPE, 155 DATA_TYPE 156 }; 157 158 // Factory methods to create instruction templates in different formats. 159 160 static const Insn_template 161 thumb16_insn(uint32_t data) 162 { return Insn_template(data, THUMB16_TYPE, elfcpp::R_ARM_NONE, 0); } 163 164 // A Thumb conditional branch, in which the proper condition is inserted 165 // when we build the stub. 166 static const Insn_template 167 thumb16_bcond_insn(uint32_t data) 168 { return Insn_template(data, THUMB16_SPECIAL_TYPE, elfcpp::R_ARM_NONE, 1); } 169 170 static const Insn_template 171 thumb32_insn(uint32_t data) 172 { return Insn_template(data, THUMB32_TYPE, elfcpp::R_ARM_NONE, 0); } 173 174 static const Insn_template 175 thumb32_b_insn(uint32_t data, int reloc_addend) 176 { 177 return Insn_template(data, THUMB32_TYPE, elfcpp::R_ARM_THM_JUMP24, 178 reloc_addend); 179 } 180 181 static const Insn_template 182 arm_insn(uint32_t data) 183 { return Insn_template(data, ARM_TYPE, elfcpp::R_ARM_NONE, 0); } 184 185 static const Insn_template 186 arm_rel_insn(unsigned data, int reloc_addend) 187 { return Insn_template(data, ARM_TYPE, elfcpp::R_ARM_JUMP24, reloc_addend); } 188 189 static const Insn_template 190 data_word(unsigned data, unsigned int r_type, int reloc_addend) 191 { return Insn_template(data, DATA_TYPE, r_type, reloc_addend); } 192 193 // Accessors. This class is used for read-only objects so no modifiers 194 // are provided. 195 196 uint32_t 197 data() const 198 { return this->data_; } 199 200 // Return the instruction sequence type of this. 201 Type 202 type() const 203 { return this->type_; } 204 205 // Return the ARM relocation type of this. 206 unsigned int 207 r_type() const 208 { return this->r_type_; } 209 210 int32_t 211 reloc_addend() const 212 { return this->reloc_addend_; } 213 214 // Return size of instruction template in bytes. 215 size_t 216 size() const; 217 218 // Return byte-alignment of instruction template. 219 unsigned 220 alignment() const; 221 222 private: 223 // We make the constructor private to ensure that only the factory 224 // methods are used. 225 inline 226 Insn_template(unsigned data, Type type, unsigned int r_type, int reloc_addend) 227 : data_(data), type_(type), r_type_(r_type), reloc_addend_(reloc_addend) 228 { } 229 230 // Instruction specific data. This is used to store information like 231 // some of the instruction bits. 232 uint32_t data_; 233 // Instruction template type. 234 Type type_; 235 // Relocation type if there is a relocation or R_ARM_NONE otherwise. 236 unsigned int r_type_; 237 // Relocation addend. 238 int32_t reloc_addend_; 239 }; 240 241 // Macro for generating code to stub types. One entry per long/short 242 // branch stub 243 244 #define DEF_STUBS \ 245 DEF_STUB(long_branch_any_any) \ 246 DEF_STUB(long_branch_v4t_arm_thumb) \ 247 DEF_STUB(long_branch_thumb_only) \ 248 DEF_STUB(long_branch_v4t_thumb_thumb) \ 249 DEF_STUB(long_branch_v4t_thumb_arm) \ 250 DEF_STUB(short_branch_v4t_thumb_arm) \ 251 DEF_STUB(long_branch_any_arm_pic) \ 252 DEF_STUB(long_branch_any_thumb_pic) \ 253 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \ 254 DEF_STUB(long_branch_v4t_arm_thumb_pic) \ 255 DEF_STUB(long_branch_v4t_thumb_arm_pic) \ 256 DEF_STUB(long_branch_thumb_only_pic) \ 257 DEF_STUB(a8_veneer_b_cond) \ 258 DEF_STUB(a8_veneer_b) \ 259 DEF_STUB(a8_veneer_bl) \ 260 DEF_STUB(a8_veneer_blx) \ 261 DEF_STUB(v4_veneer_bx) 262 263 // Stub types. 264 265 #define DEF_STUB(x) arm_stub_##x, 266 typedef enum 267 { 268 arm_stub_none, 269 DEF_STUBS 270 271 // First reloc stub type. 272 arm_stub_reloc_first = arm_stub_long_branch_any_any, 273 // Last reloc stub type. 274 arm_stub_reloc_last = arm_stub_long_branch_thumb_only_pic, 275 276 // First Cortex-A8 stub type. 277 arm_stub_cortex_a8_first = arm_stub_a8_veneer_b_cond, 278 // Last Cortex-A8 stub type. 279 arm_stub_cortex_a8_last = arm_stub_a8_veneer_blx, 280 281 // Last stub type. 282 arm_stub_type_last = arm_stub_v4_veneer_bx 283 } Stub_type; 284 #undef DEF_STUB 285 286 // Stub template class. Templates are meant to be read-only objects. 287 // A stub template for a stub type contains all read-only attributes 288 // common to all stubs of the same type. 289 290 class Stub_template 291 { 292 public: 293 Stub_template(Stub_type, const Insn_template*, size_t); 294 295 ~Stub_template() 296 { } 297 298 // Return stub type. 299 Stub_type 300 type() const 301 { return this->type_; } 302 303 // Return an array of instruction templates. 304 const Insn_template* 305 insns() const 306 { return this->insns_; } 307 308 // Return size of template in number of instructions. 309 size_t 310 insn_count() const 311 { return this->insn_count_; } 312 313 // Return size of template in bytes. 314 size_t 315 size() const 316 { return this->size_; } 317 318 // Return alignment of the stub template. 319 unsigned 320 alignment() const 321 { return this->alignment_; } 322 323 // Return whether entry point is in thumb mode. 324 bool 325 entry_in_thumb_mode() const 326 { return this->entry_in_thumb_mode_; } 327 328 // Return number of relocations in this template. 329 size_t 330 reloc_count() const 331 { return this->relocs_.size(); } 332 333 // Return index of the I-th instruction with relocation. 334 size_t 335 reloc_insn_index(size_t i) const 336 { 337 gold_assert(i < this->relocs_.size()); 338 return this->relocs_[i].first; 339 } 340 341 // Return the offset of the I-th instruction with relocation from the 342 // beginning of the stub. 343 section_size_type 344 reloc_offset(size_t i) const 345 { 346 gold_assert(i < this->relocs_.size()); 347 return this->relocs_[i].second; 348 } 349 350 private: 351 // This contains information about an instruction template with a relocation 352 // and its offset from start of stub. 353 typedef std::pair<size_t, section_size_type> Reloc; 354 355 // A Stub_template may not be copied. We want to share templates as much 356 // as possible. 357 Stub_template(const Stub_template&); 358 Stub_template& operator=(const Stub_template&); 359 360 // Stub type. 361 Stub_type type_; 362 // Points to an array of Insn_templates. 363 const Insn_template* insns_; 364 // Number of Insn_templates in insns_[]. 365 size_t insn_count_; 366 // Size of templated instructions in bytes. 367 size_t size_; 368 // Alignment of templated instructions. 369 unsigned alignment_; 370 // Flag to indicate if entry is in thumb mode. 371 bool entry_in_thumb_mode_; 372 // A table of reloc instruction indices and offsets. We can find these by 373 // looking at the instruction templates but we pre-compute and then stash 374 // them here for speed. 375 std::vector<Reloc> relocs_; 376 }; 377 378 // 379 // A class for code stubs. This is a base class for different type of 380 // stubs used in the ARM target. 381 // 382 383 class Stub 384 { 385 private: 386 static const section_offset_type invalid_offset = 387 static_cast<section_offset_type>(-1); 388 389 public: 390 Stub(const Stub_template* stub_template) 391 : stub_template_(stub_template), offset_(invalid_offset) 392 { } 393 394 virtual 395 ~Stub() 396 { } 397 398 // Return the stub template. 399 const Stub_template* 400 stub_template() const 401 { return this->stub_template_; } 402 403 // Return offset of code stub from beginning of its containing stub table. 404 section_offset_type 405 offset() const 406 { 407 gold_assert(this->offset_ != invalid_offset); 408 return this->offset_; 409 } 410 411 // Set offset of code stub from beginning of its containing stub table. 412 void 413 set_offset(section_offset_type offset) 414 { this->offset_ = offset; } 415 416 // Return the relocation target address of the i-th relocation in the 417 // stub. This must be defined in a child class. 418 Arm_address 419 reloc_target(size_t i) 420 { return this->do_reloc_target(i); } 421 422 // Write a stub at output VIEW. BIG_ENDIAN select how a stub is written. 423 void 424 write(unsigned char* view, section_size_type view_size, bool big_endian) 425 { this->do_write(view, view_size, big_endian); } 426 427 // Return the instruction for THUMB16_SPECIAL_TYPE instruction template 428 // for the i-th instruction. 429 uint16_t 430 thumb16_special(size_t i) 431 { return this->do_thumb16_special(i); } 432 433 protected: 434 // This must be defined in the child class. 435 virtual Arm_address 436 do_reloc_target(size_t) = 0; 437 438 // This may be overridden in the child class. 439 virtual void 440 do_write(unsigned char* view, section_size_type view_size, bool big_endian) 441 { 442 if (big_endian) 443 this->do_fixed_endian_write<true>(view, view_size); 444 else 445 this->do_fixed_endian_write<false>(view, view_size); 446 } 447 448 // This must be overridden if a child class uses the THUMB16_SPECIAL_TYPE 449 // instruction template. 450 virtual uint16_t 451 do_thumb16_special(size_t) 452 { gold_unreachable(); } 453 454 private: 455 // A template to implement do_write. 456 template<bool big_endian> 457 void inline 458 do_fixed_endian_write(unsigned char*, section_size_type); 459 460 // Its template. 461 const Stub_template* stub_template_; 462 // Offset within the section of containing this stub. 463 section_offset_type offset_; 464 }; 465 466 // Reloc stub class. These are stubs we use to fix up relocation because 467 // of limited branch ranges. 468 469 class Reloc_stub : public Stub 470 { 471 public: 472 static const unsigned int invalid_index = static_cast<unsigned int>(-1); 473 // We assume we never jump to this address. 474 static const Arm_address invalid_address = static_cast<Arm_address>(-1); 475 476 // Return destination address. 477 Arm_address 478 destination_address() const 479 { 480 gold_assert(this->destination_address_ != this->invalid_address); 481 return this->destination_address_; 482 } 483 484 // Set destination address. 485 void 486 set_destination_address(Arm_address address) 487 { 488 gold_assert(address != this->invalid_address); 489 this->destination_address_ = address; 490 } 491 492 // Reset destination address. 493 void 494 reset_destination_address() 495 { this->destination_address_ = this->invalid_address; } 496 497 // Determine stub type for a branch of a relocation of R_TYPE going 498 // from BRANCH_ADDRESS to BRANCH_TARGET. If TARGET_IS_THUMB is set, 499 // the branch target is a thumb instruction. TARGET is used for look 500 // up ARM-specific linker settings. 501 static Stub_type 502 stub_type_for_reloc(unsigned int r_type, Arm_address branch_address, 503 Arm_address branch_target, bool target_is_thumb); 504 505 // Reloc_stub key. A key is logically a triplet of a stub type, a symbol 506 // and an addend. Since we treat global and local symbol differently, we 507 // use a Symbol object for a global symbol and a object-index pair for 508 // a local symbol. 509 class Key 510 { 511 public: 512 // If SYMBOL is not null, this is a global symbol, we ignore RELOBJ and 513 // R_SYM. Otherwise, this is a local symbol and RELOBJ must non-NULL 514 // and R_SYM must not be invalid_index. 515 Key(Stub_type stub_type, const Symbol* symbol, const Relobj* relobj, 516 unsigned int r_sym, int32_t addend) 517 : stub_type_(stub_type), addend_(addend) 518 { 519 if (symbol != NULL) 520 { 521 this->r_sym_ = Reloc_stub::invalid_index; 522 this->u_.symbol = symbol; 523 } 524 else 525 { 526 gold_assert(relobj != NULL && r_sym != invalid_index); 527 this->r_sym_ = r_sym; 528 this->u_.relobj = relobj; 529 } 530 } 531 532 ~Key() 533 { } 534 535 // Accessors: Keys are meant to be read-only object so no modifiers are 536 // provided. 537 538 // Return stub type. 539 Stub_type 540 stub_type() const 541 { return this->stub_type_; } 542 543 // Return the local symbol index or invalid_index. 544 unsigned int 545 r_sym() const 546 { return this->r_sym_; } 547 548 // Return the symbol if there is one. 549 const Symbol* 550 symbol() const 551 { return this->r_sym_ == invalid_index ? this->u_.symbol : NULL; } 552 553 // Return the relobj if there is one. 554 const Relobj* 555 relobj() const 556 { return this->r_sym_ != invalid_index ? this->u_.relobj : NULL; } 557 558 // Whether this equals to another key k. 559 bool 560 eq(const Key& k) const 561 { 562 return ((this->stub_type_ == k.stub_type_) 563 && (this->r_sym_ == k.r_sym_) 564 && ((this->r_sym_ != Reloc_stub::invalid_index) 565 ? (this->u_.relobj == k.u_.relobj) 566 : (this->u_.symbol == k.u_.symbol)) 567 && (this->addend_ == k.addend_)); 568 } 569 570 // Return a hash value. 571 size_t 572 hash_value() const 573 { 574 return (this->stub_type_ 575 ^ this->r_sym_ 576 ^ gold::string_hash<char>( 577 (this->r_sym_ != Reloc_stub::invalid_index) 578 ? this->u_.relobj->name().c_str() 579 : this->u_.symbol->name()) 580 ^ this->addend_); 581 } 582 583 // Functors for STL associative containers. 584 struct hash 585 { 586 size_t 587 operator()(const Key& k) const 588 { return k.hash_value(); } 589 }; 590 591 struct equal_to 592 { 593 bool 594 operator()(const Key& k1, const Key& k2) const 595 { return k1.eq(k2); } 596 }; 597 598 // Name of key. This is mainly for debugging. 599 std::string 600 name() const ATTRIBUTE_UNUSED; 601 602 private: 603 // Stub type. 604 Stub_type stub_type_; 605 // If this is a local symbol, this is the index in the defining object. 606 // Otherwise, it is invalid_index for a global symbol. 607 unsigned int r_sym_; 608 // If r_sym_ is an invalid index, this points to a global symbol. 609 // Otherwise, it points to a relobj. We used the unsized and target 610 // independent Symbol and Relobj classes instead of Sized_symbol<32> and 611 // Arm_relobj, in order to avoid making the stub class a template 612 // as most of the stub machinery is endianness-neutral. However, it 613 // may require a bit of casting done by users of this class. 614 union 615 { 616 const Symbol* symbol; 617 const Relobj* relobj; 618 } u_; 619 // Addend associated with a reloc. 620 int32_t addend_; 621 }; 622 623 protected: 624 // Reloc_stubs are created via a stub factory. So these are protected. 625 Reloc_stub(const Stub_template* stub_template) 626 : Stub(stub_template), destination_address_(invalid_address) 627 { } 628 629 ~Reloc_stub() 630 { } 631 632 friend class Stub_factory; 633 634 // Return the relocation target address of the i-th relocation in the 635 // stub. 636 Arm_address 637 do_reloc_target(size_t i) 638 { 639 // All reloc stub have only one relocation. 640 gold_assert(i == 0); 641 return this->destination_address_; 642 } 643 644 private: 645 // Address of destination. 646 Arm_address destination_address_; 647 }; 648 649 // Cortex-A8 stub class. We need a Cortex-A8 stub to redirect any 32-bit 650 // THUMB branch that meets the following conditions: 651 // 652 // 1. The branch straddles across a page boundary. i.e. lower 12-bit of 653 // branch address is 0xffe. 654 // 2. The branch target address is in the same page as the first word of the 655 // branch. 656 // 3. The branch follows a 32-bit instruction which is not a branch. 657 // 658 // To do the fix up, we need to store the address of the branch instruction 659 // and its target at least. We also need to store the original branch 660 // instruction bits for the condition code in a conditional branch. The 661 // condition code is used in a special instruction template. We also want 662 // to identify input sections needing Cortex-A8 workaround quickly. We store 663 // extra information about object and section index of the code section 664 // containing a branch being fixed up. The information is used to mark 665 // the code section when we finalize the Cortex-A8 stubs. 666 // 667 668 class Cortex_a8_stub : public Stub 669 { 670 public: 671 ~Cortex_a8_stub() 672 { } 673 674 // Return the object of the code section containing the branch being fixed 675 // up. 676 Relobj* 677 relobj() const 678 { return this->relobj_; } 679 680 // Return the section index of the code section containing the branch being 681 // fixed up. 682 unsigned int 683 shndx() const 684 { return this->shndx_; } 685 686 // Return the source address of stub. This is the address of the original 687 // branch instruction. LSB is 1 always set to indicate that it is a THUMB 688 // instruction. 689 Arm_address 690 source_address() const 691 { return this->source_address_; } 692 693 // Return the destination address of the stub. This is the branch taken 694 // address of the original branch instruction. LSB is 1 if it is a THUMB 695 // instruction address. 696 Arm_address 697 destination_address() const 698 { return this->destination_address_; } 699 700 // Return the instruction being fixed up. 701 uint32_t 702 original_insn() const 703 { return this->original_insn_; } 704 705 protected: 706 // Cortex_a8_stubs are created via a stub factory. So these are protected. 707 Cortex_a8_stub(const Stub_template* stub_template, Relobj* relobj, 708 unsigned int shndx, Arm_address source_address, 709 Arm_address destination_address, uint32_t original_insn) 710 : Stub(stub_template), relobj_(relobj), shndx_(shndx), 711 source_address_(source_address | 1U), 712 destination_address_(destination_address), 713 original_insn_(original_insn) 714 { } 715 716 friend class Stub_factory; 717 718 // Return the relocation target address of the i-th relocation in the 719 // stub. 720 Arm_address 721 do_reloc_target(size_t i) 722 { 723 if (this->stub_template()->type() == arm_stub_a8_veneer_b_cond) 724 { 725 // The conditional branch veneer has two relocations. 726 gold_assert(i < 2); 727 return i == 0 ? this->source_address_ + 4 : this->destination_address_; 728 } 729 else 730 { 731 // All other Cortex-A8 stubs have only one relocation. 732 gold_assert(i == 0); 733 return this->destination_address_; 734 } 735 } 736 737 // Return an instruction for the THUMB16_SPECIAL_TYPE instruction template. 738 uint16_t 739 do_thumb16_special(size_t); 740 741 private: 742 // Object of the code section containing the branch being fixed up. 743 Relobj* relobj_; 744 // Section index of the code section containing the branch begin fixed up. 745 unsigned int shndx_; 746 // Source address of original branch. 747 Arm_address source_address_; 748 // Destination address of the original branch. 749 Arm_address destination_address_; 750 // Original branch instruction. This is needed for copying the condition 751 // code from a condition branch to its stub. 752 uint32_t original_insn_; 753 }; 754 755 // ARMv4 BX Rx branch relocation stub class. 756 class Arm_v4bx_stub : public Stub 757 { 758 public: 759 ~Arm_v4bx_stub() 760 { } 761 762 // Return the associated register. 763 uint32_t 764 reg() const 765 { return this->reg_; } 766 767 protected: 768 // Arm V4BX stubs are created via a stub factory. So these are protected. 769 Arm_v4bx_stub(const Stub_template* stub_template, const uint32_t reg) 770 : Stub(stub_template), reg_(reg) 771 { } 772 773 friend class Stub_factory; 774 775 // Return the relocation target address of the i-th relocation in the 776 // stub. 777 Arm_address 778 do_reloc_target(size_t) 779 { gold_unreachable(); } 780 781 // This may be overridden in the child class. 782 virtual void 783 do_write(unsigned char* view, section_size_type view_size, bool big_endian) 784 { 785 if (big_endian) 786 this->do_fixed_endian_v4bx_write<true>(view, view_size); 787 else 788 this->do_fixed_endian_v4bx_write<false>(view, view_size); 789 } 790 791 private: 792 // A template to implement do_write. 793 template<bool big_endian> 794 void inline 795 do_fixed_endian_v4bx_write(unsigned char* view, section_size_type) 796 { 797 const Insn_template* insns = this->stub_template()->insns(); 798 elfcpp::Swap<32, big_endian>::writeval(view, 799 (insns[0].data() 800 + (this->reg_ << 16))); 801 view += insns[0].size(); 802 elfcpp::Swap<32, big_endian>::writeval(view, 803 (insns[1].data() + this->reg_)); 804 view += insns[1].size(); 805 elfcpp::Swap<32, big_endian>::writeval(view, 806 (insns[2].data() + this->reg_)); 807 } 808 809 // A register index (r0-r14), which is associated with the stub. 810 uint32_t reg_; 811 }; 812 813 // Stub factory class. 814 815 class Stub_factory 816 { 817 public: 818 // Return the unique instance of this class. 819 static const Stub_factory& 820 get_instance() 821 { 822 static Stub_factory singleton; 823 return singleton; 824 } 825 826 // Make a relocation stub. 827 Reloc_stub* 828 make_reloc_stub(Stub_type stub_type) const 829 { 830 gold_assert(stub_type >= arm_stub_reloc_first 831 && stub_type <= arm_stub_reloc_last); 832 return new Reloc_stub(this->stub_templates_[stub_type]); 833 } 834 835 // Make a Cortex-A8 stub. 836 Cortex_a8_stub* 837 make_cortex_a8_stub(Stub_type stub_type, Relobj* relobj, unsigned int shndx, 838 Arm_address source, Arm_address destination, 839 uint32_t original_insn) const 840 { 841 gold_assert(stub_type >= arm_stub_cortex_a8_first 842 && stub_type <= arm_stub_cortex_a8_last); 843 return new Cortex_a8_stub(this->stub_templates_[stub_type], relobj, shndx, 844 source, destination, original_insn); 845 } 846 847 // Make an ARM V4BX relocation stub. 848 // This method creates a stub from the arm_stub_v4_veneer_bx template only. 849 Arm_v4bx_stub* 850 make_arm_v4bx_stub(uint32_t reg) const 851 { 852 gold_assert(reg < 0xf); 853 return new Arm_v4bx_stub(this->stub_templates_[arm_stub_v4_veneer_bx], 854 reg); 855 } 856 857 private: 858 // Constructor and destructor are protected since we only return a single 859 // instance created in Stub_factory::get_instance(). 860 861 Stub_factory(); 862 863 // A Stub_factory may not be copied since it is a singleton. 864 Stub_factory(const Stub_factory&); 865 Stub_factory& operator=(Stub_factory&); 866 867 // Stub templates. These are initialized in the constructor. 868 const Stub_template* stub_templates_[arm_stub_type_last+1]; 869 }; 870 871 // A class to hold stubs for the ARM target. 872 873 template<bool big_endian> 874 class Stub_table : public Output_data 875 { 876 public: 877 Stub_table(Arm_input_section<big_endian>* owner) 878 : Output_data(), owner_(owner), reloc_stubs_(), reloc_stubs_size_(0), 879 reloc_stubs_addralign_(1), cortex_a8_stubs_(), arm_v4bx_stubs_(0xf), 880 prev_data_size_(0), prev_addralign_(1), padding_(0) 881 { } 882 883 ~Stub_table() 884 { } 885 886 // Owner of this stub table. 887 Arm_input_section<big_endian>* 888 owner() const 889 { return this->owner_; } 890 891 // Whether this stub table is empty. 892 bool 893 empty() const 894 { 895 return (this->reloc_stubs_.empty() 896 && this->cortex_a8_stubs_.empty() 897 && this->arm_v4bx_stubs_.empty()); 898 } 899 900 // Return the current data size. 901 off_t 902 current_data_size() const 903 { return this->current_data_size_for_child(); } 904 905 // Add a STUB using KEY. The caller is responsible for avoiding addition 906 // if a STUB with the same key has already been added. 907 void 908 add_reloc_stub(Reloc_stub* stub, const Reloc_stub::Key& key) 909 { 910 const Stub_template* stub_template = stub->stub_template(); 911 gold_assert(stub_template->type() == key.stub_type()); 912 this->reloc_stubs_[key] = stub; 913 914 // Assign stub offset early. We can do this because we never remove 915 // reloc stubs and they are in the beginning of the stub table. 916 uint64_t align = stub_template->alignment(); 917 this->reloc_stubs_size_ = align_address(this->reloc_stubs_size_, align); 918 stub->set_offset(this->reloc_stubs_size_); 919 this->reloc_stubs_size_ += stub_template->size(); 920 this->reloc_stubs_addralign_ = 921 std::max(this->reloc_stubs_addralign_, align); 922 } 923 924 // Add a Cortex-A8 STUB that fixes up a THUMB branch at ADDRESS. 925 // The caller is responsible for avoiding addition if a STUB with the same 926 // address has already been added. 927 void 928 add_cortex_a8_stub(Arm_address address, Cortex_a8_stub* stub) 929 { 930 std::pair<Arm_address, Cortex_a8_stub*> value(address, stub); 931 this->cortex_a8_stubs_.insert(value); 932 } 933 934 // Add an ARM V4BX relocation stub. A register index will be retrieved 935 // from the stub. 936 void 937 add_arm_v4bx_stub(Arm_v4bx_stub* stub) 938 { 939 gold_assert(stub != NULL && this->arm_v4bx_stubs_[stub->reg()] == NULL); 940 this->arm_v4bx_stubs_[stub->reg()] = stub; 941 } 942 943 // Remove all Cortex-A8 stubs. 944 void 945 remove_all_cortex_a8_stubs(); 946 947 // Look up a relocation stub using KEY. Return NULL if there is none. 948 Reloc_stub* 949 find_reloc_stub(const Reloc_stub::Key& key) const 950 { 951 typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.find(key); 952 return (p != this->reloc_stubs_.end()) ? p->second : NULL; 953 } 954 955 // Look up an arm v4bx relocation stub using the register index. 956 // Return NULL if there is none. 957 Arm_v4bx_stub* 958 find_arm_v4bx_stub(const uint32_t reg) const 959 { 960 gold_assert(reg < 0xf); 961 return this->arm_v4bx_stubs_[reg]; 962 } 963 964 // Relocate stubs in this stub table. 965 void 966 relocate_stubs(const Relocate_info<32, big_endian>*, 967 Target_arm<big_endian>*, Output_section*, 968 unsigned char*, Arm_address, section_size_type); 969 970 // Update data size and alignment at the end of a relaxation pass. Return 971 // true if either data size or alignment is different from that of the 972 // previous relaxation pass. 973 bool 974 update_data_size_and_addralign(); 975 976 // Finalize stubs. Set the offsets of all stubs and mark input sections 977 // needing the Cortex-A8 workaround. 978 void 979 finalize_stubs(); 980 981 // Apply Cortex-A8 workaround to an address range. 982 void 983 apply_cortex_a8_workaround_to_address_range(Target_arm<big_endian>*, 984 unsigned char*, Arm_address, 985 section_size_type); 986 987 protected: 988 // Write out section contents. 989 void 990 do_write(Output_file*); 991 992 // Return the required alignment. 993 uint64_t 994 do_addralign() const 995 { return this->prev_addralign_; } 996 997 // Reset address and file offset. 998 void 999 do_reset_address_and_file_offset() 1000 { 1001 this->set_current_data_size_for_child( 1002 this->prev_data_size_ + this->padding_); 1003 } 1004 1005 // Set final data size. 1006 void 1007 set_final_data_size() 1008 { this->set_data_size(this->current_data_size()); } 1009 1010 private: 1011 // Relocate one stub. 1012 void 1013 relocate_stub(Stub*, const Relocate_info<32, big_endian>*, 1014 Target_arm<big_endian>*, Output_section*, 1015 unsigned char*, Arm_address, section_size_type); 1016 1017 // Unordered map of relocation stubs. 1018 typedef 1019 Unordered_map<Reloc_stub::Key, Reloc_stub*, Reloc_stub::Key::hash, 1020 Reloc_stub::Key::equal_to> 1021 Reloc_stub_map; 1022 1023 // List of Cortex-A8 stubs ordered by addresses of branches being 1024 // fixed up in output. 1025 typedef std::map<Arm_address, Cortex_a8_stub*> Cortex_a8_stub_list; 1026 // List of Arm V4BX relocation stubs ordered by associated registers. 1027 typedef std::vector<Arm_v4bx_stub*> Arm_v4bx_stub_list; 1028 1029 // Owner of this stub table. 1030 Arm_input_section<big_endian>* owner_; 1031 // The relocation stubs. 1032 Reloc_stub_map reloc_stubs_; 1033 // Size of reloc stubs. 1034 off_t reloc_stubs_size_; 1035 // Maximum address alignment of reloc stubs. 1036 uint64_t reloc_stubs_addralign_; 1037 // The cortex_a8_stubs. 1038 Cortex_a8_stub_list cortex_a8_stubs_; 1039 // The Arm V4BX relocation stubs. 1040 Arm_v4bx_stub_list arm_v4bx_stubs_; 1041 // data size of this in the previous pass. 1042 off_t prev_data_size_; 1043 // address alignment of this in the previous pass. 1044 uint64_t prev_addralign_; 1045 off_t padding_; 1046 }; 1047 1048 // Arm_exidx_cantunwind class. This represents an EXIDX_CANTUNWIND entry 1049 // we add to the end of an EXIDX input section that goes into the output. 1050 1051 class Arm_exidx_cantunwind : public Output_section_data 1052 { 1053 public: 1054 Arm_exidx_cantunwind(Relobj* relobj, unsigned int shndx) 1055 : Output_section_data(8, 4, true), relobj_(relobj), shndx_(shndx) 1056 { } 1057 1058 // Return the object containing the section pointed by this. 1059 Relobj* 1060 relobj() const 1061 { return this->relobj_; } 1062 1063 // Return the section index of the section pointed by this. 1064 unsigned int 1065 shndx() const 1066 { return this->shndx_; } 1067 1068 protected: 1069 void 1070 do_write(Output_file* of) 1071 { 1072 if (parameters->target().is_big_endian()) 1073 this->do_fixed_endian_write<true>(of); 1074 else 1075 this->do_fixed_endian_write<false>(of); 1076 } 1077 1078 // Write to a map file. 1079 void 1080 do_print_to_mapfile(Mapfile* mapfile) const 1081 { mapfile->print_output_data(this, _("** ARM cantunwind")); } 1082 1083 private: 1084 // Implement do_write for a given endianness. 1085 template<bool big_endian> 1086 void inline 1087 do_fixed_endian_write(Output_file*); 1088 1089 // The object containing the section pointed by this. 1090 Relobj* relobj_; 1091 // The section index of the section pointed by this. 1092 unsigned int shndx_; 1093 }; 1094 1095 // During EXIDX coverage fix-up, we compact an EXIDX section. The 1096 // Offset map is used to map input section offset within the EXIDX section 1097 // to the output offset from the start of this EXIDX section. 1098 1099 typedef std::map<section_offset_type, section_offset_type> 1100 Arm_exidx_section_offset_map; 1101 1102 // Arm_exidx_merged_section class. This represents an EXIDX input section 1103 // with some of its entries merged. 1104 1105 class Arm_exidx_merged_section : public Output_relaxed_input_section 1106 { 1107 public: 1108 // Constructor for Arm_exidx_merged_section. 1109 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section. 1110 // SECTION_OFFSET_MAP points to a section offset map describing how 1111 // parts of the input section are mapped to output. DELETED_BYTES is 1112 // the number of bytes deleted from the EXIDX input section. 1113 Arm_exidx_merged_section( 1114 const Arm_exidx_input_section& exidx_input_section, 1115 const Arm_exidx_section_offset_map& section_offset_map, 1116 uint32_t deleted_bytes); 1117 1118 // Build output contents. 1119 void 1120 build_contents(const unsigned char*, section_size_type); 1121 1122 // Return the original EXIDX input section. 1123 const Arm_exidx_input_section& 1124 exidx_input_section() const 1125 { return this->exidx_input_section_; } 1126 1127 // Return the section offset map. 1128 const Arm_exidx_section_offset_map& 1129 section_offset_map() const 1130 { return this->section_offset_map_; } 1131 1132 protected: 1133 // Write merged section into file OF. 1134 void 1135 do_write(Output_file* of); 1136 1137 bool 1138 do_output_offset(const Relobj*, unsigned int, section_offset_type, 1139 section_offset_type*) const; 1140 1141 private: 1142 // Original EXIDX input section. 1143 const Arm_exidx_input_section& exidx_input_section_; 1144 // Section offset map. 1145 const Arm_exidx_section_offset_map& section_offset_map_; 1146 // Merged section contents. We need to keep build the merged section 1147 // and save it here to avoid accessing the original EXIDX section when 1148 // we cannot lock the sections' object. 1149 unsigned char* section_contents_; 1150 }; 1151 1152 // A class to wrap an ordinary input section containing executable code. 1153 1154 template<bool big_endian> 1155 class Arm_input_section : public Output_relaxed_input_section 1156 { 1157 public: 1158 Arm_input_section(Relobj* relobj, unsigned int shndx) 1159 : Output_relaxed_input_section(relobj, shndx, 1), 1160 original_addralign_(1), original_size_(0), stub_table_(NULL), 1161 original_contents_(NULL) 1162 { } 1163 1164 ~Arm_input_section() 1165 { delete[] this->original_contents_; } 1166 1167 // Initialize. 1168 void 1169 init(); 1170 1171 // Whether this is a stub table owner. 1172 bool 1173 is_stub_table_owner() const 1174 { return this->stub_table_ != NULL && this->stub_table_->owner() == this; } 1175 1176 // Return the stub table. 1177 Stub_table<big_endian>* 1178 stub_table() const 1179 { return this->stub_table_; } 1180 1181 // Set the stub_table. 1182 void 1183 set_stub_table(Stub_table<big_endian>* stub_table) 1184 { this->stub_table_ = stub_table; } 1185 1186 // Downcast a base pointer to an Arm_input_section pointer. This is 1187 // not type-safe but we only use Arm_input_section not the base class. 1188 static Arm_input_section<big_endian>* 1189 as_arm_input_section(Output_relaxed_input_section* poris) 1190 { return static_cast<Arm_input_section<big_endian>*>(poris); } 1191 1192 // Return the original size of the section. 1193 uint32_t 1194 original_size() const 1195 { return this->original_size_; } 1196 1197 protected: 1198 // Write data to output file. 1199 void 1200 do_write(Output_file*); 1201 1202 // Return required alignment of this. 1203 uint64_t 1204 do_addralign() const 1205 { 1206 if (this->is_stub_table_owner()) 1207 return std::max(this->stub_table_->addralign(), 1208 static_cast<uint64_t>(this->original_addralign_)); 1209 else 1210 return this->original_addralign_; 1211 } 1212 1213 // Finalize data size. 1214 void 1215 set_final_data_size(); 1216 1217 // Reset address and file offset. 1218 void 1219 do_reset_address_and_file_offset(); 1220 1221 // Output offset. 1222 bool 1223 do_output_offset(const Relobj* object, unsigned int shndx, 1224 section_offset_type offset, 1225 section_offset_type* poutput) const 1226 { 1227 if ((object == this->relobj()) 1228 && (shndx == this->shndx()) 1229 && (offset >= 0) 1230 && (offset <= 1231 convert_types<section_offset_type, uint32_t>(this->original_size_))) 1232 { 1233 *poutput = offset; 1234 return true; 1235 } 1236 else 1237 return false; 1238 } 1239 1240 private: 1241 // Copying is not allowed. 1242 Arm_input_section(const Arm_input_section&); 1243 Arm_input_section& operator=(const Arm_input_section&); 1244 1245 // Address alignment of the original input section. 1246 uint32_t original_addralign_; 1247 // Section size of the original input section. 1248 uint32_t original_size_; 1249 // Stub table. 1250 Stub_table<big_endian>* stub_table_; 1251 // Original section contents. We have to make a copy here since the file 1252 // containing the original section may not be locked when we need to access 1253 // the contents. 1254 unsigned char* original_contents_; 1255 }; 1256 1257 // Arm_exidx_fixup class. This is used to define a number of methods 1258 // and keep states for fixing up EXIDX coverage. 1259 1260 class Arm_exidx_fixup 1261 { 1262 public: 1263 Arm_exidx_fixup(Output_section* exidx_output_section, 1264 bool merge_exidx_entries = true) 1265 : exidx_output_section_(exidx_output_section), last_unwind_type_(UT_NONE), 1266 last_inlined_entry_(0), last_input_section_(NULL), 1267 section_offset_map_(NULL), first_output_text_section_(NULL), 1268 merge_exidx_entries_(merge_exidx_entries) 1269 { } 1270 1271 ~Arm_exidx_fixup() 1272 { delete this->section_offset_map_; } 1273 1274 // Process an EXIDX section for entry merging. SECTION_CONTENTS points 1275 // to the EXIDX contents and SECTION_SIZE is the size of the contents. Return 1276 // number of bytes to be deleted in output. If parts of the input EXIDX 1277 // section are merged a heap allocated Arm_exidx_section_offset_map is store 1278 // in the located PSECTION_OFFSET_MAP. The caller owns the map and is 1279 // responsible for releasing it. 1280 template<bool big_endian> 1281 uint32_t 1282 process_exidx_section(const Arm_exidx_input_section* exidx_input_section, 1283 const unsigned char* section_contents, 1284 section_size_type section_size, 1285 Arm_exidx_section_offset_map** psection_offset_map); 1286 1287 // Append an EXIDX_CANTUNWIND entry pointing at the end of the last 1288 // input section, if there is not one already. 1289 void 1290 add_exidx_cantunwind_as_needed(); 1291 1292 // Return the output section for the text section which is linked to the 1293 // first exidx input in output. 1294 Output_section* 1295 first_output_text_section() const 1296 { return this->first_output_text_section_; } 1297 1298 private: 1299 // Copying is not allowed. 1300 Arm_exidx_fixup(const Arm_exidx_fixup&); 1301 Arm_exidx_fixup& operator=(const Arm_exidx_fixup&); 1302 1303 // Type of EXIDX unwind entry. 1304 enum Unwind_type 1305 { 1306 // No type. 1307 UT_NONE, 1308 // EXIDX_CANTUNWIND. 1309 UT_EXIDX_CANTUNWIND, 1310 // Inlined entry. 1311 UT_INLINED_ENTRY, 1312 // Normal entry. 1313 UT_NORMAL_ENTRY, 1314 }; 1315 1316 // Process an EXIDX entry. We only care about the second word of the 1317 // entry. Return true if the entry can be deleted. 1318 bool 1319 process_exidx_entry(uint32_t second_word); 1320 1321 // Update the current section offset map during EXIDX section fix-up. 1322 // If there is no map, create one. INPUT_OFFSET is the offset of a 1323 // reference point, DELETED_BYTES is the number of deleted by in the 1324 // section so far. If DELETE_ENTRY is true, the reference point and 1325 // all offsets after the previous reference point are discarded. 1326 void 1327 update_offset_map(section_offset_type input_offset, 1328 section_size_type deleted_bytes, bool delete_entry); 1329 1330 // EXIDX output section. 1331 Output_section* exidx_output_section_; 1332 // Unwind type of the last EXIDX entry processed. 1333 Unwind_type last_unwind_type_; 1334 // Last seen inlined EXIDX entry. 1335 uint32_t last_inlined_entry_; 1336 // Last processed EXIDX input section. 1337 const Arm_exidx_input_section* last_input_section_; 1338 // Section offset map created in process_exidx_section. 1339 Arm_exidx_section_offset_map* section_offset_map_; 1340 // Output section for the text section which is linked to the first exidx 1341 // input in output. 1342 Output_section* first_output_text_section_; 1343 1344 bool merge_exidx_entries_; 1345 }; 1346 1347 // Arm output section class. This is defined mainly to add a number of 1348 // stub generation methods. 1349 1350 template<bool big_endian> 1351 class Arm_output_section : public Output_section 1352 { 1353 public: 1354 typedef std::vector<std::pair<Relobj*, unsigned int> > Text_section_list; 1355 1356 // We need to force SHF_LINK_ORDER in a SHT_ARM_EXIDX section. 1357 Arm_output_section(const char* name, elfcpp::Elf_Word type, 1358 elfcpp::Elf_Xword flags) 1359 : Output_section(name, type, 1360 (type == elfcpp::SHT_ARM_EXIDX 1361 ? flags | elfcpp::SHF_LINK_ORDER 1362 : flags)) 1363 { 1364 if (type == elfcpp::SHT_ARM_EXIDX) 1365 this->set_always_keeps_input_sections(); 1366 } 1367 1368 ~Arm_output_section() 1369 { } 1370 1371 // Group input sections for stub generation. 1372 void 1373 group_sections(section_size_type, bool, Target_arm<big_endian>*, const Task*); 1374 1375 // Downcast a base pointer to an Arm_output_section pointer. This is 1376 // not type-safe but we only use Arm_output_section not the base class. 1377 static Arm_output_section<big_endian>* 1378 as_arm_output_section(Output_section* os) 1379 { return static_cast<Arm_output_section<big_endian>*>(os); } 1380 1381 // Append all input text sections in this into LIST. 1382 void 1383 append_text_sections_to_list(Text_section_list* list); 1384 1385 // Fix EXIDX coverage of this EXIDX output section. SORTED_TEXT_SECTION 1386 // is a list of text input sections sorted in ascending order of their 1387 // output addresses. 1388 void 1389 fix_exidx_coverage(Layout* layout, 1390 const Text_section_list& sorted_text_section, 1391 Symbol_table* symtab, 1392 bool merge_exidx_entries, 1393 const Task* task); 1394 1395 // Link an EXIDX section into its corresponding text section. 1396 void 1397 set_exidx_section_link(); 1398 1399 private: 1400 // For convenience. 1401 typedef Output_section::Input_section Input_section; 1402 typedef Output_section::Input_section_list Input_section_list; 1403 1404 // Create a stub group. 1405 void create_stub_group(Input_section_list::const_iterator, 1406 Input_section_list::const_iterator, 1407 Input_section_list::const_iterator, 1408 Target_arm<big_endian>*, 1409 std::vector<Output_relaxed_input_section*>*, 1410 const Task* task); 1411 }; 1412 1413 // Arm_exidx_input_section class. This represents an EXIDX input section. 1414 1415 class Arm_exidx_input_section 1416 { 1417 public: 1418 static const section_offset_type invalid_offset = 1419 static_cast<section_offset_type>(-1); 1420 1421 Arm_exidx_input_section(Relobj* relobj, unsigned int shndx, 1422 unsigned int link, uint32_t size, 1423 uint32_t addralign, uint32_t text_size) 1424 : relobj_(relobj), shndx_(shndx), link_(link), size_(size), 1425 addralign_(addralign), text_size_(text_size), has_errors_(false) 1426 { } 1427 1428 ~Arm_exidx_input_section() 1429 { } 1430 1431 // Accessors: This is a read-only class. 1432 1433 // Return the object containing this EXIDX input section. 1434 Relobj* 1435 relobj() const 1436 { return this->relobj_; } 1437 1438 // Return the section index of this EXIDX input section. 1439 unsigned int 1440 shndx() const 1441 { return this->shndx_; } 1442 1443 // Return the section index of linked text section in the same object. 1444 unsigned int 1445 link() const 1446 { return this->link_; } 1447 1448 // Return size of the EXIDX input section. 1449 uint32_t 1450 size() const 1451 { return this->size_; } 1452 1453 // Return address alignment of EXIDX input section. 1454 uint32_t 1455 addralign() const 1456 { return this->addralign_; } 1457 1458 // Return size of the associated text input section. 1459 uint32_t 1460 text_size() const 1461 { return this->text_size_; } 1462 1463 // Whether there are any errors in the EXIDX input section. 1464 bool 1465 has_errors() const 1466 { return this->has_errors_; } 1467 1468 // Set has-errors flag. 1469 void 1470 set_has_errors() 1471 { this->has_errors_ = true; } 1472 1473 private: 1474 // Object containing this. 1475 Relobj* relobj_; 1476 // Section index of this. 1477 unsigned int shndx_; 1478 // text section linked to this in the same object. 1479 unsigned int link_; 1480 // Size of this. For ARM 32-bit is sufficient. 1481 uint32_t size_; 1482 // Address alignment of this. For ARM 32-bit is sufficient. 1483 uint32_t addralign_; 1484 // Size of associated text section. 1485 uint32_t text_size_; 1486 // Whether this has any errors. 1487 bool has_errors_; 1488 }; 1489 1490 // Arm_relobj class. 1491 1492 template<bool big_endian> 1493 class Arm_relobj : public Sized_relobj_file<32, big_endian> 1494 { 1495 public: 1496 static const Arm_address invalid_address = static_cast<Arm_address>(-1); 1497 1498 Arm_relobj(const std::string& name, Input_file* input_file, off_t offset, 1499 const typename elfcpp::Ehdr<32, big_endian>& ehdr) 1500 : Sized_relobj_file<32, big_endian>(name, input_file, offset, ehdr), 1501 stub_tables_(), local_symbol_is_thumb_function_(), 1502 attributes_section_data_(NULL), mapping_symbols_info_(), 1503 section_has_cortex_a8_workaround_(NULL), exidx_section_map_(), 1504 output_local_symbol_count_needs_update_(false), 1505 merge_flags_and_attributes_(true) 1506 { } 1507 1508 ~Arm_relobj() 1509 { delete this->attributes_section_data_; } 1510 1511 // Return the stub table of the SHNDX-th section if there is one. 1512 Stub_table<big_endian>* 1513 stub_table(unsigned int shndx) const 1514 { 1515 gold_assert(shndx < this->stub_tables_.size()); 1516 return this->stub_tables_[shndx]; 1517 } 1518 1519 // Set STUB_TABLE to be the stub_table of the SHNDX-th section. 1520 void 1521 set_stub_table(unsigned int shndx, Stub_table<big_endian>* stub_table) 1522 { 1523 gold_assert(shndx < this->stub_tables_.size()); 1524 this->stub_tables_[shndx] = stub_table; 1525 } 1526 1527 // Whether a local symbol is a THUMB function. R_SYM is the symbol table 1528 // index. This is only valid after do_count_local_symbol is called. 1529 bool 1530 local_symbol_is_thumb_function(unsigned int r_sym) const 1531 { 1532 gold_assert(r_sym < this->local_symbol_is_thumb_function_.size()); 1533 return this->local_symbol_is_thumb_function_[r_sym]; 1534 } 1535 1536 // Scan all relocation sections for stub generation. 1537 void 1538 scan_sections_for_stubs(Target_arm<big_endian>*, const Symbol_table*, 1539 const Layout*); 1540 1541 // Convert regular input section with index SHNDX to a relaxed section. 1542 void 1543 convert_input_section_to_relaxed_section(unsigned shndx) 1544 { 1545 // The stubs have relocations and we need to process them after writing 1546 // out the stubs. So relocation now must follow section write. 1547 this->set_section_offset(shndx, -1ULL); 1548 this->set_relocs_must_follow_section_writes(); 1549 } 1550 1551 // Downcast a base pointer to an Arm_relobj pointer. This is 1552 // not type-safe but we only use Arm_relobj not the base class. 1553 static Arm_relobj<big_endian>* 1554 as_arm_relobj(Relobj* relobj) 1555 { return static_cast<Arm_relobj<big_endian>*>(relobj); } 1556 1557 // Processor-specific flags in ELF file header. This is valid only after 1558 // reading symbols. 1559 elfcpp::Elf_Word 1560 processor_specific_flags() const 1561 { return this->processor_specific_flags_; } 1562 1563 // Attribute section data This is the contents of the .ARM.attribute section 1564 // if there is one. 1565 const Attributes_section_data* 1566 attributes_section_data() const 1567 { return this->attributes_section_data_; } 1568 1569 // Mapping symbol location. 1570 typedef std::pair<unsigned int, Arm_address> Mapping_symbol_position; 1571 1572 // Functor for STL container. 1573 struct Mapping_symbol_position_less 1574 { 1575 bool 1576 operator()(const Mapping_symbol_position& p1, 1577 const Mapping_symbol_position& p2) const 1578 { 1579 return (p1.first < p2.first 1580 || (p1.first == p2.first && p1.second < p2.second)); 1581 } 1582 }; 1583 1584 // We only care about the first character of a mapping symbol, so 1585 // we only store that instead of the whole symbol name. 1586 typedef std::map<Mapping_symbol_position, char, 1587 Mapping_symbol_position_less> Mapping_symbols_info; 1588 1589 // Whether a section contains any Cortex-A8 workaround. 1590 bool 1591 section_has_cortex_a8_workaround(unsigned int shndx) const 1592 { 1593 return (this->section_has_cortex_a8_workaround_ != NULL 1594 && (*this->section_has_cortex_a8_workaround_)[shndx]); 1595 } 1596 1597 // Mark a section that has Cortex-A8 workaround. 1598 void 1599 mark_section_for_cortex_a8_workaround(unsigned int shndx) 1600 { 1601 if (this->section_has_cortex_a8_workaround_ == NULL) 1602 this->section_has_cortex_a8_workaround_ = 1603 new std::vector<bool>(this->shnum(), false); 1604 (*this->section_has_cortex_a8_workaround_)[shndx] = true; 1605 } 1606 1607 // Return the EXIDX section of an text section with index SHNDX or NULL 1608 // if the text section has no associated EXIDX section. 1609 const Arm_exidx_input_section* 1610 exidx_input_section_by_link(unsigned int shndx) const 1611 { 1612 Exidx_section_map::const_iterator p = this->exidx_section_map_.find(shndx); 1613 return ((p != this->exidx_section_map_.end() 1614 && p->second->link() == shndx) 1615 ? p->second 1616 : NULL); 1617 } 1618 1619 // Return the EXIDX section with index SHNDX or NULL if there is none. 1620 const Arm_exidx_input_section* 1621 exidx_input_section_by_shndx(unsigned shndx) const 1622 { 1623 Exidx_section_map::const_iterator p = this->exidx_section_map_.find(shndx); 1624 return ((p != this->exidx_section_map_.end() 1625 && p->second->shndx() == shndx) 1626 ? p->second 1627 : NULL); 1628 } 1629 1630 // Whether output local symbol count needs updating. 1631 bool 1632 output_local_symbol_count_needs_update() const 1633 { return this->output_local_symbol_count_needs_update_; } 1634 1635 // Set output_local_symbol_count_needs_update flag to be true. 1636 void 1637 set_output_local_symbol_count_needs_update() 1638 { this->output_local_symbol_count_needs_update_ = true; } 1639 1640 // Update output local symbol count at the end of relaxation. 1641 void 1642 update_output_local_symbol_count(); 1643 1644 // Whether we want to merge processor-specific flags and attributes. 1645 bool 1646 merge_flags_and_attributes() const 1647 { return this->merge_flags_and_attributes_; } 1648 1649 // Export list of EXIDX section indices. 1650 void 1651 get_exidx_shndx_list(std::vector<unsigned int>* list) const 1652 { 1653 list->clear(); 1654 for (Exidx_section_map::const_iterator p = this->exidx_section_map_.begin(); 1655 p != this->exidx_section_map_.end(); 1656 ++p) 1657 { 1658 if (p->second->shndx() == p->first) 1659 list->push_back(p->first); 1660 } 1661 // Sort list to make result independent of implementation of map. 1662 std::sort(list->begin(), list->end()); 1663 } 1664 1665 protected: 1666 // Post constructor setup. 1667 void 1668 do_setup() 1669 { 1670 // Call parent's setup method. 1671 Sized_relobj_file<32, big_endian>::do_setup(); 1672 1673 // Initialize look-up tables. 1674 Stub_table_list empty_stub_table_list(this->shnum(), NULL); 1675 this->stub_tables_.swap(empty_stub_table_list); 1676 } 1677 1678 // Count the local symbols. 1679 void 1680 do_count_local_symbols(Stringpool_template<char>*, 1681 Stringpool_template<char>*); 1682 1683 void 1684 do_relocate_sections( 1685 const Symbol_table* symtab, const Layout* layout, 1686 const unsigned char* pshdrs, Output_file* of, 1687 typename Sized_relobj_file<32, big_endian>::Views* pivews); 1688 1689 // Read the symbol information. 1690 void 1691 do_read_symbols(Read_symbols_data* sd); 1692 1693 // Process relocs for garbage collection. 1694 void 1695 do_gc_process_relocs(Symbol_table*, Layout*, Read_relocs_data*); 1696 1697 private: 1698 1699 // Whether a section needs to be scanned for relocation stubs. 1700 bool 1701 section_needs_reloc_stub_scanning(const elfcpp::Shdr<32, big_endian>&, 1702 const Relobj::Output_sections&, 1703 const Symbol_table*, const unsigned char*); 1704 1705 // Whether a section is a scannable text section. 1706 bool 1707 section_is_scannable(const elfcpp::Shdr<32, big_endian>&, unsigned int, 1708 const Output_section*, const Symbol_table*); 1709 1710 // Whether a section needs to be scanned for the Cortex-A8 erratum. 1711 bool 1712 section_needs_cortex_a8_stub_scanning(const elfcpp::Shdr<32, big_endian>&, 1713 unsigned int, Output_section*, 1714 const Symbol_table*); 1715 1716 // Scan a section for the Cortex-A8 erratum. 1717 void 1718 scan_section_for_cortex_a8_erratum(const elfcpp::Shdr<32, big_endian>&, 1719 unsigned int, Output_section*, 1720 Target_arm<big_endian>*); 1721 1722 // Find the linked text section of an EXIDX section by looking at the 1723 // first relocation of the EXIDX section. PSHDR points to the section 1724 // headers of a relocation section and PSYMS points to the local symbols. 1725 // PSHNDX points to a location storing the text section index if found. 1726 // Return whether we can find the linked section. 1727 bool 1728 find_linked_text_section(const unsigned char* pshdr, 1729 const unsigned char* psyms, unsigned int* pshndx); 1730 1731 // 1732 // Make a new Arm_exidx_input_section object for EXIDX section with 1733 // index SHNDX and section header SHDR. TEXT_SHNDX is the section 1734 // index of the linked text section. 1735 void 1736 make_exidx_input_section(unsigned int shndx, 1737 const elfcpp::Shdr<32, big_endian>& shdr, 1738 unsigned int text_shndx, 1739 const elfcpp::Shdr<32, big_endian>& text_shdr); 1740 1741 // Return the output address of either a plain input section or a 1742 // relaxed input section. SHNDX is the section index. 1743 Arm_address 1744 simple_input_section_output_address(unsigned int, Output_section*); 1745 1746 typedef std::vector<Stub_table<big_endian>*> Stub_table_list; 1747 typedef Unordered_map<unsigned int, const Arm_exidx_input_section*> 1748 Exidx_section_map; 1749 1750 // List of stub tables. 1751 Stub_table_list stub_tables_; 1752 // Bit vector to tell if a local symbol is a thumb function or not. 1753 // This is only valid after do_count_local_symbol is called. 1754 std::vector<bool> local_symbol_is_thumb_function_; 1755 // processor-specific flags in ELF file header. 1756 elfcpp::Elf_Word processor_specific_flags_; 1757 // Object attributes if there is an .ARM.attributes section or NULL. 1758 Attributes_section_data* attributes_section_data_; 1759 // Mapping symbols information. 1760 Mapping_symbols_info mapping_symbols_info_; 1761 // Bitmap to indicate sections with Cortex-A8 workaround or NULL. 1762 std::vector<bool>* section_has_cortex_a8_workaround_; 1763 // Map a text section to its associated .ARM.exidx section, if there is one. 1764 Exidx_section_map exidx_section_map_; 1765 // Whether output local symbol count needs updating. 1766 bool output_local_symbol_count_needs_update_; 1767 // Whether we merge processor flags and attributes of this object to 1768 // output. 1769 bool merge_flags_and_attributes_; 1770 }; 1771 1772 // Arm_dynobj class. 1773 1774 template<bool big_endian> 1775 class Arm_dynobj : public Sized_dynobj<32, big_endian> 1776 { 1777 public: 1778 Arm_dynobj(const std::string& name, Input_file* input_file, off_t offset, 1779 const elfcpp::Ehdr<32, big_endian>& ehdr) 1780 : Sized_dynobj<32, big_endian>(name, input_file, offset, ehdr), 1781 processor_specific_flags_(0), attributes_section_data_(NULL) 1782 { } 1783 1784 ~Arm_dynobj() 1785 { delete this->attributes_section_data_; } 1786 1787 // Downcast a base pointer to an Arm_relobj pointer. This is 1788 // not type-safe but we only use Arm_relobj not the base class. 1789 static Arm_dynobj<big_endian>* 1790 as_arm_dynobj(Dynobj* dynobj) 1791 { return static_cast<Arm_dynobj<big_endian>*>(dynobj); } 1792 1793 // Processor-specific flags in ELF file header. This is valid only after 1794 // reading symbols. 1795 elfcpp::Elf_Word 1796 processor_specific_flags() const 1797 { return this->processor_specific_flags_; } 1798 1799 // Attributes section data. 1800 const Attributes_section_data* 1801 attributes_section_data() const 1802 { return this->attributes_section_data_; } 1803 1804 protected: 1805 // Read the symbol information. 1806 void 1807 do_read_symbols(Read_symbols_data* sd); 1808 1809 private: 1810 // processor-specific flags in ELF file header. 1811 elfcpp::Elf_Word processor_specific_flags_; 1812 // Object attributes if there is an .ARM.attributes section or NULL. 1813 Attributes_section_data* attributes_section_data_; 1814 }; 1815 1816 // Functor to read reloc addends during stub generation. 1817 1818 template<int sh_type, bool big_endian> 1819 struct Stub_addend_reader 1820 { 1821 // Return the addend for a relocation of a particular type. Depending 1822 // on whether this is a REL or RELA relocation, read the addend from a 1823 // view or from a Reloc object. 1824 elfcpp::Elf_types<32>::Elf_Swxword 1825 operator()( 1826 unsigned int /* r_type */, 1827 const unsigned char* /* view */, 1828 const typename Reloc_types<sh_type, 1829 32, big_endian>::Reloc& /* reloc */) const; 1830 }; 1831 1832 // Specialized Stub_addend_reader for SHT_REL type relocation sections. 1833 1834 template<bool big_endian> 1835 struct Stub_addend_reader<elfcpp::SHT_REL, big_endian> 1836 { 1837 elfcpp::Elf_types<32>::Elf_Swxword 1838 operator()( 1839 unsigned int, 1840 const unsigned char*, 1841 const typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc&) const; 1842 }; 1843 1844 // Specialized Stub_addend_reader for RELA type relocation sections. 1845 // We currently do not handle RELA type relocation sections but it is trivial 1846 // to implement the addend reader. This is provided for completeness and to 1847 // make it easier to add support for RELA relocation sections in the future. 1848 1849 template<bool big_endian> 1850 struct Stub_addend_reader<elfcpp::SHT_RELA, big_endian> 1851 { 1852 elfcpp::Elf_types<32>::Elf_Swxword 1853 operator()( 1854 unsigned int, 1855 const unsigned char*, 1856 const typename Reloc_types<elfcpp::SHT_RELA, 32, 1857 big_endian>::Reloc& reloc) const 1858 { return reloc.get_r_addend(); } 1859 }; 1860 1861 // Cortex_a8_reloc class. We keep record of relocation that may need 1862 // the Cortex-A8 erratum workaround. 1863 1864 class Cortex_a8_reloc 1865 { 1866 public: 1867 Cortex_a8_reloc(Reloc_stub* reloc_stub, unsigned r_type, 1868 Arm_address destination) 1869 : reloc_stub_(reloc_stub), r_type_(r_type), destination_(destination) 1870 { } 1871 1872 ~Cortex_a8_reloc() 1873 { } 1874 1875 // Accessors: This is a read-only class. 1876 1877 // Return the relocation stub associated with this relocation if there is 1878 // one. 1879 const Reloc_stub* 1880 reloc_stub() const 1881 { return this->reloc_stub_; } 1882 1883 // Return the relocation type. 1884 unsigned int 1885 r_type() const 1886 { return this->r_type_; } 1887 1888 // Return the destination address of the relocation. LSB stores the THUMB 1889 // bit. 1890 Arm_address 1891 destination() const 1892 { return this->destination_; } 1893 1894 private: 1895 // Associated relocation stub if there is one, or NULL. 1896 const Reloc_stub* reloc_stub_; 1897 // Relocation type. 1898 unsigned int r_type_; 1899 // Destination address of this relocation. LSB is used to distinguish 1900 // ARM/THUMB mode. 1901 Arm_address destination_; 1902 }; 1903 1904 // Arm_output_data_got class. We derive this from Output_data_got to add 1905 // extra methods to handle TLS relocations in a static link. 1906 1907 template<bool big_endian> 1908 class Arm_output_data_got : public Output_data_got<32, big_endian> 1909 { 1910 public: 1911 Arm_output_data_got(Symbol_table* symtab, Layout* layout) 1912 : Output_data_got<32, big_endian>(), symbol_table_(symtab), layout_(layout) 1913 { } 1914 1915 // Add a static entry for the GOT entry at OFFSET. GSYM is a global 1916 // symbol and R_TYPE is the code of a dynamic relocation that needs to be 1917 // applied in a static link. 1918 void 1919 add_static_reloc(unsigned int got_offset, unsigned int r_type, Symbol* gsym) 1920 { this->static_relocs_.push_back(Static_reloc(got_offset, r_type, gsym)); } 1921 1922 // Add a static reloc for the GOT entry at OFFSET. RELOBJ is an object 1923 // defining a local symbol with INDEX. R_TYPE is the code of a dynamic 1924 // relocation that needs to be applied in a static link. 1925 void 1926 add_static_reloc(unsigned int got_offset, unsigned int r_type, 1927 Sized_relobj_file<32, big_endian>* relobj, 1928 unsigned int index) 1929 { 1930 this->static_relocs_.push_back(Static_reloc(got_offset, r_type, relobj, 1931 index)); 1932 } 1933 1934 // Add a GOT pair for R_ARM_TLS_GD32. The creates a pair of GOT entries. 1935 // The first one is initialized to be 1, which is the module index for 1936 // the main executable and the second one 0. A reloc of the type 1937 // R_ARM_TLS_DTPOFF32 will be created for the second GOT entry and will 1938 // be applied by gold. GSYM is a global symbol. 1939 void 1940 add_tls_gd32_with_static_reloc(unsigned int got_type, Symbol* gsym); 1941 1942 // Same as the above but for a local symbol in OBJECT with INDEX. 1943 void 1944 add_tls_gd32_with_static_reloc(unsigned int got_type, 1945 Sized_relobj_file<32, big_endian>* object, 1946 unsigned int index); 1947 1948 protected: 1949 // Write out the GOT table. 1950 void 1951 do_write(Output_file*); 1952 1953 private: 1954 // This class represent dynamic relocations that need to be applied by 1955 // gold because we are using TLS relocations in a static link. 1956 class Static_reloc 1957 { 1958 public: 1959 Static_reloc(unsigned int got_offset, unsigned int r_type, Symbol* gsym) 1960 : got_offset_(got_offset), r_type_(r_type), symbol_is_global_(true) 1961 { this->u_.global.symbol = gsym; } 1962 1963 Static_reloc(unsigned int got_offset, unsigned int r_type, 1964 Sized_relobj_file<32, big_endian>* relobj, unsigned int index) 1965 : got_offset_(got_offset), r_type_(r_type), symbol_is_global_(false) 1966 { 1967 this->u_.local.relobj = relobj; 1968 this->u_.local.index = index; 1969 } 1970 1971 // Return the GOT offset. 1972 unsigned int 1973 got_offset() const 1974 { return this->got_offset_; } 1975 1976 // Relocation type. 1977 unsigned int 1978 r_type() const 1979 { return this->r_type_; } 1980 1981 // Whether the symbol is global or not. 1982 bool 1983 symbol_is_global() const 1984 { return this->symbol_is_global_; } 1985 1986 // For a relocation against a global symbol, the global symbol. 1987 Symbol* 1988 symbol() const 1989 { 1990 gold_assert(this->symbol_is_global_); 1991 return this->u_.global.symbol; 1992 } 1993 1994 // For a relocation against a local symbol, the defining object. 1995 Sized_relobj_file<32, big_endian>* 1996 relobj() const 1997 { 1998 gold_assert(!this->symbol_is_global_); 1999 return this->u_.local.relobj; 2000 } 2001 2002 // For a relocation against a local symbol, the local symbol index. 2003 unsigned int 2004 index() const 2005 { 2006 gold_assert(!this->symbol_is_global_); 2007 return this->u_.local.index; 2008 } 2009 2010 private: 2011 // GOT offset of the entry to which this relocation is applied. 2012 unsigned int got_offset_; 2013 // Type of relocation. 2014 unsigned int r_type_; 2015 // Whether this relocation is against a global symbol. 2016 bool symbol_is_global_; 2017 // A global or local symbol. 2018 union 2019 { 2020 struct 2021 { 2022 // For a global symbol, the symbol itself. 2023 Symbol* symbol; 2024 } global; 2025 struct 2026 { 2027 // For a local symbol, the object defining object. 2028 Sized_relobj_file<32, big_endian>* relobj; 2029 // For a local symbol, the symbol index. 2030 unsigned int index; 2031 } local; 2032 } u_; 2033 }; 2034 2035 // Symbol table of the output object. 2036 Symbol_table* symbol_table_; 2037 // Layout of the output object. 2038 Layout* layout_; 2039 // Static relocs to be applied to the GOT. 2040 std::vector<Static_reloc> static_relocs_; 2041 }; 2042 2043 // The ARM target has many relocation types with odd-sizes or noncontiguous 2044 // bits. The default handling of relocatable relocation cannot process these 2045 // relocations. So we have to extend the default code. 2046 2047 template<bool big_endian, typename Classify_reloc> 2048 class Arm_scan_relocatable_relocs : 2049 public Default_scan_relocatable_relocs<Classify_reloc> 2050 { 2051 public: 2052 // Return the strategy to use for a local symbol which is a section 2053 // symbol, given the relocation type. 2054 inline Relocatable_relocs::Reloc_strategy 2055 local_section_strategy(unsigned int r_type, Relobj*) 2056 { 2057 if (Classify_reloc::sh_type == elfcpp::SHT_RELA) 2058 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_RELA; 2059 else 2060 { 2061 if (r_type == elfcpp::R_ARM_TARGET1 2062 || r_type == elfcpp::R_ARM_TARGET2) 2063 { 2064 const Target_arm<big_endian>* arm_target = 2065 Target_arm<big_endian>::default_target(); 2066 r_type = arm_target->get_real_reloc_type(r_type); 2067 } 2068 2069 switch(r_type) 2070 { 2071 // Relocations that write nothing. These exclude R_ARM_TARGET1 2072 // and R_ARM_TARGET2. 2073 case elfcpp::R_ARM_NONE: 2074 case elfcpp::R_ARM_V4BX: 2075 case elfcpp::R_ARM_TLS_GOTDESC: 2076 case elfcpp::R_ARM_TLS_CALL: 2077 case elfcpp::R_ARM_TLS_DESCSEQ: 2078 case elfcpp::R_ARM_THM_TLS_CALL: 2079 case elfcpp::R_ARM_GOTRELAX: 2080 case elfcpp::R_ARM_GNU_VTENTRY: 2081 case elfcpp::R_ARM_GNU_VTINHERIT: 2082 case elfcpp::R_ARM_THM_TLS_DESCSEQ16: 2083 case elfcpp::R_ARM_THM_TLS_DESCSEQ32: 2084 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_0; 2085 // These should have been converted to something else above. 2086 case elfcpp::R_ARM_TARGET1: 2087 case elfcpp::R_ARM_TARGET2: 2088 gold_unreachable(); 2089 // Relocations that write full 32 bits and 2090 // have alignment of 1. 2091 case elfcpp::R_ARM_ABS32: 2092 case elfcpp::R_ARM_REL32: 2093 case elfcpp::R_ARM_SBREL32: 2094 case elfcpp::R_ARM_GOTOFF32: 2095 case elfcpp::R_ARM_BASE_PREL: 2096 case elfcpp::R_ARM_GOT_BREL: 2097 case elfcpp::R_ARM_BASE_ABS: 2098 case elfcpp::R_ARM_ABS32_NOI: 2099 case elfcpp::R_ARM_REL32_NOI: 2100 case elfcpp::R_ARM_PLT32_ABS: 2101 case elfcpp::R_ARM_GOT_ABS: 2102 case elfcpp::R_ARM_GOT_PREL: 2103 case elfcpp::R_ARM_TLS_GD32: 2104 case elfcpp::R_ARM_TLS_LDM32: 2105 case elfcpp::R_ARM_TLS_LDO32: 2106 case elfcpp::R_ARM_TLS_IE32: 2107 case elfcpp::R_ARM_TLS_LE32: 2108 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_4_UNALIGNED; 2109 default: 2110 // For all other static relocations, return RELOC_SPECIAL. 2111 return Relocatable_relocs::RELOC_SPECIAL; 2112 } 2113 } 2114 } 2115 }; 2116 2117 template<bool big_endian> 2118 class Target_arm : public Sized_target<32, big_endian> 2119 { 2120 public: 2121 typedef Output_data_reloc<elfcpp::SHT_REL, true, 32, big_endian> 2122 Reloc_section; 2123 typedef Output_data_reloc<elfcpp::SHT_RELR, true, 32, big_endian> 2124 Relr_section; 2125 2126 // When were are relocating a stub, we pass this as the relocation number. 2127 static const size_t fake_relnum_for_stubs = static_cast<size_t>(-1); 2128 2129 Target_arm(const Target::Target_info* info = &arm_info) 2130 : Sized_target<32, big_endian>(info), 2131 got_(NULL), plt_(NULL), got_plt_(NULL), got_irelative_(NULL), 2132 rel_dyn_(NULL), rel_irelative_(NULL), relr_dyn_(NULL), 2133 copy_relocs_(elfcpp::R_ARM_COPY), 2134 got_mod_index_offset_(-1U), tls_base_symbol_defined_(false), 2135 stub_tables_(), stub_factory_(Stub_factory::get_instance()), 2136 should_force_pic_veneer_(false), 2137 arm_input_section_map_(), attributes_section_data_(NULL), 2138 fix_cortex_a8_(false), cortex_a8_relocs_info_() 2139 { } 2140 2141 // Whether we force PCI branch veneers. 2142 bool 2143 should_force_pic_veneer() const 2144 { return this->should_force_pic_veneer_; } 2145 2146 // Set PIC veneer flag. 2147 void 2148 set_should_force_pic_veneer(bool value) 2149 { this->should_force_pic_veneer_ = value; } 2150 2151 // Whether we use THUMB-2 instructions. 2152 bool 2153 using_thumb2() const 2154 { 2155 Object_attribute* attr = 2156 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch); 2157 int arch = attr->int_value(); 2158 return arch == elfcpp::TAG_CPU_ARCH_V6T2 || arch >= elfcpp::TAG_CPU_ARCH_V7; 2159 } 2160 2161 // Whether we use THUMB/THUMB-2 instructions only. 2162 bool 2163 using_thumb_only() const 2164 { 2165 Object_attribute* attr = 2166 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch); 2167 2168 if (attr->int_value() == elfcpp::TAG_CPU_ARCH_V6_M 2169 || attr->int_value() == elfcpp::TAG_CPU_ARCH_V6S_M) 2170 return true; 2171 if (attr->int_value() != elfcpp::TAG_CPU_ARCH_V7 2172 && attr->int_value() != elfcpp::TAG_CPU_ARCH_V7E_M) 2173 return false; 2174 attr = this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile); 2175 return attr->int_value() == 'M'; 2176 } 2177 2178 // Whether we have an NOP instruction. If not, use mov r0, r0 instead. 2179 bool 2180 may_use_arm_nop() const 2181 { 2182 Object_attribute* attr = 2183 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch); 2184 int arch = attr->int_value(); 2185 return (arch == elfcpp::TAG_CPU_ARCH_V6T2 2186 || arch == elfcpp::TAG_CPU_ARCH_V6K 2187 || arch == elfcpp::TAG_CPU_ARCH_V7 2188 || arch == elfcpp::TAG_CPU_ARCH_V7E_M); 2189 } 2190 2191 // Whether we have THUMB-2 NOP.W instruction. 2192 bool 2193 may_use_thumb2_nop() const 2194 { 2195 Object_attribute* attr = 2196 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch); 2197 int arch = attr->int_value(); 2198 return (arch == elfcpp::TAG_CPU_ARCH_V6T2 2199 || arch == elfcpp::TAG_CPU_ARCH_V7 2200 || arch == elfcpp::TAG_CPU_ARCH_V7E_M); 2201 } 2202 2203 // Whether we have v4T interworking instructions available. 2204 bool 2205 may_use_v4t_interworking() const 2206 { 2207 Object_attribute* attr = 2208 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch); 2209 int arch = attr->int_value(); 2210 return (arch != elfcpp::TAG_CPU_ARCH_PRE_V4 2211 && arch != elfcpp::TAG_CPU_ARCH_V4); 2212 } 2213 2214 // Whether we have v5T interworking instructions available. 2215 bool 2216 may_use_v5t_interworking() const 2217 { 2218 Object_attribute* attr = 2219 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch); 2220 int arch = attr->int_value(); 2221 if (parameters->options().fix_arm1176()) 2222 return (arch == elfcpp::TAG_CPU_ARCH_V6T2 2223 || arch == elfcpp::TAG_CPU_ARCH_V7 2224 || arch == elfcpp::TAG_CPU_ARCH_V6_M 2225 || arch == elfcpp::TAG_CPU_ARCH_V6S_M 2226 || arch == elfcpp::TAG_CPU_ARCH_V7E_M); 2227 else 2228 return (arch != elfcpp::TAG_CPU_ARCH_PRE_V4 2229 && arch != elfcpp::TAG_CPU_ARCH_V4 2230 && arch != elfcpp::TAG_CPU_ARCH_V4T); 2231 } 2232 2233 // Process the relocations to determine unreferenced sections for 2234 // garbage collection. 2235 void 2236 gc_process_relocs(Symbol_table* symtab, 2237 Layout* layout, 2238 Sized_relobj_file<32, big_endian>* object, 2239 unsigned int data_shndx, 2240 unsigned int sh_type, 2241 const unsigned char* prelocs, 2242 size_t reloc_count, 2243 Output_section* output_section, 2244 bool needs_special_offset_handling, 2245 size_t local_symbol_count, 2246 const unsigned char* plocal_symbols); 2247 2248 // Scan the relocations to look for symbol adjustments. 2249 void 2250 scan_relocs(Symbol_table* symtab, 2251 Layout* layout, 2252 Sized_relobj_file<32, big_endian>* object, 2253 unsigned int data_shndx, 2254 unsigned int sh_type, 2255 const unsigned char* prelocs, 2256 size_t reloc_count, 2257 Output_section* output_section, 2258 bool needs_special_offset_handling, 2259 size_t local_symbol_count, 2260 const unsigned char* plocal_symbols); 2261 2262 // Finalize the sections. 2263 void 2264 do_finalize_sections(Layout*, const Input_objects*, Symbol_table*); 2265 2266 // Return the value to use for a dynamic symbol which requires special 2267 // treatment. 2268 uint64_t 2269 do_dynsym_value(const Symbol*) const; 2270 2271 // Return the plt address for globals. Since we have irelative plt entries, 2272 // address calculation is not as straightforward as plt_address + plt_offset. 2273 uint64_t 2274 do_plt_address_for_global(const Symbol* gsym) const 2275 { return this->plt_section()->address_for_global(gsym); } 2276 2277 // Return the plt address for locals. Since we have irelative plt entries, 2278 // address calculation is not as straightforward as plt_address + plt_offset. 2279 uint64_t 2280 do_plt_address_for_local(const Relobj* relobj, unsigned int symndx) const 2281 { return this->plt_section()->address_for_local(relobj, symndx); } 2282 2283 // Relocate a section. 2284 void 2285 relocate_section(const Relocate_info<32, big_endian>*, 2286 unsigned int sh_type, 2287 const unsigned char* prelocs, 2288 size_t reloc_count, 2289 Output_section* output_section, 2290 bool needs_special_offset_handling, 2291 unsigned char* view, 2292 Arm_address view_address, 2293 section_size_type view_size, 2294 const Reloc_symbol_changes*); 2295 2296 // Scan the relocs during a relocatable link. 2297 void 2298 scan_relocatable_relocs(Symbol_table* symtab, 2299 Layout* layout, 2300 Sized_relobj_file<32, big_endian>* object, 2301 unsigned int data_shndx, 2302 unsigned int sh_type, 2303 const unsigned char* prelocs, 2304 size_t reloc_count, 2305 Output_section* output_section, 2306 bool needs_special_offset_handling, 2307 size_t local_symbol_count, 2308 const unsigned char* plocal_symbols, 2309 Relocatable_relocs*); 2310 2311 // Scan the relocs for --emit-relocs. 2312 void 2313 emit_relocs_scan(Symbol_table* symtab, 2314 Layout* layout, 2315 Sized_relobj_file<32, big_endian>* object, 2316 unsigned int data_shndx, 2317 unsigned int sh_type, 2318 const unsigned char* prelocs, 2319 size_t reloc_count, 2320 Output_section* output_section, 2321 bool needs_special_offset_handling, 2322 size_t local_symbol_count, 2323 const unsigned char* plocal_syms, 2324 Relocatable_relocs* rr); 2325 2326 // Emit relocations for a section. 2327 void 2328 relocate_relocs(const Relocate_info<32, big_endian>*, 2329 unsigned int sh_type, 2330 const unsigned char* prelocs, 2331 size_t reloc_count, 2332 Output_section* output_section, 2333 typename elfcpp::Elf_types<32>::Elf_Off 2334 offset_in_output_section, 2335 unsigned char* view, 2336 Arm_address view_address, 2337 section_size_type view_size, 2338 unsigned char* reloc_view, 2339 section_size_type reloc_view_size); 2340 2341 // Perform target-specific processing in a relocatable link. This is 2342 // only used if we use the relocation strategy RELOC_SPECIAL. 2343 void 2344 relocate_special_relocatable(const Relocate_info<32, big_endian>* relinfo, 2345 unsigned int sh_type, 2346 const unsigned char* preloc_in, 2347 size_t relnum, 2348 Output_section* output_section, 2349 typename elfcpp::Elf_types<32>::Elf_Off 2350 offset_in_output_section, 2351 unsigned char* view, 2352 typename elfcpp::Elf_types<32>::Elf_Addr 2353 view_address, 2354 section_size_type view_size, 2355 unsigned char* preloc_out); 2356 2357 // Return whether SYM is defined by the ABI. 2358 bool 2359 do_is_defined_by_abi(const Symbol* sym) const 2360 { return strcmp(sym->name(), "__tls_get_addr") == 0; } 2361 2362 // Return whether there is a GOT section. 2363 bool 2364 has_got_section() const 2365 { return this->got_ != NULL; } 2366 2367 // Return the size of the GOT section. 2368 section_size_type 2369 got_size() const 2370 { 2371 gold_assert(this->got_ != NULL); 2372 return this->got_->data_size(); 2373 } 2374 2375 // Return the number of entries in the GOT. 2376 unsigned int 2377 got_entry_count() const 2378 { 2379 if (!this->has_got_section()) 2380 return 0; 2381 return this->got_size() / 4; 2382 } 2383 2384 // Return the number of entries in the PLT. 2385 unsigned int 2386 plt_entry_count() const; 2387 2388 // Return the offset of the first non-reserved PLT entry. 2389 unsigned int 2390 first_plt_entry_offset() const; 2391 2392 // Return the size of each PLT entry. 2393 unsigned int 2394 plt_entry_size() const; 2395 2396 // Get the section to use for IRELATIVE relocations, create it if necessary. 2397 Reloc_section* 2398 rel_irelative_section(Layout*); 2399 2400 // Map platform-specific reloc types 2401 static unsigned int 2402 get_real_reloc_type(unsigned int r_type); 2403 2404 // 2405 // Methods to support stub-generations. 2406 // 2407 2408 // Return the stub factory 2409 const Stub_factory& 2410 stub_factory() const 2411 { return this->stub_factory_; } 2412 2413 // Make a new Arm_input_section object. 2414 Arm_input_section<big_endian>* 2415 new_arm_input_section(Relobj*, unsigned int); 2416 2417 // Find the Arm_input_section object corresponding to the SHNDX-th input 2418 // section of RELOBJ. 2419 Arm_input_section<big_endian>* 2420 find_arm_input_section(Relobj* relobj, unsigned int shndx) const; 2421 2422 // Make a new Stub_table 2423 Stub_table<big_endian>* 2424 new_stub_table(Arm_input_section<big_endian>*); 2425 2426 // Scan a section for stub generation. 2427 void 2428 scan_section_for_stubs(const Relocate_info<32, big_endian>*, unsigned int, 2429 const unsigned char*, size_t, Output_section*, 2430 bool, const unsigned char*, Arm_address, 2431 section_size_type); 2432 2433 // Relocate a stub. 2434 void 2435 relocate_stub(Stub*, const Relocate_info<32, big_endian>*, 2436 Output_section*, unsigned char*, Arm_address, 2437 section_size_type); 2438 2439 // Get the default ARM target. 2440 static Target_arm<big_endian>* 2441 default_target() 2442 { 2443 gold_assert(parameters->target().machine_code() == elfcpp::EM_ARM 2444 && parameters->target().is_big_endian() == big_endian); 2445 return static_cast<Target_arm<big_endian>*>( 2446 parameters->sized_target<32, big_endian>()); 2447 } 2448 2449 // Whether NAME belongs to a mapping symbol. 2450 static bool 2451 is_mapping_symbol_name(const char* name) 2452 { 2453 return (name 2454 && name[0] == '$' 2455 && (name[1] == 'a' || name[1] == 't' || name[1] == 'd') 2456 && (name[2] == '\0' || name[2] == '.')); 2457 } 2458 2459 // Whether we work around the Cortex-A8 erratum. 2460 bool 2461 fix_cortex_a8() const 2462 { return this->fix_cortex_a8_; } 2463 2464 // Whether we merge exidx entries in debuginfo. 2465 bool 2466 merge_exidx_entries() const 2467 { return parameters->options().merge_exidx_entries(); } 2468 2469 // Whether we fix R_ARM_V4BX relocation. 2470 // 0 - do not fix 2471 // 1 - replace with MOV instruction (armv4 target) 2472 // 2 - make interworking veneer (>= armv4t targets only) 2473 General_options::Fix_v4bx 2474 fix_v4bx() const 2475 { return parameters->options().fix_v4bx(); } 2476 2477 // Scan a span of THUMB code section for Cortex-A8 erratum. 2478 void 2479 scan_span_for_cortex_a8_erratum(Arm_relobj<big_endian>*, unsigned int, 2480 section_size_type, section_size_type, 2481 const unsigned char*, Arm_address); 2482 2483 // Apply Cortex-A8 workaround to a branch. 2484 void 2485 apply_cortex_a8_workaround(const Cortex_a8_stub*, Arm_address, 2486 unsigned char*, Arm_address); 2487 2488 protected: 2489 // Make the PLT-generator object. 2490 Output_data_plt_arm<big_endian>* 2491 make_data_plt(Layout* layout, 2492 Arm_output_data_got<big_endian>* got, 2493 Output_data_space* got_plt, 2494 Output_data_space* got_irelative) 2495 { return this->do_make_data_plt(layout, got, got_plt, got_irelative); } 2496 2497 // Make an ELF object. 2498 Object* 2499 do_make_elf_object(const std::string&, Input_file*, off_t, 2500 const elfcpp::Ehdr<32, big_endian>& ehdr); 2501 2502 Object* 2503 do_make_elf_object(const std::string&, Input_file*, off_t, 2504 const elfcpp::Ehdr<32, !big_endian>&) 2505 { gold_unreachable(); } 2506 2507 Object* 2508 do_make_elf_object(const std::string&, Input_file*, off_t, 2509 const elfcpp::Ehdr<64, false>&) 2510 { gold_unreachable(); } 2511 2512 Object* 2513 do_make_elf_object(const std::string&, Input_file*, off_t, 2514 const elfcpp::Ehdr<64, true>&) 2515 { gold_unreachable(); } 2516 2517 // Make an output section. 2518 Output_section* 2519 do_make_output_section(const char* name, elfcpp::Elf_Word type, 2520 elfcpp::Elf_Xword flags) 2521 { return new Arm_output_section<big_endian>(name, type, flags); } 2522 2523 void 2524 do_adjust_elf_header(unsigned char* view, int len); 2525 2526 bool 2527 do_may_relax() const 2528 { 2529 // If generating '.relr.dyn' section, we need a relaxation pass 2530 // to do the shrinking after all the offsets have been populated. 2531 if (parameters->options().experimental_use_relr()) 2532 return true; 2533 // We need to generate stubs, and hence perform relaxation if we are 2534 // not doing relocatable linking. 2535 return !parameters->options().relocatable(); 2536 } 2537 2538 bool 2539 do_relax(int, const Input_objects*, Symbol_table*, Layout*, const Task*); 2540 2541 // Determine whether an object attribute tag takes an integer, a 2542 // string or both. 2543 int 2544 do_attribute_arg_type(int tag) const; 2545 2546 // Reorder tags during output. 2547 int 2548 do_attributes_order(int num) const; 2549 2550 // This is called when the target is selected as the default. 2551 void 2552 do_select_as_default_target() 2553 { 2554 // No locking is required since there should only be one default target. 2555 // We cannot have both the big-endian and little-endian ARM targets 2556 // as the default. 2557 gold_assert(arm_reloc_property_table == NULL); 2558 arm_reloc_property_table = new Arm_reloc_property_table(); 2559 } 2560 2561 // Virtual function which is set to return true by a target if 2562 // it can use relocation types to determine if a function's 2563 // pointer is taken. 2564 virtual bool 2565 do_can_check_for_function_pointers() const 2566 { return true; } 2567 2568 // Whether a section called SECTION_NAME may have function pointers to 2569 // sections not eligible for safe ICF folding. 2570 virtual bool 2571 do_section_may_have_icf_unsafe_pointers(const char* section_name) const 2572 { 2573 return (!is_prefix_of(".ARM.exidx", section_name) 2574 && !is_prefix_of(".ARM.extab", section_name) 2575 && Target::do_section_may_have_icf_unsafe_pointers(section_name)); 2576 } 2577 2578 virtual void 2579 do_define_standard_symbols(Symbol_table*, Layout*); 2580 2581 virtual Output_data_plt_arm<big_endian>* 2582 do_make_data_plt(Layout* layout, 2583 Arm_output_data_got<big_endian>* got, 2584 Output_data_space* got_plt, 2585 Output_data_space* got_irelative) 2586 { 2587 gold_assert(got_plt != NULL && got_irelative != NULL); 2588 if (parameters->options().long_plt()) 2589 return new Output_data_plt_arm_long<big_endian>( 2590 layout, got, got_plt, got_irelative); 2591 else 2592 return new Output_data_plt_arm_short<big_endian>( 2593 layout, got, got_plt, got_irelative); 2594 } 2595 2596 private: 2597 // The class which scans relocations. 2598 class Scan 2599 { 2600 public: 2601 Scan() 2602 : issued_non_pic_error_(false) 2603 { } 2604 2605 static inline int 2606 get_reference_flags(unsigned int r_type); 2607 2608 inline void 2609 local(Symbol_table* symtab, Layout* layout, Target_arm* target, 2610 Sized_relobj_file<32, big_endian>* object, 2611 unsigned int data_shndx, 2612 Output_section* output_section, 2613 const elfcpp::Rel<32, big_endian>& reloc, unsigned int r_type, 2614 const elfcpp::Sym<32, big_endian>& lsym, 2615 bool is_discarded); 2616 2617 inline void 2618 global(Symbol_table* symtab, Layout* layout, Target_arm* target, 2619 Sized_relobj_file<32, big_endian>* object, 2620 unsigned int data_shndx, 2621 Output_section* output_section, 2622 const elfcpp::Rel<32, big_endian>& reloc, unsigned int r_type, 2623 Symbol* gsym); 2624 2625 inline bool 2626 local_reloc_may_be_function_pointer(Symbol_table* , Layout* , Target_arm* , 2627 Sized_relobj_file<32, big_endian>* , 2628 unsigned int , 2629 Output_section* , 2630 const elfcpp::Rel<32, big_endian>& , 2631 unsigned int , 2632 const elfcpp::Sym<32, big_endian>&); 2633 2634 inline bool 2635 global_reloc_may_be_function_pointer(Symbol_table* , Layout* , Target_arm* , 2636 Sized_relobj_file<32, big_endian>* , 2637 unsigned int , 2638 Output_section* , 2639 const elfcpp::Rel<32, big_endian>& , 2640 unsigned int , Symbol*); 2641 2642 private: 2643 static void 2644 unsupported_reloc_local(Sized_relobj_file<32, big_endian>*, 2645 unsigned int r_type); 2646 2647 static void 2648 unsupported_reloc_global(Sized_relobj_file<32, big_endian>*, 2649 unsigned int r_type, Symbol*); 2650 2651 void 2652 check_non_pic(Relobj*, unsigned int r_type); 2653 2654 // Almost identical to Symbol::needs_plt_entry except that it also 2655 // handles STT_ARM_TFUNC. 2656 static bool 2657 symbol_needs_plt_entry(const Symbol* sym) 2658 { 2659 // An undefined symbol from an executable does not need a PLT entry. 2660 if (sym->is_undefined() && !parameters->options().shared()) 2661 return false; 2662 2663 if (sym->type() == elfcpp::STT_GNU_IFUNC) 2664 return true; 2665 2666 return (!parameters->doing_static_link() 2667 && (sym->type() == elfcpp::STT_FUNC 2668 || sym->type() == elfcpp::STT_ARM_TFUNC) 2669 && (sym->is_from_dynobj() 2670 || sym->is_undefined() 2671 || sym->is_preemptible())); 2672 } 2673 2674 inline bool 2675 possible_function_pointer_reloc(unsigned int r_type); 2676 2677 // Whether a plt entry is needed for ifunc. 2678 bool 2679 reloc_needs_plt_for_ifunc(Sized_relobj_file<32, big_endian>*, 2680 unsigned int r_type); 2681 2682 // Whether we have issued an error about a non-PIC compilation. 2683 bool issued_non_pic_error_; 2684 }; 2685 2686 // The class which implements relocation. 2687 class Relocate 2688 { 2689 public: 2690 Relocate() 2691 { } 2692 2693 ~Relocate() 2694 { } 2695 2696 // Return whether the static relocation needs to be applied. 2697 inline bool 2698 should_apply_static_reloc(const Sized_symbol<32>* gsym, 2699 unsigned int r_type, 2700 bool is_32bit, 2701 Output_section* output_section); 2702 2703 // Do a relocation. Return false if the caller should not issue 2704 // any warnings about this relocation. 2705 inline bool 2706 relocate(const Relocate_info<32, big_endian>*, unsigned int, 2707 Target_arm*, Output_section*, size_t, const unsigned char*, 2708 const Sized_symbol<32>*, const Symbol_value<32>*, 2709 unsigned char*, Arm_address, section_size_type); 2710 2711 // Return whether we want to pass flag NON_PIC_REF for this 2712 // reloc. This means the relocation type accesses a symbol not via 2713 // GOT or PLT. 2714 static inline bool 2715 reloc_is_non_pic(unsigned int r_type) 2716 { 2717 switch (r_type) 2718 { 2719 // These relocation types reference GOT or PLT entries explicitly. 2720 case elfcpp::R_ARM_GOT_BREL: 2721 case elfcpp::R_ARM_GOT_ABS: 2722 case elfcpp::R_ARM_GOT_PREL: 2723 case elfcpp::R_ARM_GOT_BREL12: 2724 case elfcpp::R_ARM_PLT32_ABS: 2725 case elfcpp::R_ARM_TLS_GD32: 2726 case elfcpp::R_ARM_TLS_LDM32: 2727 case elfcpp::R_ARM_TLS_IE32: 2728 case elfcpp::R_ARM_TLS_IE12GP: 2729 2730 // These relocate types may use PLT entries. 2731 case elfcpp::R_ARM_CALL: 2732 case elfcpp::R_ARM_THM_CALL: 2733 case elfcpp::R_ARM_JUMP24: 2734 case elfcpp::R_ARM_THM_JUMP24: 2735 case elfcpp::R_ARM_THM_JUMP19: 2736 case elfcpp::R_ARM_PLT32: 2737 case elfcpp::R_ARM_THM_XPC22: 2738 case elfcpp::R_ARM_PREL31: 2739 case elfcpp::R_ARM_SBREL31: 2740 return false; 2741 2742 default: 2743 return true; 2744 } 2745 } 2746 2747 private: 2748 // Do a TLS relocation. 2749 inline typename Arm_relocate_functions<big_endian>::Status 2750 relocate_tls(const Relocate_info<32, big_endian>*, Target_arm<big_endian>*, 2751 size_t, const elfcpp::Rel<32, big_endian>&, unsigned int, 2752 const Sized_symbol<32>*, const Symbol_value<32>*, 2753 unsigned char*, elfcpp::Elf_types<32>::Elf_Addr, 2754 section_size_type); 2755 2756 }; 2757 2758 // A class for inquiring about properties of a relocation, 2759 // used while scanning relocs during a relocatable link and 2760 // garbage collection. 2761 class Classify_reloc : 2762 public gold::Default_classify_reloc<elfcpp::SHT_REL, 32, big_endian> 2763 { 2764 public: 2765 typedef typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc 2766 Reltype; 2767 2768 // Return the explicit addend of the relocation (return 0 for SHT_REL). 2769 static typename elfcpp::Elf_types<32>::Elf_Swxword 2770 get_r_addend(const Reltype*) 2771 { return 0; } 2772 2773 // Return the size of the addend of the relocation (only used for SHT_REL). 2774 static unsigned int 2775 get_size_for_reloc(unsigned int, Relobj*); 2776 }; 2777 2778 // Adjust TLS relocation type based on the options and whether this 2779 // is a local symbol. 2780 static tls::Tls_optimization 2781 optimize_tls_reloc(bool is_final, int r_type); 2782 2783 // Get the GOT section, creating it if necessary. 2784 Arm_output_data_got<big_endian>* 2785 got_section(Symbol_table*, Layout*); 2786 2787 // Get the GOT PLT section. 2788 Output_data_space* 2789 got_plt_section() const 2790 { 2791 gold_assert(this->got_plt_ != NULL); 2792 return this->got_plt_; 2793 } 2794 2795 // Create the PLT section. 2796 void 2797 make_plt_section(Symbol_table* symtab, Layout* layout); 2798 2799 // Create a PLT entry for a global symbol. 2800 void 2801 make_plt_entry(Symbol_table*, Layout*, Symbol*); 2802 2803 // Create a PLT entry for a local STT_GNU_IFUNC symbol. 2804 void 2805 make_local_ifunc_plt_entry(Symbol_table*, Layout*, 2806 Sized_relobj_file<32, big_endian>* relobj, 2807 unsigned int local_sym_index); 2808 2809 // Define the _TLS_MODULE_BASE_ symbol in the TLS segment. 2810 void 2811 define_tls_base_symbol(Symbol_table*, Layout*); 2812 2813 // Create a GOT entry for the TLS module index. 2814 unsigned int 2815 got_mod_index_entry(Symbol_table* symtab, Layout* layout, 2816 Sized_relobj_file<32, big_endian>* object); 2817 2818 // Get the PLT section. 2819 const Output_data_plt_arm<big_endian>* 2820 plt_section() const 2821 { 2822 gold_assert(this->plt_ != NULL); 2823 return this->plt_; 2824 } 2825 2826 // Get the dynamic reloc section, creating it if necessary. 2827 Reloc_section* 2828 rel_dyn_section(Layout*); 2829 2830 // Get the section to use for TLS_DESC relocations. 2831 Reloc_section* 2832 rel_tls_desc_section(Layout*) const; 2833 2834 // Get the RELR dynamic reloc section, creating it if necessary. 2835 Relr_section* 2836 relr_dyn_section(Layout*); 2837 2838 // Return true if the symbol may need a COPY relocation. 2839 // References from an executable object to non-function symbols 2840 // defined in a dynamic object may need a COPY relocation. 2841 bool 2842 may_need_copy_reloc(Symbol* gsym) 2843 { 2844 return (gsym->type() != elfcpp::STT_ARM_TFUNC 2845 && gsym->may_need_copy_reloc()); 2846 } 2847 2848 // Add a potential copy relocation. 2849 void 2850 copy_reloc(Symbol_table* symtab, Layout* layout, 2851 Sized_relobj_file<32, big_endian>* object, 2852 unsigned int shndx, Output_section* output_section, 2853 Symbol* sym, const elfcpp::Rel<32, big_endian>& reloc) 2854 { 2855 unsigned int r_type = elfcpp::elf_r_type<32>(reloc.get_r_info()); 2856 this->copy_relocs_.copy_reloc(symtab, layout, 2857 symtab->get_sized_symbol<32>(sym), 2858 object, shndx, output_section, 2859 r_type, reloc.get_r_offset(), 0, 2860 this->rel_dyn_section(layout)); 2861 } 2862 2863 // Whether two EABI versions are compatible. 2864 static bool 2865 are_eabi_versions_compatible(elfcpp::Elf_Word v1, elfcpp::Elf_Word v2); 2866 2867 // Merge processor-specific flags from input object and those in the ELF 2868 // header of the output. 2869 void 2870 merge_processor_specific_flags(const std::string&, elfcpp::Elf_Word); 2871 2872 // Get the secondary compatible architecture. 2873 static int 2874 get_secondary_compatible_arch(const Attributes_section_data*); 2875 2876 // Set the secondary compatible architecture. 2877 static void 2878 set_secondary_compatible_arch(Attributes_section_data*, int); 2879 2880 static int 2881 tag_cpu_arch_combine(const char*, int, int*, int, int); 2882 2883 // Helper to print AEABI enum tag value. 2884 static std::string 2885 aeabi_enum_name(unsigned int); 2886 2887 // Return string value for TAG_CPU_name. 2888 static std::string 2889 tag_cpu_name_value(unsigned int); 2890 2891 // Query attributes object to see if integer divide instructions may be 2892 // present in an object. 2893 static bool 2894 attributes_accept_div(int arch, int profile, 2895 const Object_attribute* div_attr); 2896 2897 // Query attributes object to see if integer divide instructions are 2898 // forbidden to be in the object. This is not the inverse of 2899 // attributes_accept_div. 2900 static bool 2901 attributes_forbid_div(const Object_attribute* div_attr); 2902 2903 // Merge object attributes from input object and those in the output. 2904 void 2905 merge_object_attributes(const char*, const Attributes_section_data*); 2906 2907 // Helper to get an AEABI object attribute 2908 Object_attribute* 2909 get_aeabi_object_attribute(int tag) const 2910 { 2911 Attributes_section_data* pasd = this->attributes_section_data_; 2912 gold_assert(pasd != NULL); 2913 Object_attribute* attr = 2914 pasd->get_attribute(Object_attribute::OBJ_ATTR_PROC, tag); 2915 gold_assert(attr != NULL); 2916 return attr; 2917 } 2918 2919 // 2920 // Methods to support stub-generations. 2921 // 2922 2923 // Group input sections for stub generation. 2924 void 2925 group_sections(Layout*, section_size_type, bool, const Task*); 2926 2927 // Scan a relocation for stub generation. 2928 void 2929 scan_reloc_for_stub(const Relocate_info<32, big_endian>*, unsigned int, 2930 const Sized_symbol<32>*, unsigned int, 2931 const Symbol_value<32>*, 2932 elfcpp::Elf_types<32>::Elf_Swxword, Arm_address); 2933 2934 // Scan a relocation section for stub. 2935 template<int sh_type> 2936 void 2937 scan_reloc_section_for_stubs( 2938 const Relocate_info<32, big_endian>* relinfo, 2939 const unsigned char* prelocs, 2940 size_t reloc_count, 2941 Output_section* output_section, 2942 bool needs_special_offset_handling, 2943 const unsigned char* view, 2944 elfcpp::Elf_types<32>::Elf_Addr view_address, 2945 section_size_type); 2946 2947 // Fix .ARM.exidx section coverage. 2948 void 2949 fix_exidx_coverage(Layout*, const Input_objects*, 2950 Arm_output_section<big_endian>*, Symbol_table*, 2951 const Task*); 2952 2953 // Functors for STL set. 2954 struct output_section_address_less_than 2955 { 2956 bool 2957 operator()(const Output_section* s1, const Output_section* s2) const 2958 { return s1->address() < s2->address(); } 2959 }; 2960 2961 // Information about this specific target which we pass to the 2962 // general Target structure. 2963 static const Target::Target_info arm_info; 2964 2965 // The types of GOT entries needed for this platform. 2966 // These values are exposed to the ABI in an incremental link. 2967 // Do not renumber existing values without changing the version 2968 // number of the .gnu_incremental_inputs section. 2969 enum Got_type 2970 { 2971 GOT_TYPE_STANDARD = 0, // GOT entry for a regular symbol 2972 GOT_TYPE_TLS_NOFFSET = 1, // GOT entry for negative TLS offset 2973 GOT_TYPE_TLS_OFFSET = 2, // GOT entry for positive TLS offset 2974 GOT_TYPE_TLS_PAIR = 3, // GOT entry for TLS module/offset pair 2975 GOT_TYPE_TLS_DESC = 4 // GOT entry for TLS_DESC pair 2976 }; 2977 2978 typedef typename std::vector<Stub_table<big_endian>*> Stub_table_list; 2979 2980 // Map input section to Arm_input_section. 2981 typedef Unordered_map<Section_id, 2982 Arm_input_section<big_endian>*, 2983 Section_id_hash> 2984 Arm_input_section_map; 2985 2986 // Map output addresses to relocs for Cortex-A8 erratum. 2987 typedef Unordered_map<Arm_address, const Cortex_a8_reloc*> 2988 Cortex_a8_relocs_info; 2989 2990 // The GOT section. 2991 Arm_output_data_got<big_endian>* got_; 2992 // The PLT section. 2993 Output_data_plt_arm<big_endian>* plt_; 2994 // The GOT PLT section. 2995 Output_data_space* got_plt_; 2996 // The GOT section for IRELATIVE relocations. 2997 Output_data_space* got_irelative_; 2998 // The dynamic reloc section. 2999 Reloc_section* rel_dyn_; 3000 // The section to use for IRELATIVE relocs. 3001 Reloc_section* rel_irelative_; 3002 // The RELR dynamic reloc section. 3003 Relr_section* relr_dyn_; 3004 // Relocs saved to avoid a COPY reloc. 3005 Copy_relocs<elfcpp::SHT_REL, 32, big_endian> copy_relocs_; 3006 // Offset of the GOT entry for the TLS module index. 3007 unsigned int got_mod_index_offset_; 3008 // True if the _TLS_MODULE_BASE_ symbol has been defined. 3009 bool tls_base_symbol_defined_; 3010 // Vector of Stub_tables created. 3011 Stub_table_list stub_tables_; 3012 // Stub factory. 3013 const Stub_factory &stub_factory_; 3014 // Whether we force PIC branch veneers. 3015 bool should_force_pic_veneer_; 3016 // Map for locating Arm_input_sections. 3017 Arm_input_section_map arm_input_section_map_; 3018 // Attributes section data in output. 3019 Attributes_section_data* attributes_section_data_; 3020 // Whether we want to fix code for Cortex-A8 erratum. 3021 bool fix_cortex_a8_; 3022 // Map addresses to relocs for Cortex-A8 erratum. 3023 Cortex_a8_relocs_info cortex_a8_relocs_info_; 3024 }; 3025 3026 template<bool big_endian> 3027 const Target::Target_info Target_arm<big_endian>::arm_info = 3028 { 3029 32, // size 3030 big_endian, // is_big_endian 3031 elfcpp::EM_ARM, // machine_code 3032 false, // has_make_symbol 3033 false, // has_resolve 3034 false, // has_code_fill 3035 true, // is_default_stack_executable 3036 false, // can_icf_inline_merge_sections 3037 '\0', // wrap_char 3038 "/usr/lib/libc.so.1", // dynamic_linker 3039 0x8000, // default_text_segment_address 3040 0x1000, // abi_pagesize (overridable by -z max-page-size) 3041 0x1000, // common_pagesize (overridable by -z common-page-size) 3042 false, // isolate_execinstr 3043 0, // rosegment_gap 3044 elfcpp::SHN_UNDEF, // small_common_shndx 3045 elfcpp::SHN_UNDEF, // large_common_shndx 3046 0, // small_common_section_flags 3047 0, // large_common_section_flags 3048 ".ARM.attributes", // attributes_section 3049 "aeabi", // attributes_vendor 3050 "_start", // entry_symbol_name 3051 32, // hash_entry_size 3052 }; 3053 3054 // Arm relocate functions class 3055 // 3056 3057 template<bool big_endian> 3058 class Arm_relocate_functions : public Relocate_functions<32, big_endian> 3059 { 3060 public: 3061 typedef enum 3062 { 3063 STATUS_OKAY, // No error during relocation. 3064 STATUS_OVERFLOW, // Relocation overflow. 3065 STATUS_BAD_RELOC // Relocation cannot be applied. 3066 } Status; 3067 3068 private: 3069 typedef Relocate_functions<32, big_endian> Base; 3070 typedef Arm_relocate_functions<big_endian> This; 3071 3072 // Encoding of imm16 argument for movt and movw ARM instructions 3073 // from ARM ARM: 3074 // 3075 // imm16 := imm4 | imm12 3076 // 3077 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0 3078 // +-------+---------------+-------+-------+-----------------------+ 3079 // | | |imm4 | |imm12 | 3080 // +-------+---------------+-------+-------+-----------------------+ 3081 3082 // Extract the relocation addend from VAL based on the ARM 3083 // instruction encoding described above. 3084 static inline typename elfcpp::Swap<32, big_endian>::Valtype 3085 extract_arm_movw_movt_addend( 3086 typename elfcpp::Swap<32, big_endian>::Valtype val) 3087 { 3088 // According to the Elf ABI for ARM Architecture the immediate 3089 // field is sign-extended to form the addend. 3090 return Bits<16>::sign_extend32(((val >> 4) & 0xf000) | (val & 0xfff)); 3091 } 3092 3093 // Insert X into VAL based on the ARM instruction encoding described 3094 // above. 3095 static inline typename elfcpp::Swap<32, big_endian>::Valtype 3096 insert_val_arm_movw_movt( 3097 typename elfcpp::Swap<32, big_endian>::Valtype val, 3098 typename elfcpp::Swap<32, big_endian>::Valtype x) 3099 { 3100 val &= 0xfff0f000; 3101 val |= x & 0x0fff; 3102 val |= (x & 0xf000) << 4; 3103 return val; 3104 } 3105 3106 // Encoding of imm16 argument for movt and movw Thumb2 instructions 3107 // from ARM ARM: 3108 // 3109 // imm16 := imm4 | i | imm3 | imm8 3110 // 3111 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0 3112 // +---------+-+-----------+-------++-+-----+-------+---------------+ 3113 // | |i| |imm4 || |imm3 | |imm8 | 3114 // +---------+-+-----------+-------++-+-----+-------+---------------+ 3115 3116 // Extract the relocation addend from VAL based on the Thumb2 3117 // instruction encoding described above. 3118 static inline typename elfcpp::Swap<32, big_endian>::Valtype 3119 extract_thumb_movw_movt_addend( 3120 typename elfcpp::Swap<32, big_endian>::Valtype val) 3121 { 3122 // According to the Elf ABI for ARM Architecture the immediate 3123 // field is sign-extended to form the addend. 3124 return Bits<16>::sign_extend32(((val >> 4) & 0xf000) 3125 | ((val >> 15) & 0x0800) 3126 | ((val >> 4) & 0x0700) 3127 | (val & 0x00ff)); 3128 } 3129 3130 // Insert X into VAL based on the Thumb2 instruction encoding 3131 // described above. 3132 static inline typename elfcpp::Swap<32, big_endian>::Valtype 3133 insert_val_thumb_movw_movt( 3134 typename elfcpp::Swap<32, big_endian>::Valtype val, 3135 typename elfcpp::Swap<32, big_endian>::Valtype x) 3136 { 3137 val &= 0xfbf08f00; 3138 val |= (x & 0xf000) << 4; 3139 val |= (x & 0x0800) << 15; 3140 val |= (x & 0x0700) << 4; 3141 val |= (x & 0x00ff); 3142 return val; 3143 } 3144 3145 // Calculate the smallest constant Kn for the specified residual. 3146 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32) 3147 static uint32_t 3148 calc_grp_kn(typename elfcpp::Swap<32, big_endian>::Valtype residual) 3149 { 3150 int32_t msb; 3151 3152 if (residual == 0) 3153 return 0; 3154 // Determine the most significant bit in the residual and 3155 // align the resulting value to a 2-bit boundary. 3156 for (msb = 30; (msb >= 0) && !(residual & (3 << msb)); msb -= 2) 3157 ; 3158 // The desired shift is now (msb - 6), or zero, whichever 3159 // is the greater. 3160 return (((msb - 6) < 0) ? 0 : (msb - 6)); 3161 } 3162 3163 // Calculate the final residual for the specified group index. 3164 // If the passed group index is less than zero, the method will return 3165 // the value of the specified residual without any change. 3166 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32) 3167 static typename elfcpp::Swap<32, big_endian>::Valtype 3168 calc_grp_residual(typename elfcpp::Swap<32, big_endian>::Valtype residual, 3169 const int group) 3170 { 3171 for (int n = 0; n <= group; n++) 3172 { 3173 // Calculate which part of the value to mask. 3174 uint32_t shift = calc_grp_kn(residual); 3175 // Calculate the residual for the next time around. 3176 residual &= ~(residual & (0xff << shift)); 3177 } 3178 3179 return residual; 3180 } 3181 3182 // Calculate the value of Gn for the specified group index. 3183 // We return it in the form of an encoded constant-and-rotation. 3184 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32) 3185 static typename elfcpp::Swap<32, big_endian>::Valtype 3186 calc_grp_gn(typename elfcpp::Swap<32, big_endian>::Valtype residual, 3187 const int group) 3188 { 3189 typename elfcpp::Swap<32, big_endian>::Valtype gn = 0; 3190 uint32_t shift = 0; 3191 3192 for (int n = 0; n <= group; n++) 3193 { 3194 // Calculate which part of the value to mask. 3195 shift = calc_grp_kn(residual); 3196 // Calculate Gn in 32-bit as well as encoded constant-and-rotation form. 3197 gn = residual & (0xff << shift); 3198 // Calculate the residual for the next time around. 3199 residual &= ~gn; 3200 } 3201 // Return Gn in the form of an encoded constant-and-rotation. 3202 return ((gn >> shift) | ((gn <= 0xff ? 0 : (32 - shift) / 2) << 8)); 3203 } 3204 3205 public: 3206 // Handle ARM long branches. 3207 static typename This::Status 3208 arm_branch_common(unsigned int, const Relocate_info<32, big_endian>*, 3209 unsigned char*, const Sized_symbol<32>*, 3210 const Arm_relobj<big_endian>*, unsigned int, 3211 const Symbol_value<32>*, Arm_address, Arm_address, bool); 3212 3213 // Handle THUMB long branches. 3214 static typename This::Status 3215 thumb_branch_common(unsigned int, const Relocate_info<32, big_endian>*, 3216 unsigned char*, const Sized_symbol<32>*, 3217 const Arm_relobj<big_endian>*, unsigned int, 3218 const Symbol_value<32>*, Arm_address, Arm_address, bool); 3219 3220 3221 // Return the branch offset of a 32-bit THUMB branch. 3222 static inline int32_t 3223 thumb32_branch_offset(uint16_t upper_insn, uint16_t lower_insn) 3224 { 3225 // We use the Thumb-2 encoding (backwards compatible with Thumb-1) 3226 // involving the J1 and J2 bits. 3227 uint32_t s = (upper_insn & (1U << 10)) >> 10; 3228 uint32_t upper = upper_insn & 0x3ffU; 3229 uint32_t lower = lower_insn & 0x7ffU; 3230 uint32_t j1 = (lower_insn & (1U << 13)) >> 13; 3231 uint32_t j2 = (lower_insn & (1U << 11)) >> 11; 3232 uint32_t i1 = j1 ^ s ? 0 : 1; 3233 uint32_t i2 = j2 ^ s ? 0 : 1; 3234 3235 return Bits<25>::sign_extend32((s << 24) | (i1 << 23) | (i2 << 22) 3236 | (upper << 12) | (lower << 1)); 3237 } 3238 3239 // Insert OFFSET to a 32-bit THUMB branch and return the upper instruction. 3240 // UPPER_INSN is the original upper instruction of the branch. Caller is 3241 // responsible for overflow checking and BLX offset adjustment. 3242 static inline uint16_t 3243 thumb32_branch_upper(uint16_t upper_insn, int32_t offset) 3244 { 3245 uint32_t s = offset < 0 ? 1 : 0; 3246 uint32_t bits = static_cast<uint32_t>(offset); 3247 return (upper_insn & ~0x7ffU) | ((bits >> 12) & 0x3ffU) | (s << 10); 3248 } 3249 3250 // Insert OFFSET to a 32-bit THUMB branch and return the lower instruction. 3251 // LOWER_INSN is the original lower instruction of the branch. Caller is 3252 // responsible for overflow checking and BLX offset adjustment. 3253 static inline uint16_t 3254 thumb32_branch_lower(uint16_t lower_insn, int32_t offset) 3255 { 3256 uint32_t s = offset < 0 ? 1 : 0; 3257 uint32_t bits = static_cast<uint32_t>(offset); 3258 return ((lower_insn & ~0x2fffU) 3259 | ((((bits >> 23) & 1) ^ !s) << 13) 3260 | ((((bits >> 22) & 1) ^ !s) << 11) 3261 | ((bits >> 1) & 0x7ffU)); 3262 } 3263 3264 // Return the branch offset of a 32-bit THUMB conditional branch. 3265 static inline int32_t 3266 thumb32_cond_branch_offset(uint16_t upper_insn, uint16_t lower_insn) 3267 { 3268 uint32_t s = (upper_insn & 0x0400U) >> 10; 3269 uint32_t j1 = (lower_insn & 0x2000U) >> 13; 3270 uint32_t j2 = (lower_insn & 0x0800U) >> 11; 3271 uint32_t lower = (lower_insn & 0x07ffU); 3272 uint32_t upper = (s << 8) | (j2 << 7) | (j1 << 6) | (upper_insn & 0x003fU); 3273 3274 return Bits<21>::sign_extend32((upper << 12) | (lower << 1)); 3275 } 3276 3277 // Insert OFFSET to a 32-bit THUMB conditional branch and return the upper 3278 // instruction. UPPER_INSN is the original upper instruction of the branch. 3279 // Caller is responsible for overflow checking. 3280 static inline uint16_t 3281 thumb32_cond_branch_upper(uint16_t upper_insn, int32_t offset) 3282 { 3283 uint32_t s = offset < 0 ? 1 : 0; 3284 uint32_t bits = static_cast<uint32_t>(offset); 3285 return (upper_insn & 0xfbc0U) | (s << 10) | ((bits & 0x0003f000U) >> 12); 3286 } 3287 3288 // Insert OFFSET to a 32-bit THUMB conditional branch and return the lower 3289 // instruction. LOWER_INSN is the original lower instruction of the branch. 3290 // The caller is responsible for overflow checking. 3291 static inline uint16_t 3292 thumb32_cond_branch_lower(uint16_t lower_insn, int32_t offset) 3293 { 3294 uint32_t bits = static_cast<uint32_t>(offset); 3295 uint32_t j2 = (bits & 0x00080000U) >> 19; 3296 uint32_t j1 = (bits & 0x00040000U) >> 18; 3297 uint32_t lo = (bits & 0x00000ffeU) >> 1; 3298 3299 return (lower_insn & 0xd000U) | (j1 << 13) | (j2 << 11) | lo; 3300 } 3301 3302 // R_ARM_ABS8: S + A 3303 static inline typename This::Status 3304 abs8(unsigned char* view, 3305 const Sized_relobj_file<32, big_endian>* object, 3306 const Symbol_value<32>* psymval) 3307 { 3308 typedef typename elfcpp::Swap<8, big_endian>::Valtype Valtype; 3309 Valtype* wv = reinterpret_cast<Valtype*>(view); 3310 Valtype val = elfcpp::Swap<8, big_endian>::readval(wv); 3311 int32_t addend = Bits<8>::sign_extend32(val); 3312 Arm_address x = psymval->value(object, addend); 3313 val = Bits<32>::bit_select32(val, x, 0xffU); 3314 elfcpp::Swap<8, big_endian>::writeval(wv, val); 3315 3316 // R_ARM_ABS8 permits signed or unsigned results. 3317 return (Bits<8>::has_signed_unsigned_overflow32(x) 3318 ? This::STATUS_OVERFLOW 3319 : This::STATUS_OKAY); 3320 } 3321 3322 // R_ARM_THM_ABS5: S + A 3323 static inline typename This::Status 3324 thm_abs5(unsigned char* view, 3325 const Sized_relobj_file<32, big_endian>* object, 3326 const Symbol_value<32>* psymval) 3327 { 3328 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; 3329 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype; 3330 Valtype* wv = reinterpret_cast<Valtype*>(view); 3331 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv); 3332 Reltype addend = (val & 0x7e0U) >> 6; 3333 Reltype x = psymval->value(object, addend); 3334 val = Bits<32>::bit_select32(val, x << 6, 0x7e0U); 3335 elfcpp::Swap<16, big_endian>::writeval(wv, val); 3336 return (Bits<5>::has_overflow32(x) 3337 ? This::STATUS_OVERFLOW 3338 : This::STATUS_OKAY); 3339 } 3340 3341 // R_ARM_ABS12: S + A 3342 static inline typename This::Status 3343 abs12(unsigned char* view, 3344 const Sized_relobj_file<32, big_endian>* object, 3345 const Symbol_value<32>* psymval) 3346 { 3347 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; 3348 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype; 3349 Valtype* wv = reinterpret_cast<Valtype*>(view); 3350 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv); 3351 Reltype addend = val & 0x0fffU; 3352 Reltype x = psymval->value(object, addend); 3353 val = Bits<32>::bit_select32(val, x, 0x0fffU); 3354 elfcpp::Swap<32, big_endian>::writeval(wv, val); 3355 return (Bits<12>::has_overflow32(x) 3356 ? This::STATUS_OVERFLOW 3357 : This::STATUS_OKAY); 3358 } 3359 3360 // R_ARM_ABS16: S + A 3361 static inline typename This::Status 3362 abs16(unsigned char* view, 3363 const Sized_relobj_file<32, big_endian>* object, 3364 const Symbol_value<32>* psymval) 3365 { 3366 typedef typename elfcpp::Swap_unaligned<16, big_endian>::Valtype Valtype; 3367 Valtype val = elfcpp::Swap_unaligned<16, big_endian>::readval(view); 3368 int32_t addend = Bits<16>::sign_extend32(val); 3369 Arm_address x = psymval->value(object, addend); 3370 val = Bits<32>::bit_select32(val, x, 0xffffU); 3371 elfcpp::Swap_unaligned<16, big_endian>::writeval(view, val); 3372 3373 // R_ARM_ABS16 permits signed or unsigned results. 3374 return (Bits<16>::has_signed_unsigned_overflow32(x) 3375 ? This::STATUS_OVERFLOW 3376 : This::STATUS_OKAY); 3377 } 3378 3379 // R_ARM_ABS32: (S + A) | T 3380 static inline typename This::Status 3381 abs32(unsigned char* view, 3382 const Sized_relobj_file<32, big_endian>* object, 3383 const Symbol_value<32>* psymval, 3384 Arm_address thumb_bit) 3385 { 3386 typedef typename elfcpp::Swap_unaligned<32, big_endian>::Valtype Valtype; 3387 Valtype addend = elfcpp::Swap_unaligned<32, big_endian>::readval(view); 3388 Valtype x = psymval->value(object, addend) | thumb_bit; 3389 elfcpp::Swap_unaligned<32, big_endian>::writeval(view, x); 3390 return This::STATUS_OKAY; 3391 } 3392 3393 // R_ARM_REL32: (S + A) | T - P 3394 static inline typename This::Status 3395 rel32(unsigned char* view, 3396 const Sized_relobj_file<32, big_endian>* object, 3397 const Symbol_value<32>* psymval, 3398 Arm_address address, 3399 Arm_address thumb_bit) 3400 { 3401 typedef typename elfcpp::Swap_unaligned<32, big_endian>::Valtype Valtype; 3402 Valtype addend = elfcpp::Swap_unaligned<32, big_endian>::readval(view); 3403 Valtype x = (psymval->value(object, addend) | thumb_bit) - address; 3404 elfcpp::Swap_unaligned<32, big_endian>::writeval(view, x); 3405 return This::STATUS_OKAY; 3406 } 3407 3408 // R_ARM_THM_JUMP24: (S + A) | T - P 3409 static typename This::Status 3410 thm_jump19(unsigned char* view, const Arm_relobj<big_endian>* object, 3411 const Symbol_value<32>* psymval, Arm_address address, 3412 Arm_address thumb_bit); 3413 3414 // R_ARM_THM_JUMP6: S + A P 3415 static inline typename This::Status 3416 thm_jump6(unsigned char* view, 3417 const Sized_relobj_file<32, big_endian>* object, 3418 const Symbol_value<32>* psymval, 3419 Arm_address address) 3420 { 3421 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; 3422 typedef typename elfcpp::Swap<16, big_endian>::Valtype Reltype; 3423 Valtype* wv = reinterpret_cast<Valtype*>(view); 3424 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv); 3425 // bit[9]:bit[7:3]:0 (mask: 0x02f8) 3426 Reltype addend = (((val & 0x0200) >> 3) | ((val & 0x00f8) >> 2)); 3427 Reltype x = (psymval->value(object, addend) - address); 3428 val = (val & 0xfd07) | ((x & 0x0040) << 3) | ((val & 0x003e) << 2); 3429 elfcpp::Swap<16, big_endian>::writeval(wv, val); 3430 // CZB does only forward jumps. 3431 return ((x > 0x007e) 3432 ? This::STATUS_OVERFLOW 3433 : This::STATUS_OKAY); 3434 } 3435 3436 // R_ARM_THM_JUMP8: S + A P 3437 static inline typename This::Status 3438 thm_jump8(unsigned char* view, 3439 const Sized_relobj_file<32, big_endian>* object, 3440 const Symbol_value<32>* psymval, 3441 Arm_address address) 3442 { 3443 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; 3444 Valtype* wv = reinterpret_cast<Valtype*>(view); 3445 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv); 3446 int32_t addend = Bits<8>::sign_extend32((val & 0x00ff) << 1); 3447 int32_t x = (psymval->value(object, addend) - address); 3448 elfcpp::Swap<16, big_endian>::writeval(wv, ((val & 0xff00) 3449 | ((x & 0x01fe) >> 1))); 3450 // We do a 9-bit overflow check because x is right-shifted by 1 bit. 3451 return (Bits<9>::has_overflow32(x) 3452 ? This::STATUS_OVERFLOW 3453 : This::STATUS_OKAY); 3454 } 3455 3456 // R_ARM_THM_JUMP11: S + A P 3457 static inline typename This::Status 3458 thm_jump11(unsigned char* view, 3459 const Sized_relobj_file<32, big_endian>* object, 3460 const Symbol_value<32>* psymval, 3461 Arm_address address) 3462 { 3463 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; 3464 Valtype* wv = reinterpret_cast<Valtype*>(view); 3465 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv); 3466 int32_t addend = Bits<11>::sign_extend32((val & 0x07ff) << 1); 3467 int32_t x = (psymval->value(object, addend) - address); 3468 elfcpp::Swap<16, big_endian>::writeval(wv, ((val & 0xf800) 3469 | ((x & 0x0ffe) >> 1))); 3470 // We do a 12-bit overflow check because x is right-shifted by 1 bit. 3471 return (Bits<12>::has_overflow32(x) 3472 ? This::STATUS_OVERFLOW 3473 : This::STATUS_OKAY); 3474 } 3475 3476 // R_ARM_BASE_PREL: B(S) + A - P 3477 static inline typename This::Status 3478 base_prel(unsigned char* view, 3479 Arm_address origin, 3480 Arm_address address) 3481 { 3482 Base::rel32(view, origin - address); 3483 return STATUS_OKAY; 3484 } 3485 3486 // R_ARM_BASE_ABS: B(S) + A 3487 static inline typename This::Status 3488 base_abs(unsigned char* view, 3489 Arm_address origin) 3490 { 3491 Base::rel32(view, origin); 3492 return STATUS_OKAY; 3493 } 3494 3495 // R_ARM_GOT_BREL: GOT(S) + A - GOT_ORG 3496 static inline typename This::Status 3497 got_brel(unsigned char* view, 3498 typename elfcpp::Swap<32, big_endian>::Valtype got_offset) 3499 { 3500 Base::rel32(view, got_offset); 3501 return This::STATUS_OKAY; 3502 } 3503 3504 // R_ARM_GOT_PREL: GOT(S) + A - P 3505 static inline typename This::Status 3506 got_prel(unsigned char* view, 3507 Arm_address got_entry, 3508 Arm_address address) 3509 { 3510 Base::rel32(view, got_entry - address); 3511 return This::STATUS_OKAY; 3512 } 3513 3514 // R_ARM_PREL: (S + A) | T - P 3515 static inline typename This::Status 3516 prel31(unsigned char* view, 3517 const Sized_relobj_file<32, big_endian>* object, 3518 const Symbol_value<32>* psymval, 3519 Arm_address address, 3520 Arm_address thumb_bit) 3521 { 3522 typedef typename elfcpp::Swap_unaligned<32, big_endian>::Valtype Valtype; 3523 Valtype val = elfcpp::Swap_unaligned<32, big_endian>::readval(view); 3524 Valtype addend = Bits<31>::sign_extend32(val); 3525 Valtype x = (psymval->value(object, addend) | thumb_bit) - address; 3526 val = Bits<32>::bit_select32(val, x, 0x7fffffffU); 3527 elfcpp::Swap_unaligned<32, big_endian>::writeval(view, val); 3528 return (Bits<31>::has_overflow32(x) 3529 ? This::STATUS_OVERFLOW 3530 : This::STATUS_OKAY); 3531 } 3532 3533 // R_ARM_MOVW_ABS_NC: (S + A) | T (relative address base is ) 3534 // R_ARM_MOVW_PREL_NC: (S + A) | T - P 3535 // R_ARM_MOVW_BREL_NC: ((S + A) | T) - B(S) 3536 // R_ARM_MOVW_BREL: ((S + A) | T) - B(S) 3537 static inline typename This::Status 3538 movw(unsigned char* view, 3539 const Sized_relobj_file<32, big_endian>* object, 3540 const Symbol_value<32>* psymval, 3541 Arm_address relative_address_base, 3542 Arm_address thumb_bit, 3543 bool check_overflow) 3544 { 3545 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; 3546 Valtype* wv = reinterpret_cast<Valtype*>(view); 3547 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv); 3548 Valtype addend = This::extract_arm_movw_movt_addend(val); 3549 Valtype x = ((psymval->value(object, addend) | thumb_bit) 3550 - relative_address_base); 3551 val = This::insert_val_arm_movw_movt(val, x); 3552 elfcpp::Swap<32, big_endian>::writeval(wv, val); 3553 return ((check_overflow && Bits<16>::has_overflow32(x)) 3554 ? This::STATUS_OVERFLOW 3555 : This::STATUS_OKAY); 3556 } 3557 3558 // R_ARM_MOVT_ABS: S + A (relative address base is 0) 3559 // R_ARM_MOVT_PREL: S + A - P 3560 // R_ARM_MOVT_BREL: S + A - B(S) 3561 static inline typename This::Status 3562 movt(unsigned char* view, 3563 const Sized_relobj_file<32, big_endian>* object, 3564 const Symbol_value<32>* psymval, 3565 Arm_address relative_address_base) 3566 { 3567 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; 3568 Valtype* wv = reinterpret_cast<Valtype*>(view); 3569 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv); 3570 Valtype addend = This::extract_arm_movw_movt_addend(val); 3571 Valtype x = (psymval->value(object, addend) - relative_address_base) >> 16; 3572 val = This::insert_val_arm_movw_movt(val, x); 3573 elfcpp::Swap<32, big_endian>::writeval(wv, val); 3574 // FIXME: IHI0044D says that we should check for overflow. 3575 return This::STATUS_OKAY; 3576 } 3577 3578 // R_ARM_THM_MOVW_ABS_NC: S + A | T (relative_address_base is 0) 3579 // R_ARM_THM_MOVW_PREL_NC: (S + A) | T - P 3580 // R_ARM_THM_MOVW_BREL_NC: ((S + A) | T) - B(S) 3581 // R_ARM_THM_MOVW_BREL: ((S + A) | T) - B(S) 3582 static inline typename This::Status 3583 thm_movw(unsigned char* view, 3584 const Sized_relobj_file<32, big_endian>* object, 3585 const Symbol_value<32>* psymval, 3586 Arm_address relative_address_base, 3587 Arm_address thumb_bit, 3588 bool check_overflow) 3589 { 3590 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; 3591 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype; 3592 Valtype* wv = reinterpret_cast<Valtype*>(view); 3593 Reltype val = (elfcpp::Swap<16, big_endian>::readval(wv) << 16) 3594 | elfcpp::Swap<16, big_endian>::readval(wv + 1); 3595 Reltype addend = This::extract_thumb_movw_movt_addend(val); 3596 Reltype x = 3597 (psymval->value(object, addend) | thumb_bit) - relative_address_base; 3598 val = This::insert_val_thumb_movw_movt(val, x); 3599 elfcpp::Swap<16, big_endian>::writeval(wv, val >> 16); 3600 elfcpp::Swap<16, big_endian>::writeval(wv + 1, val & 0xffff); 3601 return ((check_overflow && Bits<16>::has_overflow32(x)) 3602 ? This::STATUS_OVERFLOW 3603 : This::STATUS_OKAY); 3604 } 3605 3606 // R_ARM_THM_MOVT_ABS: S + A (relative address base is 0) 3607 // R_ARM_THM_MOVT_PREL: S + A - P 3608 // R_ARM_THM_MOVT_BREL: S + A - B(S) 3609 static inline typename This::Status 3610 thm_movt(unsigned char* view, 3611 const Sized_relobj_file<32, big_endian>* object, 3612 const Symbol_value<32>* psymval, 3613 Arm_address relative_address_base) 3614 { 3615 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; 3616 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype; 3617 Valtype* wv = reinterpret_cast<Valtype*>(view); 3618 Reltype val = (elfcpp::Swap<16, big_endian>::readval(wv) << 16) 3619 | elfcpp::Swap<16, big_endian>::readval(wv + 1); 3620 Reltype addend = This::extract_thumb_movw_movt_addend(val); 3621 Reltype x = (psymval->value(object, addend) - relative_address_base) >> 16; 3622 val = This::insert_val_thumb_movw_movt(val, x); 3623 elfcpp::Swap<16, big_endian>::writeval(wv, val >> 16); 3624 elfcpp::Swap<16, big_endian>::writeval(wv + 1, val & 0xffff); 3625 return This::STATUS_OKAY; 3626 } 3627 3628 // R_ARM_THM_ALU_PREL_11_0: ((S + A) | T) - Pa (Thumb32) 3629 static inline typename This::Status 3630 thm_alu11(unsigned char* view, 3631 const Sized_relobj_file<32, big_endian>* object, 3632 const Symbol_value<32>* psymval, 3633 Arm_address address, 3634 Arm_address thumb_bit) 3635 { 3636 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; 3637 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype; 3638 Valtype* wv = reinterpret_cast<Valtype*>(view); 3639 Reltype insn = (elfcpp::Swap<16, big_endian>::readval(wv) << 16) 3640 | elfcpp::Swap<16, big_endian>::readval(wv + 1); 3641 3642 // f e d c b|a|9|8 7 6 5|4|3 2 1 0||f|e d c|b a 9 8|7 6 5 4 3 2 1 0 3643 // ----------------------------------------------------------------------- 3644 // ADD{S} 1 1 1 1 0|i|0|1 0 0 0|S|1 1 0 1||0|imm3 |Rd |imm8 3645 // ADDW 1 1 1 1 0|i|1|0 0 0 0|0|1 1 0 1||0|imm3 |Rd |imm8 3646 // ADR[+] 1 1 1 1 0|i|1|0 0 0 0|0|1 1 1 1||0|imm3 |Rd |imm8 3647 // SUB{S} 1 1 1 1 0|i|0|1 1 0 1|S|1 1 0 1||0|imm3 |Rd |imm8 3648 // SUBW 1 1 1 1 0|i|1|0 1 0 1|0|1 1 0 1||0|imm3 |Rd |imm8 3649 // ADR[-] 1 1 1 1 0|i|1|0 1 0 1|0|1 1 1 1||0|imm3 |Rd |imm8 3650 3651 // Determine a sign for the addend. 3652 const int sign = ((insn & 0xf8ef0000) == 0xf0ad0000 3653 || (insn & 0xf8ef0000) == 0xf0af0000) ? -1 : 1; 3654 // Thumb2 addend encoding: 3655 // imm12 := i | imm3 | imm8 3656 int32_t addend = (insn & 0xff) 3657 | ((insn & 0x00007000) >> 4) 3658 | ((insn & 0x04000000) >> 15); 3659 // Apply a sign to the added. 3660 addend *= sign; 3661 3662 int32_t x = (psymval->value(object, addend) | thumb_bit) 3663 - (address & 0xfffffffc); 3664 Reltype val = abs(x); 3665 // Mask out the value and a distinct part of the ADD/SUB opcode 3666 // (bits 7:5 of opword). 3667 insn = (insn & 0xfb0f8f00) 3668 | (val & 0xff) 3669 | ((val & 0x700) << 4) 3670 | ((val & 0x800) << 15); 3671 // Set the opcode according to whether the value to go in the 3672 // place is negative. 3673 if (x < 0) 3674 insn |= 0x00a00000; 3675 3676 elfcpp::Swap<16, big_endian>::writeval(wv, insn >> 16); 3677 elfcpp::Swap<16, big_endian>::writeval(wv + 1, insn & 0xffff); 3678 return ((val > 0xfff) ? 3679 This::STATUS_OVERFLOW : This::STATUS_OKAY); 3680 } 3681 3682 // R_ARM_THM_PC8: S + A - Pa (Thumb) 3683 static inline typename This::Status 3684 thm_pc8(unsigned char* view, 3685 const Sized_relobj_file<32, big_endian>* object, 3686 const Symbol_value<32>* psymval, 3687 Arm_address address) 3688 { 3689 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; 3690 typedef typename elfcpp::Swap<16, big_endian>::Valtype Reltype; 3691 Valtype* wv = reinterpret_cast<Valtype*>(view); 3692 Valtype insn = elfcpp::Swap<16, big_endian>::readval(wv); 3693 Reltype addend = ((insn & 0x00ff) << 2); 3694 int32_t x = (psymval->value(object, addend) - (address & 0xfffffffc)); 3695 Reltype val = abs(x); 3696 insn = (insn & 0xff00) | ((val & 0x03fc) >> 2); 3697 3698 elfcpp::Swap<16, big_endian>::writeval(wv, insn); 3699 return ((val > 0x03fc) 3700 ? This::STATUS_OVERFLOW 3701 : This::STATUS_OKAY); 3702 } 3703 3704 // R_ARM_THM_PC12: S + A - Pa (Thumb32) 3705 static inline typename This::Status 3706 thm_pc12(unsigned char* view, 3707 const Sized_relobj_file<32, big_endian>* object, 3708 const Symbol_value<32>* psymval, 3709 Arm_address address) 3710 { 3711 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; 3712 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype; 3713 Valtype* wv = reinterpret_cast<Valtype*>(view); 3714 Reltype insn = (elfcpp::Swap<16, big_endian>::readval(wv) << 16) 3715 | elfcpp::Swap<16, big_endian>::readval(wv + 1); 3716 // Determine a sign for the addend (positive if the U bit is 1). 3717 const int sign = (insn & 0x00800000) ? 1 : -1; 3718 int32_t addend = (insn & 0xfff); 3719 // Apply a sign to the added. 3720 addend *= sign; 3721 3722 int32_t x = (psymval->value(object, addend) - (address & 0xfffffffc)); 3723 Reltype val = abs(x); 3724 // Mask out and apply the value and the U bit. 3725 insn = (insn & 0xff7ff000) | (val & 0xfff); 3726 // Set the U bit according to whether the value to go in the 3727 // place is positive. 3728 if (x >= 0) 3729 insn |= 0x00800000; 3730 3731 elfcpp::Swap<16, big_endian>::writeval(wv, insn >> 16); 3732 elfcpp::Swap<16, big_endian>::writeval(wv + 1, insn & 0xffff); 3733 return ((val > 0xfff) ? 3734 This::STATUS_OVERFLOW : This::STATUS_OKAY); 3735 } 3736 3737 // R_ARM_V4BX 3738 static inline typename This::Status 3739 v4bx(const Relocate_info<32, big_endian>* relinfo, 3740 unsigned char* view, 3741 const Arm_relobj<big_endian>* object, 3742 const Arm_address address, 3743 const bool is_interworking) 3744 { 3745 3746 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; 3747 Valtype* wv = reinterpret_cast<Valtype*>(view); 3748 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv); 3749 3750 // Ensure that we have a BX instruction. 3751 gold_assert((val & 0x0ffffff0) == 0x012fff10); 3752 const uint32_t reg = (val & 0xf); 3753 if (is_interworking && reg != 0xf) 3754 { 3755 Stub_table<big_endian>* stub_table = 3756 object->stub_table(relinfo->data_shndx); 3757 gold_assert(stub_table != NULL); 3758 3759 Arm_v4bx_stub* stub = stub_table->find_arm_v4bx_stub(reg); 3760 gold_assert(stub != NULL); 3761 3762 int32_t veneer_address = 3763 stub_table->address() + stub->offset() - 8 - address; 3764 gold_assert((veneer_address <= ARM_MAX_FWD_BRANCH_OFFSET) 3765 && (veneer_address >= ARM_MAX_BWD_BRANCH_OFFSET)); 3766 // Replace with a branch to veneer (B <addr>) 3767 val = (val & 0xf0000000) | 0x0a000000 3768 | ((veneer_address >> 2) & 0x00ffffff); 3769 } 3770 else 3771 { 3772 // Preserve Rm (lowest four bits) and the condition code 3773 // (highest four bits). Other bits encode MOV PC,Rm. 3774 val = (val & 0xf000000f) | 0x01a0f000; 3775 } 3776 elfcpp::Swap<32, big_endian>::writeval(wv, val); 3777 return This::STATUS_OKAY; 3778 } 3779 3780 // R_ARM_ALU_PC_G0_NC: ((S + A) | T) - P 3781 // R_ARM_ALU_PC_G0: ((S + A) | T) - P 3782 // R_ARM_ALU_PC_G1_NC: ((S + A) | T) - P 3783 // R_ARM_ALU_PC_G1: ((S + A) | T) - P 3784 // R_ARM_ALU_PC_G2: ((S + A) | T) - P 3785 // R_ARM_ALU_SB_G0_NC: ((S + A) | T) - B(S) 3786 // R_ARM_ALU_SB_G0: ((S + A) | T) - B(S) 3787 // R_ARM_ALU_SB_G1_NC: ((S + A) | T) - B(S) 3788 // R_ARM_ALU_SB_G1: ((S + A) | T) - B(S) 3789 // R_ARM_ALU_SB_G2: ((S + A) | T) - B(S) 3790 static inline typename This::Status 3791 arm_grp_alu(unsigned char* view, 3792 const Sized_relobj_file<32, big_endian>* object, 3793 const Symbol_value<32>* psymval, 3794 const int group, 3795 Arm_address address, 3796 Arm_address thumb_bit, 3797 bool check_overflow) 3798 { 3799 gold_assert(group >= 0 && group < 3); 3800 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; 3801 Valtype* wv = reinterpret_cast<Valtype*>(view); 3802 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv); 3803 3804 // ALU group relocations are allowed only for the ADD/SUB instructions. 3805 // (0x00800000 - ADD, 0x00400000 - SUB) 3806 const Valtype opcode = insn & 0x01e00000; 3807 if (opcode != 0x00800000 && opcode != 0x00400000) 3808 return This::STATUS_BAD_RELOC; 3809 3810 // Determine a sign for the addend. 3811 const int sign = (opcode == 0x00800000) ? 1 : -1; 3812 // shifter = rotate_imm * 2 3813 const uint32_t shifter = (insn & 0xf00) >> 7; 3814 // Initial addend value. 3815 int32_t addend = insn & 0xff; 3816 // Rotate addend right by shifter. 3817 addend = (addend >> shifter) | (addend << (32 - shifter)); 3818 // Apply a sign to the added. 3819 addend *= sign; 3820 3821 int32_t x = ((psymval->value(object, addend) | thumb_bit) - address); 3822 Valtype gn = Arm_relocate_functions::calc_grp_gn(abs(x), group); 3823 // Check for overflow if required 3824 if (check_overflow 3825 && (Arm_relocate_functions::calc_grp_residual(abs(x), group) != 0)) 3826 return This::STATUS_OVERFLOW; 3827 3828 // Mask out the value and the ADD/SUB part of the opcode; take care 3829 // not to destroy the S bit. 3830 insn &= 0xff1ff000; 3831 // Set the opcode according to whether the value to go in the 3832 // place is negative. 3833 insn |= ((x < 0) ? 0x00400000 : 0x00800000); 3834 // Encode the offset (encoded Gn). 3835 insn |= gn; 3836 3837 elfcpp::Swap<32, big_endian>::writeval(wv, insn); 3838 return This::STATUS_OKAY; 3839 } 3840 3841 // R_ARM_LDR_PC_G0: S + A - P 3842 // R_ARM_LDR_PC_G1: S + A - P 3843 // R_ARM_LDR_PC_G2: S + A - P 3844 // R_ARM_LDR_SB_G0: S + A - B(S) 3845 // R_ARM_LDR_SB_G1: S + A - B(S) 3846 // R_ARM_LDR_SB_G2: S + A - B(S) 3847 static inline typename This::Status 3848 arm_grp_ldr(unsigned char* view, 3849 const Sized_relobj_file<32, big_endian>* object, 3850 const Symbol_value<32>* psymval, 3851 const int group, 3852 Arm_address address) 3853 { 3854 gold_assert(group >= 0 && group < 3); 3855 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; 3856 Valtype* wv = reinterpret_cast<Valtype*>(view); 3857 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv); 3858 3859 const int sign = (insn & 0x00800000) ? 1 : -1; 3860 int32_t addend = (insn & 0xfff) * sign; 3861 int32_t x = (psymval->value(object, addend) - address); 3862 // Calculate the relevant G(n-1) value to obtain this stage residual. 3863 Valtype residual = 3864 Arm_relocate_functions::calc_grp_residual(abs(x), group - 1); 3865 if (residual >= 0x1000) 3866 return This::STATUS_OVERFLOW; 3867 3868 // Mask out the value and U bit. 3869 insn &= 0xff7ff000; 3870 // Set the U bit for non-negative values. 3871 if (x >= 0) 3872 insn |= 0x00800000; 3873 insn |= residual; 3874 3875 elfcpp::Swap<32, big_endian>::writeval(wv, insn); 3876 return This::STATUS_OKAY; 3877 } 3878 3879 // R_ARM_LDRS_PC_G0: S + A - P 3880 // R_ARM_LDRS_PC_G1: S + A - P 3881 // R_ARM_LDRS_PC_G2: S + A - P 3882 // R_ARM_LDRS_SB_G0: S + A - B(S) 3883 // R_ARM_LDRS_SB_G1: S + A - B(S) 3884 // R_ARM_LDRS_SB_G2: S + A - B(S) 3885 static inline typename This::Status 3886 arm_grp_ldrs(unsigned char* view, 3887 const Sized_relobj_file<32, big_endian>* object, 3888 const Symbol_value<32>* psymval, 3889 const int group, 3890 Arm_address address) 3891 { 3892 gold_assert(group >= 0 && group < 3); 3893 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; 3894 Valtype* wv = reinterpret_cast<Valtype*>(view); 3895 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv); 3896 3897 const int sign = (insn & 0x00800000) ? 1 : -1; 3898 int32_t addend = (((insn & 0xf00) >> 4) + (insn & 0xf)) * sign; 3899 int32_t x = (psymval->value(object, addend) - address); 3900 // Calculate the relevant G(n-1) value to obtain this stage residual. 3901 Valtype residual = 3902 Arm_relocate_functions::calc_grp_residual(abs(x), group - 1); 3903 if (residual >= 0x100) 3904 return This::STATUS_OVERFLOW; 3905 3906 // Mask out the value and U bit. 3907 insn &= 0xff7ff0f0; 3908 // Set the U bit for non-negative values. 3909 if (x >= 0) 3910 insn |= 0x00800000; 3911 insn |= ((residual & 0xf0) << 4) | (residual & 0xf); 3912 3913 elfcpp::Swap<32, big_endian>::writeval(wv, insn); 3914 return This::STATUS_OKAY; 3915 } 3916 3917 // R_ARM_LDC_PC_G0: S + A - P 3918 // R_ARM_LDC_PC_G1: S + A - P 3919 // R_ARM_LDC_PC_G2: S + A - P 3920 // R_ARM_LDC_SB_G0: S + A - B(S) 3921 // R_ARM_LDC_SB_G1: S + A - B(S) 3922 // R_ARM_LDC_SB_G2: S + A - B(S) 3923 static inline typename This::Status 3924 arm_grp_ldc(unsigned char* view, 3925 const Sized_relobj_file<32, big_endian>* object, 3926 const Symbol_value<32>* psymval, 3927 const int group, 3928 Arm_address address) 3929 { 3930 gold_assert(group >= 0 && group < 3); 3931 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; 3932 Valtype* wv = reinterpret_cast<Valtype*>(view); 3933 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv); 3934 3935 const int sign = (insn & 0x00800000) ? 1 : -1; 3936 int32_t addend = ((insn & 0xff) << 2) * sign; 3937 int32_t x = (psymval->value(object, addend) - address); 3938 // Calculate the relevant G(n-1) value to obtain this stage residual. 3939 Valtype residual = 3940 Arm_relocate_functions::calc_grp_residual(abs(x), group - 1); 3941 if ((residual & 0x3) != 0 || residual >= 0x400) 3942 return This::STATUS_OVERFLOW; 3943 3944 // Mask out the value and U bit. 3945 insn &= 0xff7fff00; 3946 // Set the U bit for non-negative values. 3947 if (x >= 0) 3948 insn |= 0x00800000; 3949 insn |= (residual >> 2); 3950 3951 elfcpp::Swap<32, big_endian>::writeval(wv, insn); 3952 return This::STATUS_OKAY; 3953 } 3954 }; 3955 3956 // Relocate ARM long branches. This handles relocation types 3957 // R_ARM_CALL, R_ARM_JUMP24, R_ARM_PLT32 and R_ARM_XPC25. 3958 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly 3959 // undefined and we do not use PLT in this relocation. In such a case, 3960 // the branch is converted into an NOP. 3961 3962 template<bool big_endian> 3963 typename Arm_relocate_functions<big_endian>::Status 3964 Arm_relocate_functions<big_endian>::arm_branch_common( 3965 unsigned int r_type, 3966 const Relocate_info<32, big_endian>* relinfo, 3967 unsigned char* view, 3968 const Sized_symbol<32>* gsym, 3969 const Arm_relobj<big_endian>* object, 3970 unsigned int r_sym, 3971 const Symbol_value<32>* psymval, 3972 Arm_address address, 3973 Arm_address thumb_bit, 3974 bool is_weakly_undefined_without_plt) 3975 { 3976 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; 3977 Valtype* wv = reinterpret_cast<Valtype*>(view); 3978 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv); 3979 3980 bool insn_is_b = (((val >> 28) & 0xf) <= 0xe) 3981 && ((val & 0x0f000000UL) == 0x0a000000UL); 3982 bool insn_is_uncond_bl = (val & 0xff000000UL) == 0xeb000000UL; 3983 bool insn_is_cond_bl = (((val >> 28) & 0xf) < 0xe) 3984 && ((val & 0x0f000000UL) == 0x0b000000UL); 3985 bool insn_is_blx = (val & 0xfe000000UL) == 0xfa000000UL; 3986 bool insn_is_any_branch = (val & 0x0e000000UL) == 0x0a000000UL; 3987 3988 // Check that the instruction is valid. 3989 if (r_type == elfcpp::R_ARM_CALL) 3990 { 3991 if (!insn_is_uncond_bl && !insn_is_blx) 3992 return This::STATUS_BAD_RELOC; 3993 } 3994 else if (r_type == elfcpp::R_ARM_JUMP24) 3995 { 3996 if (!insn_is_b && !insn_is_cond_bl) 3997 return This::STATUS_BAD_RELOC; 3998 } 3999 else if (r_type == elfcpp::R_ARM_PLT32) 4000 { 4001 if (!insn_is_any_branch) 4002 return This::STATUS_BAD_RELOC; 4003 } 4004 else if (r_type == elfcpp::R_ARM_XPC25) 4005 { 4006 // FIXME: AAELF document IH0044C does not say much about it other 4007 // than it being obsolete. 4008 if (!insn_is_any_branch) 4009 return This::STATUS_BAD_RELOC; 4010 } 4011 else 4012 gold_unreachable(); 4013 4014 // A branch to an undefined weak symbol is turned into a jump to 4015 // the next instruction unless a PLT entry will be created. 4016 // Do the same for local undefined symbols. 4017 // The jump to the next instruction is optimized as a NOP depending 4018 // on the architecture. 4019 const Target_arm<big_endian>* arm_target = 4020 Target_arm<big_endian>::default_target(); 4021 if (is_weakly_undefined_without_plt) 4022 { 4023 gold_assert(!parameters->options().relocatable()); 4024 Valtype cond = val & 0xf0000000U; 4025 if (arm_target->may_use_arm_nop()) 4026 val = cond | 0x0320f000; 4027 else 4028 val = cond | 0x01a00000; // Using pre-UAL nop: mov r0, r0. 4029 elfcpp::Swap<32, big_endian>::writeval(wv, val); 4030 return This::STATUS_OKAY; 4031 } 4032 4033 Valtype addend = Bits<26>::sign_extend32(val << 2); 4034 Valtype branch_target = psymval->value(object, addend); 4035 int32_t branch_offset = branch_target - address; 4036 4037 // We need a stub if the branch offset is too large or if we need 4038 // to switch mode. 4039 bool may_use_blx = arm_target->may_use_v5t_interworking(); 4040 Reloc_stub* stub = NULL; 4041 4042 if (!parameters->options().relocatable() 4043 && (Bits<26>::has_overflow32(branch_offset) 4044 || ((thumb_bit != 0) 4045 && !(may_use_blx && r_type == elfcpp::R_ARM_CALL)))) 4046 { 4047 Valtype unadjusted_branch_target = psymval->value(object, 0); 4048 4049 Stub_type stub_type = 4050 Reloc_stub::stub_type_for_reloc(r_type, address, 4051 unadjusted_branch_target, 4052 (thumb_bit != 0)); 4053 if (stub_type != arm_stub_none) 4054 { 4055 Stub_table<big_endian>* stub_table = 4056 object->stub_table(relinfo->data_shndx); 4057 gold_assert(stub_table != NULL); 4058 4059 Reloc_stub::Key stub_key(stub_type, gsym, object, r_sym, addend); 4060 stub = stub_table->find_reloc_stub(stub_key); 4061 gold_assert(stub != NULL); 4062 thumb_bit = stub->stub_template()->entry_in_thumb_mode() ? 1 : 0; 4063 branch_target = stub_table->address() + stub->offset() + addend; 4064 branch_offset = branch_target - address; 4065 gold_assert(!Bits<26>::has_overflow32(branch_offset)); 4066 } 4067 } 4068 4069 // At this point, if we still need to switch mode, the instruction 4070 // must either be a BLX or a BL that can be converted to a BLX. 4071 if (thumb_bit != 0) 4072 { 4073 // Turn BL to BLX. 4074 gold_assert(may_use_blx && r_type == elfcpp::R_ARM_CALL); 4075 val = (val & 0xffffff) | 0xfa000000 | ((branch_offset & 2) << 23); 4076 } 4077 4078 val = Bits<32>::bit_select32(val, (branch_offset >> 2), 0xffffffUL); 4079 elfcpp::Swap<32, big_endian>::writeval(wv, val); 4080 return (Bits<26>::has_overflow32(branch_offset) 4081 ? This::STATUS_OVERFLOW 4082 : This::STATUS_OKAY); 4083 } 4084 4085 // Relocate THUMB long branches. This handles relocation types 4086 // R_ARM_THM_CALL, R_ARM_THM_JUMP24 and R_ARM_THM_XPC22. 4087 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly 4088 // undefined and we do not use PLT in this relocation. In such a case, 4089 // the branch is converted into an NOP. 4090 4091 template<bool big_endian> 4092 typename Arm_relocate_functions<big_endian>::Status 4093 Arm_relocate_functions<big_endian>::thumb_branch_common( 4094 unsigned int r_type, 4095 const Relocate_info<32, big_endian>* relinfo, 4096 unsigned char* view, 4097 const Sized_symbol<32>* gsym, 4098 const Arm_relobj<big_endian>* object, 4099 unsigned int r_sym, 4100 const Symbol_value<32>* psymval, 4101 Arm_address address, 4102 Arm_address thumb_bit, 4103 bool is_weakly_undefined_without_plt) 4104 { 4105 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; 4106 Valtype* wv = reinterpret_cast<Valtype*>(view); 4107 uint32_t upper_insn = elfcpp::Swap<16, big_endian>::readval(wv); 4108 uint32_t lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1); 4109 4110 // FIXME: These tests are too loose and do not take THUMB/THUMB-2 difference 4111 // into account. 4112 bool is_bl_insn = (lower_insn & 0x1000U) == 0x1000U; 4113 bool is_blx_insn = (lower_insn & 0x1000U) == 0x0000U; 4114 4115 // Check that the instruction is valid. 4116 if (r_type == elfcpp::R_ARM_THM_CALL) 4117 { 4118 if (!is_bl_insn && !is_blx_insn) 4119 return This::STATUS_BAD_RELOC; 4120 } 4121 else if (r_type == elfcpp::R_ARM_THM_JUMP24) 4122 { 4123 // This cannot be a BLX. 4124 if (!is_bl_insn) 4125 return This::STATUS_BAD_RELOC; 4126 } 4127 else if (r_type == elfcpp::R_ARM_THM_XPC22) 4128 { 4129 // Check for Thumb to Thumb call. 4130 if (!is_blx_insn) 4131 return This::STATUS_BAD_RELOC; 4132 if (thumb_bit != 0) 4133 { 4134 gold_warning(_("%s: Thumb BLX instruction targets " 4135 "thumb function '%s'."), 4136 object->name().c_str(), 4137 (gsym ? gsym->name() : "(local)")); 4138 // Convert BLX to BL. 4139 lower_insn |= 0x1000U; 4140 } 4141 } 4142 else 4143 gold_unreachable(); 4144 4145 // A branch to an undefined weak symbol is turned into a jump to 4146 // the next instruction unless a PLT entry will be created. 4147 // The jump to the next instruction is optimized as a NOP.W for 4148 // Thumb-2 enabled architectures. 4149 const Target_arm<big_endian>* arm_target = 4150 Target_arm<big_endian>::default_target(); 4151 if (is_weakly_undefined_without_plt) 4152 { 4153 gold_assert(!parameters->options().relocatable()); 4154 if (arm_target->may_use_thumb2_nop()) 4155 { 4156 elfcpp::Swap<16, big_endian>::writeval(wv, 0xf3af); 4157 elfcpp::Swap<16, big_endian>::writeval(wv + 1, 0x8000); 4158 } 4159 else 4160 { 4161 elfcpp::Swap<16, big_endian>::writeval(wv, 0xe000); 4162 elfcpp::Swap<16, big_endian>::writeval(wv + 1, 0xbf00); 4163 } 4164 return This::STATUS_OKAY; 4165 } 4166 4167 int32_t addend = This::thumb32_branch_offset(upper_insn, lower_insn); 4168 Arm_address branch_target = psymval->value(object, addend); 4169 4170 // For BLX, bit 1 of target address comes from bit 1 of base address. 4171 bool may_use_blx = arm_target->may_use_v5t_interworking(); 4172 if (thumb_bit == 0 && may_use_blx) 4173 branch_target = Bits<32>::bit_select32(branch_target, address, 0x2); 4174 4175 int32_t branch_offset = branch_target - address; 4176 4177 // We need a stub if the branch offset is too large or if we need 4178 // to switch mode. 4179 bool thumb2 = arm_target->using_thumb2(); 4180 if (!parameters->options().relocatable() 4181 && ((!thumb2 && Bits<23>::has_overflow32(branch_offset)) 4182 || (thumb2 && Bits<25>::has_overflow32(branch_offset)) 4183 || ((thumb_bit == 0) 4184 && (((r_type == elfcpp::R_ARM_THM_CALL) && !may_use_blx) 4185 || r_type == elfcpp::R_ARM_THM_JUMP24)))) 4186 { 4187 Arm_address unadjusted_branch_target = psymval->value(object, 0); 4188 4189 Stub_type stub_type = 4190 Reloc_stub::stub_type_for_reloc(r_type, address, 4191 unadjusted_branch_target, 4192 (thumb_bit != 0)); 4193 4194 if (stub_type != arm_stub_none) 4195 { 4196 Stub_table<big_endian>* stub_table = 4197 object->stub_table(relinfo->data_shndx); 4198 gold_assert(stub_table != NULL); 4199 4200 Reloc_stub::Key stub_key(stub_type, gsym, object, r_sym, addend); 4201 Reloc_stub* stub = stub_table->find_reloc_stub(stub_key); 4202 gold_assert(stub != NULL); 4203 thumb_bit = stub->stub_template()->entry_in_thumb_mode() ? 1 : 0; 4204 branch_target = stub_table->address() + stub->offset() + addend; 4205 if (thumb_bit == 0 && may_use_blx) 4206 branch_target = Bits<32>::bit_select32(branch_target, address, 0x2); 4207 branch_offset = branch_target - address; 4208 } 4209 } 4210 4211 // At this point, if we still need to switch mode, the instruction 4212 // must either be a BLX or a BL that can be converted to a BLX. 4213 if (thumb_bit == 0) 4214 { 4215 gold_assert(may_use_blx 4216 && (r_type == elfcpp::R_ARM_THM_CALL 4217 || r_type == elfcpp::R_ARM_THM_XPC22)); 4218 // Make sure this is a BLX. 4219 lower_insn &= ~0x1000U; 4220 } 4221 else 4222 { 4223 // Make sure this is a BL. 4224 lower_insn |= 0x1000U; 4225 } 4226 4227 // For a BLX instruction, make sure that the relocation is rounded up 4228 // to a word boundary. This follows the semantics of the instruction 4229 // which specifies that bit 1 of the target address will come from bit 4230 // 1 of the base address. 4231 if ((lower_insn & 0x5000U) == 0x4000U) 4232 gold_assert((branch_offset & 3) == 0); 4233 4234 // Put BRANCH_OFFSET back into the insn. Assumes two's complement. 4235 // We use the Thumb-2 encoding, which is safe even if dealing with 4236 // a Thumb-1 instruction by virtue of our overflow check above. */ 4237 upper_insn = This::thumb32_branch_upper(upper_insn, branch_offset); 4238 lower_insn = This::thumb32_branch_lower(lower_insn, branch_offset); 4239 4240 elfcpp::Swap<16, big_endian>::writeval(wv, upper_insn); 4241 elfcpp::Swap<16, big_endian>::writeval(wv + 1, lower_insn); 4242 4243 gold_assert(!Bits<25>::has_overflow32(branch_offset)); 4244 4245 return ((thumb2 4246 ? Bits<25>::has_overflow32(branch_offset) 4247 : Bits<23>::has_overflow32(branch_offset)) 4248 ? This::STATUS_OVERFLOW 4249 : This::STATUS_OKAY); 4250 } 4251 4252 // Relocate THUMB-2 long conditional branches. 4253 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly 4254 // undefined and we do not use PLT in this relocation. In such a case, 4255 // the branch is converted into an NOP. 4256 4257 template<bool big_endian> 4258 typename Arm_relocate_functions<big_endian>::Status 4259 Arm_relocate_functions<big_endian>::thm_jump19( 4260 unsigned char* view, 4261 const Arm_relobj<big_endian>* object, 4262 const Symbol_value<32>* psymval, 4263 Arm_address address, 4264 Arm_address thumb_bit) 4265 { 4266 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; 4267 Valtype* wv = reinterpret_cast<Valtype*>(view); 4268 uint32_t upper_insn = elfcpp::Swap<16, big_endian>::readval(wv); 4269 uint32_t lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1); 4270 int32_t addend = This::thumb32_cond_branch_offset(upper_insn, lower_insn); 4271 4272 Arm_address branch_target = psymval->value(object, addend); 4273 int32_t branch_offset = branch_target - address; 4274 4275 // ??? Should handle interworking? GCC might someday try to 4276 // use this for tail calls. 4277 // FIXME: We do support thumb entry to PLT yet. 4278 if (thumb_bit == 0) 4279 { 4280 gold_error(_("conditional branch to PLT in THUMB-2 not supported yet.")); 4281 return This::STATUS_BAD_RELOC; 4282 } 4283 4284 // Put RELOCATION back into the insn. 4285 upper_insn = This::thumb32_cond_branch_upper(upper_insn, branch_offset); 4286 lower_insn = This::thumb32_cond_branch_lower(lower_insn, branch_offset); 4287 4288 // Put the relocated value back in the object file: 4289 elfcpp::Swap<16, big_endian>::writeval(wv, upper_insn); 4290 elfcpp::Swap<16, big_endian>::writeval(wv + 1, lower_insn); 4291 4292 return (Bits<21>::has_overflow32(branch_offset) 4293 ? This::STATUS_OVERFLOW 4294 : This::STATUS_OKAY); 4295 } 4296 4297 // Get the GOT section, creating it if necessary. 4298 4299 template<bool big_endian> 4300 Arm_output_data_got<big_endian>* 4301 Target_arm<big_endian>::got_section(Symbol_table* symtab, Layout* layout) 4302 { 4303 if (this->got_ == NULL) 4304 { 4305 gold_assert(symtab != NULL && layout != NULL); 4306 4307 // When using -z now, we can treat .got as a relro section. 4308 // Without -z now, it is modified after program startup by lazy 4309 // PLT relocations. 4310 bool is_got_relro = parameters->options().now(); 4311 Output_section_order got_order = (is_got_relro 4312 ? ORDER_RELRO_LAST 4313 : ORDER_DATA); 4314 4315 // Unlike some targets (.e.g x86), ARM does not use separate .got and 4316 // .got.plt sections in output. The output .got section contains both 4317 // PLT and non-PLT GOT entries. 4318 this->got_ = new Arm_output_data_got<big_endian>(symtab, layout); 4319 4320 layout->add_output_section_data(".got", elfcpp::SHT_PROGBITS, 4321 (elfcpp::SHF_ALLOC | elfcpp::SHF_WRITE), 4322 this->got_, got_order, is_got_relro); 4323 4324 // The old GNU linker creates a .got.plt section. We just 4325 // create another set of data in the .got section. Note that we 4326 // always create a PLT if we create a GOT, although the PLT 4327 // might be empty. 4328 this->got_plt_ = new Output_data_space(4, "** GOT PLT"); 4329 layout->add_output_section_data(".got", elfcpp::SHT_PROGBITS, 4330 (elfcpp::SHF_ALLOC | elfcpp::SHF_WRITE), 4331 this->got_plt_, got_order, is_got_relro); 4332 4333 // The first three entries are reserved. 4334 this->got_plt_->set_current_data_size(3 * 4); 4335 4336 // Define _GLOBAL_OFFSET_TABLE_ at the start of the PLT. 4337 symtab->define_in_output_data("_GLOBAL_OFFSET_TABLE_", NULL, 4338 Symbol_table::PREDEFINED, 4339 this->got_plt_, 4340 0, 0, elfcpp::STT_OBJECT, 4341 elfcpp::STB_LOCAL, 4342 elfcpp::STV_HIDDEN, 0, 4343 false, false); 4344 4345 // If there are any IRELATIVE relocations, they get GOT entries 4346 // in .got.plt after the jump slot entries. 4347 this->got_irelative_ = new Output_data_space(4, "** GOT IRELATIVE PLT"); 4348 layout->add_output_section_data(".got", elfcpp::SHT_PROGBITS, 4349 (elfcpp::SHF_ALLOC | elfcpp::SHF_WRITE), 4350 this->got_irelative_, 4351 got_order, is_got_relro); 4352 4353 } 4354 return this->got_; 4355 } 4356 4357 // Get the dynamic reloc section, creating it if necessary. 4358 4359 template<bool big_endian> 4360 typename Target_arm<big_endian>::Reloc_section* 4361 Target_arm<big_endian>::rel_dyn_section(Layout* layout) 4362 { 4363 if (this->rel_dyn_ == NULL) 4364 { 4365 gold_assert(layout != NULL); 4366 // Create both relocation sections in the same place, so as to ensure 4367 // their relative order in the output section. 4368 this->rel_dyn_ = new Reloc_section(parameters->options().combreloc()); 4369 this->rel_irelative_ = new Reloc_section(false); 4370 layout->add_output_section_data(".rel.dyn", elfcpp::SHT_REL, 4371 elfcpp::SHF_ALLOC, this->rel_dyn_, 4372 ORDER_DYNAMIC_RELOCS, false); 4373 layout->add_output_section_data(".rel.dyn", elfcpp::SHT_REL, 4374 elfcpp::SHF_ALLOC, this->rel_irelative_, 4375 ORDER_DYNAMIC_RELOCS, false); 4376 } 4377 return this->rel_dyn_; 4378 } 4379 4380 4381 // Get the section to use for IRELATIVE relocs, creating it if necessary. These 4382 // go in .rela.dyn, but only after all other dynamic relocations. They need to 4383 // follow the other dynamic relocations so that they can refer to global 4384 // variables initialized by those relocs. 4385 4386 template<bool big_endian> 4387 typename Target_arm<big_endian>::Reloc_section* 4388 Target_arm<big_endian>::rel_irelative_section(Layout* layout) 4389 { 4390 if (this->rel_irelative_ == NULL) 4391 { 4392 // Delegate the creation to rel_dyn_section so as to ensure their order in 4393 // the output section. 4394 this->rel_dyn_section(layout); 4395 gold_assert(this->rel_irelative_ != NULL 4396 && (this->rel_dyn_->output_section() 4397 == this->rel_irelative_->output_section())); 4398 } 4399 return this->rel_irelative_; 4400 } 4401 4402 // Get the RELR dynamic reloc section, creating it if necessary. 4403 4404 template<bool big_endian> 4405 typename Target_arm<big_endian>::Relr_section* 4406 Target_arm<big_endian>::relr_dyn_section(Layout* layout) 4407 { 4408 if (this->relr_dyn_ == NULL) 4409 { 4410 gold_assert(layout != NULL); 4411 this->relr_dyn_ = new Relr_section(); 4412 layout->add_output_section_data(".relr.dyn", elfcpp::SHT_RELR, 4413 elfcpp::SHF_ALLOC, this->relr_dyn_, 4414 ORDER_DYNAMIC_RELOCS, false); 4415 } 4416 return this->relr_dyn_; 4417 } 4418 4419 4420 // Insn_template methods. 4421 4422 // Return byte size of an instruction template. 4423 4424 size_t 4425 Insn_template::size() const 4426 { 4427 switch (this->type()) 4428 { 4429 case THUMB16_TYPE: 4430 case THUMB16_SPECIAL_TYPE: 4431 return 2; 4432 case ARM_TYPE: 4433 case THUMB32_TYPE: 4434 case DATA_TYPE: 4435 return 4; 4436 default: 4437 gold_unreachable(); 4438 } 4439 } 4440 4441 // Return alignment of an instruction template. 4442 4443 unsigned 4444 Insn_template::alignment() const 4445 { 4446 switch (this->type()) 4447 { 4448 case THUMB16_TYPE: 4449 case THUMB16_SPECIAL_TYPE: 4450 case THUMB32_TYPE: 4451 return 2; 4452 case ARM_TYPE: 4453 case DATA_TYPE: 4454 return 4; 4455 default: 4456 gold_unreachable(); 4457 } 4458 } 4459 4460 // Stub_template methods. 4461 4462 Stub_template::Stub_template( 4463 Stub_type type, const Insn_template* insns, 4464 size_t insn_count) 4465 : type_(type), insns_(insns), insn_count_(insn_count), alignment_(1), 4466 entry_in_thumb_mode_(false), relocs_() 4467 { 4468 off_t offset = 0; 4469 4470 // Compute byte size and alignment of stub template. 4471 for (size_t i = 0; i < insn_count; i++) 4472 { 4473 unsigned insn_alignment = insns[i].alignment(); 4474 size_t insn_size = insns[i].size(); 4475 gold_assert((offset & (insn_alignment - 1)) == 0); 4476 this->alignment_ = std::max(this->alignment_, insn_alignment); 4477 switch (insns[i].type()) 4478 { 4479 case Insn_template::THUMB16_TYPE: 4480 case Insn_template::THUMB16_SPECIAL_TYPE: 4481 if (i == 0) 4482 this->entry_in_thumb_mode_ = true; 4483 break; 4484 4485 case Insn_template::THUMB32_TYPE: 4486 if (insns[i].r_type() != elfcpp::R_ARM_NONE) 4487 this->relocs_.push_back(Reloc(i, offset)); 4488 if (i == 0) 4489 this->entry_in_thumb_mode_ = true; 4490 break; 4491 4492 case Insn_template::ARM_TYPE: 4493 // Handle cases where the target is encoded within the 4494 // instruction. 4495 if (insns[i].r_type() == elfcpp::R_ARM_JUMP24) 4496 this->relocs_.push_back(Reloc(i, offset)); 4497 break; 4498 4499 case Insn_template::DATA_TYPE: 4500 // Entry point cannot be data. 4501 gold_assert(i != 0); 4502 this->relocs_.push_back(Reloc(i, offset)); 4503 break; 4504 4505 default: 4506 gold_unreachable(); 4507 } 4508 offset += insn_size; 4509 } 4510 this->size_ = offset; 4511 } 4512 4513 // Stub methods. 4514 4515 // Template to implement do_write for a specific target endianness. 4516 4517 template<bool big_endian> 4518 void inline 4519 Stub::do_fixed_endian_write(unsigned char* view, section_size_type view_size) 4520 { 4521 const Stub_template* stub_template = this->stub_template(); 4522 const Insn_template* insns = stub_template->insns(); 4523 4524 // FIXME: We do not handle BE8 encoding yet. 4525 unsigned char* pov = view; 4526 for (size_t i = 0; i < stub_template->insn_count(); i++) 4527 { 4528 switch (insns[i].type()) 4529 { 4530 case Insn_template::THUMB16_TYPE: 4531 elfcpp::Swap<16, big_endian>::writeval(pov, insns[i].data() & 0xffff); 4532 break; 4533 case Insn_template::THUMB16_SPECIAL_TYPE: 4534 elfcpp::Swap<16, big_endian>::writeval( 4535 pov, 4536 this->thumb16_special(i)); 4537 break; 4538 case Insn_template::THUMB32_TYPE: 4539 { 4540 uint32_t hi = (insns[i].data() >> 16) & 0xffff; 4541 uint32_t lo = insns[i].data() & 0xffff; 4542 elfcpp::Swap<16, big_endian>::writeval(pov, hi); 4543 elfcpp::Swap<16, big_endian>::writeval(pov + 2, lo); 4544 } 4545 break; 4546 case Insn_template::ARM_TYPE: 4547 case Insn_template::DATA_TYPE: 4548 elfcpp::Swap<32, big_endian>::writeval(pov, insns[i].data()); 4549 break; 4550 default: 4551 gold_unreachable(); 4552 } 4553 pov += insns[i].size(); 4554 } 4555 gold_assert(static_cast<section_size_type>(pov - view) == view_size); 4556 } 4557 4558 // Reloc_stub::Key methods. 4559 4560 // Dump a Key as a string for debugging. 4561 4562 std::string 4563 Reloc_stub::Key::name() const 4564 { 4565 if (this->r_sym_ == invalid_index) 4566 { 4567 // Global symbol key name 4568 // <stub-type>:<symbol name>:<addend>. 4569 const std::string sym_name = this->u_.symbol->name(); 4570 // We need to print two hex number and two colons. So just add 100 bytes 4571 // to the symbol name size. 4572 size_t len = sym_name.size() + 100; 4573 char* buffer = new char[len]; 4574 int c = snprintf(buffer, len, "%d:%s:%x", this->stub_type_, 4575 sym_name.c_str(), this->addend_); 4576 gold_assert(c > 0 && c < static_cast<int>(len)); 4577 delete[] buffer; 4578 return std::string(buffer); 4579 } 4580 else 4581 { 4582 // local symbol key name 4583 // <stub-type>:<object>:<r_sym>:<addend>. 4584 const size_t len = 200; 4585 char buffer[len]; 4586 int c = snprintf(buffer, len, "%d:%p:%u:%x", this->stub_type_, 4587 this->u_.relobj, this->r_sym_, this->addend_); 4588 gold_assert(c > 0 && c < static_cast<int>(len)); 4589 return std::string(buffer); 4590 } 4591 } 4592 4593 // Reloc_stub methods. 4594 4595 // Determine the type of stub needed, if any, for a relocation of R_TYPE at 4596 // LOCATION to DESTINATION. 4597 // This code is based on the arm_type_of_stub function in 4598 // bfd/elf32-arm.c. We have changed the interface a little to keep the Stub 4599 // class simple. 4600 4601 Stub_type 4602 Reloc_stub::stub_type_for_reloc( 4603 unsigned int r_type, 4604 Arm_address location, 4605 Arm_address destination, 4606 bool target_is_thumb) 4607 { 4608 Stub_type stub_type = arm_stub_none; 4609 4610 // This is a bit ugly but we want to avoid using a templated class for 4611 // big and little endianities. 4612 bool may_use_blx; 4613 bool should_force_pic_veneer = parameters->options().pic_veneer(); 4614 bool thumb2; 4615 bool thumb_only; 4616 if (parameters->target().is_big_endian()) 4617 { 4618 const Target_arm<true>* big_endian_target = 4619 Target_arm<true>::default_target(); 4620 may_use_blx = big_endian_target->may_use_v5t_interworking(); 4621 should_force_pic_veneer |= big_endian_target->should_force_pic_veneer(); 4622 thumb2 = big_endian_target->using_thumb2(); 4623 thumb_only = big_endian_target->using_thumb_only(); 4624 } 4625 else 4626 { 4627 const Target_arm<false>* little_endian_target = 4628 Target_arm<false>::default_target(); 4629 may_use_blx = little_endian_target->may_use_v5t_interworking(); 4630 should_force_pic_veneer |= 4631 little_endian_target->should_force_pic_veneer(); 4632 thumb2 = little_endian_target->using_thumb2(); 4633 thumb_only = little_endian_target->using_thumb_only(); 4634 } 4635 4636 int64_t branch_offset; 4637 bool output_is_position_independent = 4638 parameters->options().output_is_position_independent(); 4639 if (r_type == elfcpp::R_ARM_THM_CALL || r_type == elfcpp::R_ARM_THM_JUMP24) 4640 { 4641 // For THUMB BLX instruction, bit 1 of target comes from bit 1 of the 4642 // base address (instruction address + 4). 4643 if ((r_type == elfcpp::R_ARM_THM_CALL) && may_use_blx && !target_is_thumb) 4644 destination = Bits<32>::bit_select32(destination, location, 0x2); 4645 branch_offset = static_cast<int64_t>(destination) - location; 4646 4647 // Handle cases where: 4648 // - this call goes too far (different Thumb/Thumb2 max 4649 // distance) 4650 // - it's a Thumb->Arm call and blx is not available, or it's a 4651 // Thumb->Arm branch (not bl). A stub is needed in this case. 4652 if ((!thumb2 4653 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET 4654 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET))) 4655 || (thumb2 4656 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET 4657 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET))) 4658 || ((!target_is_thumb) 4659 && (((r_type == elfcpp::R_ARM_THM_CALL) && !may_use_blx) 4660 || (r_type == elfcpp::R_ARM_THM_JUMP24)))) 4661 { 4662 if (target_is_thumb) 4663 { 4664 // Thumb to thumb. 4665 if (!thumb_only) 4666 { 4667 stub_type = (output_is_position_independent 4668 || should_force_pic_veneer) 4669 // PIC stubs. 4670 ? ((may_use_blx 4671 && (r_type == elfcpp::R_ARM_THM_CALL)) 4672 // V5T and above. Stub starts with ARM code, so 4673 // we must be able to switch mode before 4674 // reaching it, which is only possible for 'bl' 4675 // (ie R_ARM_THM_CALL relocation). 4676 ? arm_stub_long_branch_any_thumb_pic 4677 // On V4T, use Thumb code only. 4678 : arm_stub_long_branch_v4t_thumb_thumb_pic) 4679 4680 // non-PIC stubs. 4681 : ((may_use_blx 4682 && (r_type == elfcpp::R_ARM_THM_CALL)) 4683 ? arm_stub_long_branch_any_any // V5T and above. 4684 : arm_stub_long_branch_v4t_thumb_thumb); // V4T. 4685 } 4686 else 4687 { 4688 stub_type = (output_is_position_independent 4689 || should_force_pic_veneer) 4690 ? arm_stub_long_branch_thumb_only_pic // PIC stub. 4691 : arm_stub_long_branch_thumb_only; // non-PIC stub. 4692 } 4693 } 4694 else 4695 { 4696 // Thumb to arm. 4697 4698 // FIXME: We should check that the input section is from an 4699 // object that has interwork enabled. 4700 4701 stub_type = (output_is_position_independent 4702 || should_force_pic_veneer) 4703 // PIC stubs. 4704 ? ((may_use_blx 4705 && (r_type == elfcpp::R_ARM_THM_CALL)) 4706 ? arm_stub_long_branch_any_arm_pic // V5T and above. 4707 : arm_stub_long_branch_v4t_thumb_arm_pic) // V4T. 4708 4709 // non-PIC stubs. 4710 : ((may_use_blx 4711 && (r_type == elfcpp::R_ARM_THM_CALL)) 4712 ? arm_stub_long_branch_any_any // V5T and above. 4713 : arm_stub_long_branch_v4t_thumb_arm); // V4T. 4714 4715 // Handle v4t short branches. 4716 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm) 4717 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET) 4718 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET)) 4719 stub_type = arm_stub_short_branch_v4t_thumb_arm; 4720 } 4721 } 4722 } 4723 else if (r_type == elfcpp::R_ARM_CALL 4724 || r_type == elfcpp::R_ARM_JUMP24 4725 || r_type == elfcpp::R_ARM_PLT32) 4726 { 4727 branch_offset = static_cast<int64_t>(destination) - location; 4728 if (target_is_thumb) 4729 { 4730 // Arm to thumb. 4731 4732 // FIXME: We should check that the input section is from an 4733 // object that has interwork enabled. 4734 4735 // We have an extra 2-bytes reach because of 4736 // the mode change (bit 24 (H) of BLX encoding). 4737 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2) 4738 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET) 4739 || ((r_type == elfcpp::R_ARM_CALL) && !may_use_blx) 4740 || (r_type == elfcpp::R_ARM_JUMP24) 4741 || (r_type == elfcpp::R_ARM_PLT32)) 4742 { 4743 stub_type = (output_is_position_independent 4744 || should_force_pic_veneer) 4745 // PIC stubs. 4746 ? (may_use_blx 4747 ? arm_stub_long_branch_any_thumb_pic// V5T and above. 4748 : arm_stub_long_branch_v4t_arm_thumb_pic) // V4T stub. 4749 4750 // non-PIC stubs. 4751 : (may_use_blx 4752 ? arm_stub_long_branch_any_any // V5T and above. 4753 : arm_stub_long_branch_v4t_arm_thumb); // V4T. 4754 } 4755 } 4756 else 4757 { 4758 // Arm to arm. 4759 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET 4760 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)) 4761 { 4762 stub_type = (output_is_position_independent 4763 || should_force_pic_veneer) 4764 ? arm_stub_long_branch_any_arm_pic // PIC stubs. 4765 : arm_stub_long_branch_any_any; /// non-PIC. 4766 } 4767 } 4768 } 4769 4770 return stub_type; 4771 } 4772 4773 // Cortex_a8_stub methods. 4774 4775 // Return the instruction for a THUMB16_SPECIAL_TYPE instruction template. 4776 // I is the position of the instruction template in the stub template. 4777 4778 uint16_t 4779 Cortex_a8_stub::do_thumb16_special(size_t i) 4780 { 4781 // The only use of this is to copy condition code from a conditional 4782 // branch being worked around to the corresponding conditional branch in 4783 // to the stub. 4784 gold_assert(this->stub_template()->type() == arm_stub_a8_veneer_b_cond 4785 && i == 0); 4786 uint16_t data = this->stub_template()->insns()[i].data(); 4787 gold_assert((data & 0xff00U) == 0xd000U); 4788 data |= ((this->original_insn_ >> 22) & 0xf) << 8; 4789 return data; 4790 } 4791 4792 // Stub_factory methods. 4793 4794 Stub_factory::Stub_factory() 4795 { 4796 // The instruction template sequences are declared as static 4797 // objects and initialized first time the constructor runs. 4798 4799 // Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx 4800 // to reach the stub if necessary. 4801 static const Insn_template elf32_arm_stub_long_branch_any_any[] = 4802 { 4803 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4] 4804 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0), 4805 // dcd R_ARM_ABS32(X) 4806 }; 4807 4808 // V4T Arm -> Thumb long branch stub. Used on V4T where blx is not 4809 // available. 4810 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb[] = 4811 { 4812 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0] 4813 Insn_template::arm_insn(0xe12fff1c), // bx ip 4814 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0), 4815 // dcd R_ARM_ABS32(X) 4816 }; 4817 4818 // Thumb -> Thumb long branch stub. Used on M-profile architectures. 4819 static const Insn_template elf32_arm_stub_long_branch_thumb_only[] = 4820 { 4821 Insn_template::thumb16_insn(0xb401), // push {r0} 4822 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8] 4823 Insn_template::thumb16_insn(0x4684), // mov ip, r0 4824 Insn_template::thumb16_insn(0xbc01), // pop {r0} 4825 Insn_template::thumb16_insn(0x4760), // bx ip 4826 Insn_template::thumb16_insn(0xbf00), // nop 4827 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0), 4828 // dcd R_ARM_ABS32(X) 4829 }; 4830 4831 // V4T Thumb -> Thumb long branch stub. Using the stack is not 4832 // allowed. 4833 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb[] = 4834 { 4835 Insn_template::thumb16_insn(0x4778), // bx pc 4836 Insn_template::thumb16_insn(0x46c0), // nop 4837 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0] 4838 Insn_template::arm_insn(0xe12fff1c), // bx ip 4839 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0), 4840 // dcd R_ARM_ABS32(X) 4841 }; 4842 4843 // V4T Thumb -> ARM long branch stub. Used on V4T where blx is not 4844 // available. 4845 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm[] = 4846 { 4847 Insn_template::thumb16_insn(0x4778), // bx pc 4848 Insn_template::thumb16_insn(0x46c0), // nop 4849 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4] 4850 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0), 4851 // dcd R_ARM_ABS32(X) 4852 }; 4853 4854 // V4T Thumb -> ARM short branch stub. Shorter variant of the above 4855 // one, when the destination is close enough. 4856 static const Insn_template elf32_arm_stub_short_branch_v4t_thumb_arm[] = 4857 { 4858 Insn_template::thumb16_insn(0x4778), // bx pc 4859 Insn_template::thumb16_insn(0x46c0), // nop 4860 Insn_template::arm_rel_insn(0xea000000, -8), // b (X-8) 4861 }; 4862 4863 // ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use 4864 // blx to reach the stub if necessary. 4865 static const Insn_template elf32_arm_stub_long_branch_any_arm_pic[] = 4866 { 4867 Insn_template::arm_insn(0xe59fc000), // ldr r12, [pc] 4868 Insn_template::arm_insn(0xe08ff00c), // add pc, pc, ip 4869 Insn_template::data_word(0, elfcpp::R_ARM_REL32, -4), 4870 // dcd R_ARM_REL32(X-4) 4871 }; 4872 4873 // ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use 4874 // blx to reach the stub if necessary. We can not add into pc; 4875 // it is not guaranteed to mode switch (different in ARMv6 and 4876 // ARMv7). 4877 static const Insn_template elf32_arm_stub_long_branch_any_thumb_pic[] = 4878 { 4879 Insn_template::arm_insn(0xe59fc004), // ldr r12, [pc, #4] 4880 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip 4881 Insn_template::arm_insn(0xe12fff1c), // bx ip 4882 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 0), 4883 // dcd R_ARM_REL32(X) 4884 }; 4885 4886 // V4T ARM -> ARM long branch stub, PIC. 4887 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] = 4888 { 4889 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4] 4890 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip 4891 Insn_template::arm_insn(0xe12fff1c), // bx ip 4892 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 0), 4893 // dcd R_ARM_REL32(X) 4894 }; 4895 4896 // V4T Thumb -> ARM long branch stub, PIC. 4897 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] = 4898 { 4899 Insn_template::thumb16_insn(0x4778), // bx pc 4900 Insn_template::thumb16_insn(0x46c0), // nop 4901 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0] 4902 Insn_template::arm_insn(0xe08cf00f), // add pc, ip, pc 4903 Insn_template::data_word(0, elfcpp::R_ARM_REL32, -4), 4904 // dcd R_ARM_REL32(X) 4905 }; 4906 4907 // Thumb -> Thumb long branch stub, PIC. Used on M-profile 4908 // architectures. 4909 static const Insn_template elf32_arm_stub_long_branch_thumb_only_pic[] = 4910 { 4911 Insn_template::thumb16_insn(0xb401), // push {r0} 4912 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8] 4913 Insn_template::thumb16_insn(0x46fc), // mov ip, pc 4914 Insn_template::thumb16_insn(0x4484), // add ip, r0 4915 Insn_template::thumb16_insn(0xbc01), // pop {r0} 4916 Insn_template::thumb16_insn(0x4760), // bx ip 4917 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 4), 4918 // dcd R_ARM_REL32(X) 4919 }; 4920 4921 // V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not 4922 // allowed. 4923 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] = 4924 { 4925 Insn_template::thumb16_insn(0x4778), // bx pc 4926 Insn_template::thumb16_insn(0x46c0), // nop 4927 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4] 4928 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip 4929 Insn_template::arm_insn(0xe12fff1c), // bx ip 4930 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 0), 4931 // dcd R_ARM_REL32(X) 4932 }; 4933 4934 // Cortex-A8 erratum-workaround stubs. 4935 4936 // Stub used for conditional branches (which may be beyond +/-1MB away, 4937 // so we can't use a conditional branch to reach this stub). 4938 4939 // original code: 4940 // 4941 // b<cond> X 4942 // after: 4943 // 4944 static const Insn_template elf32_arm_stub_a8_veneer_b_cond[] = 4945 { 4946 Insn_template::thumb16_bcond_insn(0xd001), // b<cond>.n true 4947 Insn_template::thumb32_b_insn(0xf000b800, -4), // b.w after 4948 Insn_template::thumb32_b_insn(0xf000b800, -4) // true: 4949 // b.w X 4950 }; 4951 4952 // Stub used for b.w and bl.w instructions. 4953 4954 static const Insn_template elf32_arm_stub_a8_veneer_b[] = 4955 { 4956 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest 4957 }; 4958 4959 static const Insn_template elf32_arm_stub_a8_veneer_bl[] = 4960 { 4961 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest 4962 }; 4963 4964 // Stub used for Thumb-2 blx.w instructions. We modified the original blx.w 4965 // instruction (which switches to ARM mode) to point to this stub. Jump to 4966 // the real destination using an ARM-mode branch. 4967 static const Insn_template elf32_arm_stub_a8_veneer_blx[] = 4968 { 4969 Insn_template::arm_rel_insn(0xea000000, -8) // b dest 4970 }; 4971 4972 // Stub used to provide an interworking for R_ARM_V4BX relocation 4973 // (bx r[n] instruction). 4974 static const Insn_template elf32_arm_stub_v4_veneer_bx[] = 4975 { 4976 Insn_template::arm_insn(0xe3100001), // tst r<n>, #1 4977 Insn_template::arm_insn(0x01a0f000), // moveq pc, r<n> 4978 Insn_template::arm_insn(0xe12fff10) // bx r<n> 4979 }; 4980 4981 // Fill in the stub template look-up table. Stub templates are constructed 4982 // per instance of Stub_factory for fast look-up without locking 4983 // in a thread-enabled environment. 4984 4985 this->stub_templates_[arm_stub_none] = 4986 new Stub_template(arm_stub_none, NULL, 0); 4987 4988 #define DEF_STUB(x) \ 4989 do \ 4990 { \ 4991 size_t array_size \ 4992 = sizeof(elf32_arm_stub_##x) / sizeof(elf32_arm_stub_##x[0]); \ 4993 Stub_type type = arm_stub_##x; \ 4994 this->stub_templates_[type] = \ 4995 new Stub_template(type, elf32_arm_stub_##x, array_size); \ 4996 } \ 4997 while (0); 4998 4999 DEF_STUBS 5000 #undef DEF_STUB 5001 } 5002 5003 // Stub_table methods. 5004 5005 // Remove all Cortex-A8 stub. 5006 5007 template<bool big_endian> 5008 void 5009 Stub_table<big_endian>::remove_all_cortex_a8_stubs() 5010 { 5011 for (Cortex_a8_stub_list::iterator p = this->cortex_a8_stubs_.begin(); 5012 p != this->cortex_a8_stubs_.end(); 5013 ++p) 5014 delete p->second; 5015 this->cortex_a8_stubs_.clear(); 5016 } 5017 5018 // Relocate one stub. This is a helper for Stub_table::relocate_stubs(). 5019 5020 template<bool big_endian> 5021 void 5022 Stub_table<big_endian>::relocate_stub( 5023 Stub* stub, 5024 const Relocate_info<32, big_endian>* relinfo, 5025 Target_arm<big_endian>* arm_target, 5026 Output_section* output_section, 5027 unsigned char* view, 5028 Arm_address address, 5029 section_size_type view_size) 5030 { 5031 const Stub_template* stub_template = stub->stub_template(); 5032 if (stub_template->reloc_count() != 0) 5033 { 5034 // Adjust view to cover the stub only. 5035 section_size_type offset = stub->offset(); 5036 section_size_type stub_size = stub_template->size(); 5037 gold_assert(offset + stub_size <= view_size); 5038 5039 arm_target->relocate_stub(stub, relinfo, output_section, view + offset, 5040 address + offset, stub_size); 5041 } 5042 } 5043 5044 // Relocate all stubs in this stub table. 5045 5046 template<bool big_endian> 5047 void 5048 Stub_table<big_endian>::relocate_stubs( 5049 const Relocate_info<32, big_endian>* relinfo, 5050 Target_arm<big_endian>* arm_target, 5051 Output_section* output_section, 5052 unsigned char* view, 5053 Arm_address address, 5054 section_size_type view_size) 5055 { 5056 // If we are passed a view bigger than the stub table's. we need to 5057 // adjust the view. 5058 gold_assert(address == this->address() 5059 && (view_size 5060 == static_cast<section_size_type>(this->data_size()))); 5061 5062 // Relocate all relocation stubs. 5063 for (typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.begin(); 5064 p != this->reloc_stubs_.end(); 5065 ++p) 5066 this->relocate_stub(p->second, relinfo, arm_target, output_section, view, 5067 address, view_size); 5068 5069 // Relocate all Cortex-A8 stubs. 5070 for (Cortex_a8_stub_list::iterator p = this->cortex_a8_stubs_.begin(); 5071 p != this->cortex_a8_stubs_.end(); 5072 ++p) 5073 this->relocate_stub(p->second, relinfo, arm_target, output_section, view, 5074 address, view_size); 5075 5076 // Relocate all ARM V4BX stubs. 5077 for (Arm_v4bx_stub_list::iterator p = this->arm_v4bx_stubs_.begin(); 5078 p != this->arm_v4bx_stubs_.end(); 5079 ++p) 5080 { 5081 if (*p != NULL) 5082 this->relocate_stub(*p, relinfo, arm_target, output_section, view, 5083 address, view_size); 5084 } 5085 } 5086 5087 // Write out the stubs to file. 5088 5089 template<bool big_endian> 5090 void 5091 Stub_table<big_endian>::do_write(Output_file* of) 5092 { 5093 off_t offset = this->offset(); 5094 const section_size_type oview_size = 5095 convert_to_section_size_type(this->data_size()); 5096 unsigned char* const oview = of->get_output_view(offset, oview_size); 5097 5098 // Write relocation stubs. 5099 for (typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.begin(); 5100 p != this->reloc_stubs_.end(); 5101 ++p) 5102 { 5103 Reloc_stub* stub = p->second; 5104 Arm_address address = this->address() + stub->offset(); 5105 gold_assert(address 5106 == align_address(address, 5107 stub->stub_template()->alignment())); 5108 stub->write(oview + stub->offset(), stub->stub_template()->size(), 5109 big_endian); 5110 } 5111 5112 // Write Cortex-A8 stubs. 5113 for (Cortex_a8_stub_list::const_iterator p = this->cortex_a8_stubs_.begin(); 5114 p != this->cortex_a8_stubs_.end(); 5115 ++p) 5116 { 5117 Cortex_a8_stub* stub = p->second; 5118 Arm_address address = this->address() + stub->offset(); 5119 gold_assert(address 5120 == align_address(address, 5121 stub->stub_template()->alignment())); 5122 stub->write(oview + stub->offset(), stub->stub_template()->size(), 5123 big_endian); 5124 } 5125 5126 // Write ARM V4BX relocation stubs. 5127 for (Arm_v4bx_stub_list::const_iterator p = this->arm_v4bx_stubs_.begin(); 5128 p != this->arm_v4bx_stubs_.end(); 5129 ++p) 5130 { 5131 if (*p == NULL) 5132 continue; 5133 5134 Arm_address address = this->address() + (*p)->offset(); 5135 gold_assert(address 5136 == align_address(address, 5137 (*p)->stub_template()->alignment())); 5138 (*p)->write(oview + (*p)->offset(), (*p)->stub_template()->size(), 5139 big_endian); 5140 } 5141 5142 if (parameters->options().stub_group_auto_padding()) 5143 { 5144 // Zero-fill padding area. 5145 gold_assert((unsigned int)(this->prev_data_size_ + this->padding_) <= oview_size); 5146 unsigned char* p_padding_area = oview + this->prev_data_size_; 5147 for (unsigned int i = 0; i < this->padding_; ++i) 5148 *(p_padding_area + i) = 0; 5149 } 5150 5151 of->write_output_view(this->offset(), oview_size, oview); 5152 } 5153 5154 // Update the data size and address alignment of the stub table at the end 5155 // of a relaxation pass. Return true if either the data size or the 5156 // alignment changed in this relaxation pass. 5157 5158 template<bool big_endian> 5159 bool 5160 Stub_table<big_endian>::update_data_size_and_addralign() 5161 { 5162 // Go over all stubs in table to compute data size and address alignment. 5163 off_t size = this->reloc_stubs_size_; 5164 unsigned addralign = this->reloc_stubs_addralign_; 5165 5166 for (Cortex_a8_stub_list::const_iterator p = this->cortex_a8_stubs_.begin(); 5167 p != this->cortex_a8_stubs_.end(); 5168 ++p) 5169 { 5170 const Stub_template* stub_template = p->second->stub_template(); 5171 addralign = std::max(addralign, stub_template->alignment()); 5172 size = (align_address(size, stub_template->alignment()) 5173 + stub_template->size()); 5174 } 5175 5176 for (Arm_v4bx_stub_list::const_iterator p = this->arm_v4bx_stubs_.begin(); 5177 p != this->arm_v4bx_stubs_.end(); 5178 ++p) 5179 { 5180 if (*p == NULL) 5181 continue; 5182 5183 const Stub_template* stub_template = (*p)->stub_template(); 5184 addralign = std::max(addralign, stub_template->alignment()); 5185 size = (align_address(size, stub_template->alignment()) 5186 + stub_template->size()); 5187 } 5188 5189 unsigned int prev_padding = this->padding_; 5190 5191 // Smart padding. 5192 if (parameters->options().stub_group_auto_padding()) 5193 { 5194 if(size > this->prev_data_size_) 5195 { 5196 // Stub table has to grow 'delta' bytes. 5197 unsigned int delta = size - this->prev_data_size_; 5198 // Test to see if this delta grow could be "absorbed" by the 5199 // "padding_" we added in previously iteration. 5200 if (delta <= this->padding_) 5201 { 5202 // Yes! Grow into padding area, shrink padding, keep stub table 5203 // size unchanged. 5204 this->padding_ -= delta; 5205 } 5206 else 5207 { 5208 // No! Delta is too much to fit in padding area. Heuristically, we 5209 // increase padding. Padding is about 0.5% of huge increment, or 5210 // 2% of moderate increment, or 0% for smaller ones.. 5211 if (delta >= 0x50000) 5212 this->padding_ = 0x250; 5213 else if (delta >= 0x30000) 5214 this->padding_ = 0x150; 5215 else if (delta >= 0x10000) 5216 this->padding_ = 0x100; 5217 else if (delta >= 0x500) 5218 { 5219 // Set padding to 2% of stub table growth delta or 0x40, 5220 // whichever is smaller. 5221 this->padding_ = std::min((unsigned int)(delta * 0.02), 5222 (unsigned int)0x40); 5223 } 5224 } 5225 } 5226 else if (size < this->prev_data_size_) 5227 { 5228 // Stub table shrinks, this is rare, but not impossible. 5229 unsigned int delta = this->prev_data_size_ - size; 5230 // So let padding increase to absorb the shrinking. Still we get an 5231 // unchanged stub table. 5232 this->padding_ += delta; 5233 } 5234 } 5235 5236 // Check if either data size or alignment changed in this pass. 5237 // Update prev_data_size_ and prev_addralign_. These will be used 5238 // as the current data size and address alignment for the next pass. 5239 bool changed = (size + this->padding_) != 5240 this->prev_data_size_ + prev_padding; 5241 5242 this->prev_data_size_ = size; 5243 5244 if (addralign != this->prev_addralign_) 5245 changed = true; 5246 this->prev_addralign_ = addralign; 5247 5248 return changed; 5249 } 5250 5251 // Finalize the stubs. This sets the offsets of the stubs within the stub 5252 // table. It also marks all input sections needing Cortex-A8 workaround. 5253 5254 template<bool big_endian> 5255 void 5256 Stub_table<big_endian>::finalize_stubs() 5257 { 5258 off_t off = this->reloc_stubs_size_; 5259 for (Cortex_a8_stub_list::const_iterator p = this->cortex_a8_stubs_.begin(); 5260 p != this->cortex_a8_stubs_.end(); 5261 ++p) 5262 { 5263 Cortex_a8_stub* stub = p->second; 5264 const Stub_template* stub_template = stub->stub_template(); 5265 uint64_t stub_addralign = stub_template->alignment(); 5266 off = align_address(off, stub_addralign); 5267 stub->set_offset(off); 5268 off += stub_template->size(); 5269 5270 // Mark input section so that we can determine later if a code section 5271 // needs the Cortex-A8 workaround quickly. 5272 Arm_relobj<big_endian>* arm_relobj = 5273 Arm_relobj<big_endian>::as_arm_relobj(stub->relobj()); 5274 arm_relobj->mark_section_for_cortex_a8_workaround(stub->shndx()); 5275 } 5276 5277 for (Arm_v4bx_stub_list::const_iterator p = this->arm_v4bx_stubs_.begin(); 5278 p != this->arm_v4bx_stubs_.end(); 5279 ++p) 5280 { 5281 if (*p == NULL) 5282 continue; 5283 5284 const Stub_template* stub_template = (*p)->stub_template(); 5285 uint64_t stub_addralign = stub_template->alignment(); 5286 off = align_address(off, stub_addralign); 5287 (*p)->set_offset(off); 5288 off += stub_template->size(); 5289 } 5290 5291 gold_assert(off <= this->prev_data_size_); 5292 } 5293 5294 // Apply Cortex-A8 workaround to an address range between VIEW_ADDRESS 5295 // and VIEW_ADDRESS + VIEW_SIZE - 1. VIEW points to the mapped address 5296 // of the address range seen by the linker. 5297 5298 template<bool big_endian> 5299 void 5300 Stub_table<big_endian>::apply_cortex_a8_workaround_to_address_range( 5301 Target_arm<big_endian>* arm_target, 5302 unsigned char* view, 5303 Arm_address view_address, 5304 section_size_type view_size) 5305 { 5306 // Cortex-A8 stubs are sorted by addresses of branches being fixed up. 5307 for (Cortex_a8_stub_list::const_iterator p = 5308 this->cortex_a8_stubs_.lower_bound(view_address); 5309 ((p != this->cortex_a8_stubs_.end()) 5310 && (p->first < (view_address + view_size))); 5311 ++p) 5312 { 5313 // We do not store the THUMB bit in the LSB of either the branch address 5314 // or the stub offset. There is no need to strip the LSB. 5315 Arm_address branch_address = p->first; 5316 const Cortex_a8_stub* stub = p->second; 5317 Arm_address stub_address = this->address() + stub->offset(); 5318 5319 // Offset of the branch instruction relative to this view. 5320 section_size_type offset = 5321 convert_to_section_size_type(branch_address - view_address); 5322 gold_assert((offset + 4) <= view_size); 5323 5324 arm_target->apply_cortex_a8_workaround(stub, stub_address, 5325 view + offset, branch_address); 5326 } 5327 } 5328 5329 // Arm_input_section methods. 5330 5331 // Initialize an Arm_input_section. 5332 5333 template<bool big_endian> 5334 void 5335 Arm_input_section<big_endian>::init() 5336 { 5337 Relobj* relobj = this->relobj(); 5338 unsigned int shndx = this->shndx(); 5339 5340 // We have to cache original size, alignment and contents to avoid locking 5341 // the original file. 5342 this->original_addralign_ = 5343 convert_types<uint32_t, uint64_t>(relobj->section_addralign(shndx)); 5344 5345 // This is not efficient but we expect only a small number of relaxed 5346 // input sections for stubs. 5347 section_size_type section_size; 5348 const unsigned char* section_contents = 5349 relobj->section_contents(shndx, §ion_size, false); 5350 this->original_size_ = 5351 convert_types<uint32_t, uint64_t>(relobj->section_size(shndx)); 5352 5353 gold_assert(this->original_contents_ == NULL); 5354 this->original_contents_ = new unsigned char[section_size]; 5355 memcpy(this->original_contents_, section_contents, section_size); 5356 5357 // We want to make this look like the original input section after 5358 // output sections are finalized. 5359 Output_section* os = relobj->output_section(shndx); 5360 off_t offset = relobj->output_section_offset(shndx); 5361 gold_assert(os != NULL && !relobj->is_output_section_offset_invalid(shndx)); 5362 this->set_address(os->address() + offset); 5363 this->set_file_offset(os->offset() + offset); 5364 5365 this->set_current_data_size(this->original_size_); 5366 this->finalize_data_size(); 5367 } 5368 5369 template<bool big_endian> 5370 void 5371 Arm_input_section<big_endian>::do_write(Output_file* of) 5372 { 5373 // We have to write out the original section content. 5374 gold_assert(this->original_contents_ != NULL); 5375 of->write(this->offset(), this->original_contents_, 5376 this->original_size_); 5377 5378 // If this owns a stub table and it is not empty, write it. 5379 if (this->is_stub_table_owner() && !this->stub_table_->empty()) 5380 this->stub_table_->write(of); 5381 } 5382 5383 // Finalize data size. 5384 5385 template<bool big_endian> 5386 void 5387 Arm_input_section<big_endian>::set_final_data_size() 5388 { 5389 off_t off = convert_types<off_t, uint64_t>(this->original_size_); 5390 5391 if (this->is_stub_table_owner()) 5392 { 5393 this->stub_table_->finalize_data_size(); 5394 off = align_address(off, this->stub_table_->addralign()); 5395 off += this->stub_table_->data_size(); 5396 } 5397 this->set_data_size(off); 5398 } 5399 5400 // Reset address and file offset. 5401 5402 template<bool big_endian> 5403 void 5404 Arm_input_section<big_endian>::do_reset_address_and_file_offset() 5405 { 5406 // Size of the original input section contents. 5407 off_t off = convert_types<off_t, uint64_t>(this->original_size_); 5408 5409 // If this is a stub table owner, account for the stub table size. 5410 if (this->is_stub_table_owner()) 5411 { 5412 Stub_table<big_endian>* stub_table = this->stub_table_; 5413 5414 // Reset the stub table's address and file offset. The 5415 // current data size for child will be updated after that. 5416 stub_table_->reset_address_and_file_offset(); 5417 off = align_address(off, stub_table_->addralign()); 5418 off += stub_table->current_data_size(); 5419 } 5420 5421 this->set_current_data_size(off); 5422 } 5423 5424 // Arm_exidx_cantunwind methods. 5425 5426 // Write this to Output file OF for a fixed endianness. 5427 5428 template<bool big_endian> 5429 void 5430 Arm_exidx_cantunwind::do_fixed_endian_write(Output_file* of) 5431 { 5432 off_t offset = this->offset(); 5433 const section_size_type oview_size = 8; 5434 unsigned char* const oview = of->get_output_view(offset, oview_size); 5435 5436 Output_section* os = this->relobj_->output_section(this->shndx_); 5437 gold_assert(os != NULL); 5438 5439 Arm_relobj<big_endian>* arm_relobj = 5440 Arm_relobj<big_endian>::as_arm_relobj(this->relobj_); 5441 Arm_address output_offset = 5442 arm_relobj->get_output_section_offset(this->shndx_); 5443 Arm_address section_start; 5444 section_size_type section_size; 5445 5446 // Find out the end of the text section referred by this. 5447 if (output_offset != Arm_relobj<big_endian>::invalid_address) 5448 { 5449 section_start = os->address() + output_offset; 5450 const Arm_exidx_input_section* exidx_input_section = 5451 arm_relobj->exidx_input_section_by_link(this->shndx_); 5452 gold_assert(exidx_input_section != NULL); 5453 section_size = 5454 convert_to_section_size_type(exidx_input_section->text_size()); 5455 } 5456 else 5457 { 5458 // Currently this only happens for a relaxed section. 5459 const Output_relaxed_input_section* poris = 5460 os->find_relaxed_input_section(this->relobj_, this->shndx_); 5461 gold_assert(poris != NULL); 5462 section_start = poris->address(); 5463 section_size = convert_to_section_size_type(poris->data_size()); 5464 } 5465 5466 // We always append this to the end of an EXIDX section. 5467 Arm_address output_address = section_start + section_size; 5468 5469 // Write out the entry. The first word either points to the beginning 5470 // or after the end of a text section. The second word is the special 5471 // EXIDX_CANTUNWIND value. 5472 uint32_t prel31_offset = output_address - this->address(); 5473 if (Bits<31>::has_overflow32(offset)) 5474 gold_error(_("PREL31 overflow in EXIDX_CANTUNWIND entry")); 5475 elfcpp::Swap_unaligned<32, big_endian>::writeval(oview, 5476 prel31_offset & 0x7fffffffU); 5477 elfcpp::Swap_unaligned<32, big_endian>::writeval(oview + 4, 5478 elfcpp::EXIDX_CANTUNWIND); 5479 5480 of->write_output_view(this->offset(), oview_size, oview); 5481 } 5482 5483 // Arm_exidx_merged_section methods. 5484 5485 // Constructor for Arm_exidx_merged_section. 5486 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section. 5487 // SECTION_OFFSET_MAP points to a section offset map describing how 5488 // parts of the input section are mapped to output. DELETED_BYTES is 5489 // the number of bytes deleted from the EXIDX input section. 5490 5491 Arm_exidx_merged_section::Arm_exidx_merged_section( 5492 const Arm_exidx_input_section& exidx_input_section, 5493 const Arm_exidx_section_offset_map& section_offset_map, 5494 uint32_t deleted_bytes) 5495 : Output_relaxed_input_section(exidx_input_section.relobj(), 5496 exidx_input_section.shndx(), 5497 exidx_input_section.addralign()), 5498 exidx_input_section_(exidx_input_section), 5499 section_offset_map_(section_offset_map) 5500 { 5501 // If we retain or discard the whole EXIDX input section, we would 5502 // not be here. 5503 gold_assert(deleted_bytes != 0 5504 && deleted_bytes != this->exidx_input_section_.size()); 5505 5506 // Fix size here so that we do not need to implement set_final_data_size. 5507 uint32_t size = exidx_input_section.size() - deleted_bytes; 5508 this->set_data_size(size); 5509 this->fix_data_size(); 5510 5511 // Allocate buffer for section contents and build contents. 5512 this->section_contents_ = new unsigned char[size]; 5513 } 5514 5515 // Build the contents of a merged EXIDX output section. 5516 5517 void 5518 Arm_exidx_merged_section::build_contents( 5519 const unsigned char* original_contents, 5520 section_size_type original_size) 5521 { 5522 // Go over spans of input offsets and write only those that are not 5523 // discarded. 5524 section_offset_type in_start = 0; 5525 section_offset_type out_start = 0; 5526 section_offset_type in_max = 5527 convert_types<section_offset_type>(original_size); 5528 section_offset_type out_max = 5529 convert_types<section_offset_type>(this->data_size()); 5530 for (Arm_exidx_section_offset_map::const_iterator p = 5531 this->section_offset_map_.begin(); 5532 p != this->section_offset_map_.end(); 5533 ++p) 5534 { 5535 section_offset_type in_end = p->first; 5536 gold_assert(in_end >= in_start); 5537 section_offset_type out_end = p->second; 5538 size_t in_chunk_size = convert_types<size_t>(in_end - in_start + 1); 5539 if (out_end != -1) 5540 { 5541 size_t out_chunk_size = 5542 convert_types<size_t>(out_end - out_start + 1); 5543 5544 gold_assert(out_chunk_size == in_chunk_size 5545 && in_end < in_max && out_end < out_max); 5546 5547 memcpy(this->section_contents_ + out_start, 5548 original_contents + in_start, 5549 out_chunk_size); 5550 out_start += out_chunk_size; 5551 } 5552 in_start += in_chunk_size; 5553 } 5554 } 5555 5556 // Given an input OBJECT, an input section index SHNDX within that 5557 // object, and an OFFSET relative to the start of that input 5558 // section, return whether or not the corresponding offset within 5559 // the output section is known. If this function returns true, it 5560 // sets *POUTPUT to the output offset. The value -1 indicates that 5561 // this input offset is being discarded. 5562 5563 bool 5564 Arm_exidx_merged_section::do_output_offset( 5565 const Relobj* relobj, 5566 unsigned int shndx, 5567 section_offset_type offset, 5568 section_offset_type* poutput) const 5569 { 5570 // We only handle offsets for the original EXIDX input section. 5571 if (relobj != this->exidx_input_section_.relobj() 5572 || shndx != this->exidx_input_section_.shndx()) 5573 return false; 5574 5575 section_offset_type section_size = 5576 convert_types<section_offset_type>(this->exidx_input_section_.size()); 5577 if (offset < 0 || offset >= section_size) 5578 // Input offset is out of valid range. 5579 *poutput = -1; 5580 else 5581 { 5582 // We need to look up the section offset map to determine the output 5583 // offset. Find the reference point in map that is first offset 5584 // bigger than or equal to this offset. 5585 Arm_exidx_section_offset_map::const_iterator p = 5586 this->section_offset_map_.lower_bound(offset); 5587 5588 // The section offset maps are build such that this should not happen if 5589 // input offset is in the valid range. 5590 gold_assert(p != this->section_offset_map_.end()); 5591 5592 // We need to check if this is dropped. 5593 section_offset_type ref = p->first; 5594 section_offset_type mapped_ref = p->second; 5595 5596 if (mapped_ref != Arm_exidx_input_section::invalid_offset) 5597 // Offset is present in output. 5598 *poutput = mapped_ref + (offset - ref); 5599 else 5600 // Offset is discarded owing to EXIDX entry merging. 5601 *poutput = -1; 5602 } 5603 5604 return true; 5605 } 5606 5607 // Write this to output file OF. 5608 5609 void 5610 Arm_exidx_merged_section::do_write(Output_file* of) 5611 { 5612 off_t offset = this->offset(); 5613 const section_size_type oview_size = this->data_size(); 5614 unsigned char* const oview = of->get_output_view(offset, oview_size); 5615 5616 Output_section* os = this->relobj()->output_section(this->shndx()); 5617 gold_assert(os != NULL); 5618 5619 memcpy(oview, this->section_contents_, oview_size); 5620 of->write_output_view(this->offset(), oview_size, oview); 5621 } 5622 5623 // Arm_exidx_fixup methods. 5624 5625 // Append an EXIDX_CANTUNWIND in the current output section if the last entry 5626 // is not an EXIDX_CANTUNWIND entry already. The new EXIDX_CANTUNWIND entry 5627 // points to the end of the last seen EXIDX section. 5628 5629 void 5630 Arm_exidx_fixup::add_exidx_cantunwind_as_needed() 5631 { 5632 if (this->last_unwind_type_ != UT_EXIDX_CANTUNWIND 5633 && this->last_input_section_ != NULL) 5634 { 5635 Relobj* relobj = this->last_input_section_->relobj(); 5636 unsigned int text_shndx = this->last_input_section_->link(); 5637 Arm_exidx_cantunwind* cantunwind = 5638 new Arm_exidx_cantunwind(relobj, text_shndx); 5639 this->exidx_output_section_->add_output_section_data(cantunwind); 5640 this->last_unwind_type_ = UT_EXIDX_CANTUNWIND; 5641 } 5642 } 5643 5644 // Process an EXIDX section entry in input. Return whether this entry 5645 // can be deleted in the output. SECOND_WORD in the second word of the 5646 // EXIDX entry. 5647 5648 bool 5649 Arm_exidx_fixup::process_exidx_entry(uint32_t second_word) 5650 { 5651 bool delete_entry; 5652 if (second_word == elfcpp::EXIDX_CANTUNWIND) 5653 { 5654 // Merge if previous entry is also an EXIDX_CANTUNWIND. 5655 delete_entry = this->last_unwind_type_ == UT_EXIDX_CANTUNWIND; 5656 this->last_unwind_type_ = UT_EXIDX_CANTUNWIND; 5657 } 5658 else if ((second_word & 0x80000000) != 0) 5659 { 5660 // Inlined unwinding data. Merge if equal to previous. 5661 delete_entry = (merge_exidx_entries_ 5662 && this->last_unwind_type_ == UT_INLINED_ENTRY 5663 && this->last_inlined_entry_ == second_word); 5664 this->last_unwind_type_ = UT_INLINED_ENTRY; 5665 this->last_inlined_entry_ = second_word; 5666 } 5667 else 5668 { 5669 // Normal table entry. In theory we could merge these too, 5670 // but duplicate entries are likely to be much less common. 5671 delete_entry = false; 5672 this->last_unwind_type_ = UT_NORMAL_ENTRY; 5673 } 5674 return delete_entry; 5675 } 5676 5677 // Update the current section offset map during EXIDX section fix-up. 5678 // If there is no map, create one. INPUT_OFFSET is the offset of a 5679 // reference point, DELETED_BYTES is the number of deleted by in the 5680 // section so far. If DELETE_ENTRY is true, the reference point and 5681 // all offsets after the previous reference point are discarded. 5682 5683 void 5684 Arm_exidx_fixup::update_offset_map( 5685 section_offset_type input_offset, 5686 section_size_type deleted_bytes, 5687 bool delete_entry) 5688 { 5689 if (this->section_offset_map_ == NULL) 5690 this->section_offset_map_ = new Arm_exidx_section_offset_map(); 5691 section_offset_type output_offset; 5692 if (delete_entry) 5693 output_offset = Arm_exidx_input_section::invalid_offset; 5694 else 5695 output_offset = input_offset - deleted_bytes; 5696 (*this->section_offset_map_)[input_offset] = output_offset; 5697 } 5698 5699 // Process EXIDX_INPUT_SECTION for EXIDX entry merging. Return the number of 5700 // bytes deleted. SECTION_CONTENTS points to the contents of the EXIDX 5701 // section and SECTION_SIZE is the number of bytes pointed by SECTION_CONTENTS. 5702 // If some entries are merged, also store a pointer to a newly created 5703 // Arm_exidx_section_offset_map object in *PSECTION_OFFSET_MAP. The caller 5704 // owns the map and is responsible for releasing it after use. 5705 5706 template<bool big_endian> 5707 uint32_t 5708 Arm_exidx_fixup::process_exidx_section( 5709 const Arm_exidx_input_section* exidx_input_section, 5710 const unsigned char* section_contents, 5711 section_size_type section_size, 5712 Arm_exidx_section_offset_map** psection_offset_map) 5713 { 5714 Relobj* relobj = exidx_input_section->relobj(); 5715 unsigned shndx = exidx_input_section->shndx(); 5716 5717 if ((section_size % 8) != 0) 5718 { 5719 // Something is wrong with this section. Better not touch it. 5720 gold_error(_("uneven .ARM.exidx section size in %s section %u"), 5721 relobj->name().c_str(), shndx); 5722 this->last_input_section_ = exidx_input_section; 5723 this->last_unwind_type_ = UT_NONE; 5724 return 0; 5725 } 5726 5727 uint32_t deleted_bytes = 0; 5728 bool prev_delete_entry = false; 5729 gold_assert(this->section_offset_map_ == NULL); 5730 5731 for (section_size_type i = 0; i < section_size; i += 8) 5732 { 5733 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; 5734 const Valtype* wv = 5735 reinterpret_cast<const Valtype*>(section_contents + i + 4); 5736 uint32_t second_word = elfcpp::Swap<32, big_endian>::readval(wv); 5737 5738 bool delete_entry = this->process_exidx_entry(second_word); 5739 5740 // Entry deletion causes changes in output offsets. We use a std::map 5741 // to record these. And entry (x, y) means input offset x 5742 // is mapped to output offset y. If y is invalid_offset, then x is 5743 // dropped in the output. Because of the way std::map::lower_bound 5744 // works, we record the last offset in a region w.r.t to keeping or 5745 // dropping. If there is no entry (x0, y0) for an input offset x0, 5746 // the output offset y0 of it is determined by the output offset y1 of 5747 // the smallest input offset x1 > x0 that there is an (x1, y1) entry 5748 // in the map. If y1 is not -1, then y0 = y1 + x0 - x1. Otherwise, y1 5749 // y0 is also -1. 5750 if (delete_entry != prev_delete_entry && i != 0) 5751 this->update_offset_map(i - 1, deleted_bytes, prev_delete_entry); 5752 5753 // Update total deleted bytes for this entry. 5754 if (delete_entry) 5755 deleted_bytes += 8; 5756 5757 prev_delete_entry = delete_entry; 5758 } 5759 5760 // If section offset map is not NULL, make an entry for the end of 5761 // section. 5762 if (this->section_offset_map_ != NULL) 5763 update_offset_map(section_size - 1, deleted_bytes, prev_delete_entry); 5764 5765 *psection_offset_map = this->section_offset_map_; 5766 this->section_offset_map_ = NULL; 5767 this->last_input_section_ = exidx_input_section; 5768 5769 // Set the first output text section so that we can link the EXIDX output 5770 // section to it. Ignore any EXIDX input section that is completely merged. 5771 if (this->first_output_text_section_ == NULL 5772 && deleted_bytes != section_size) 5773 { 5774 unsigned int link = exidx_input_section->link(); 5775 Output_section* os = relobj->output_section(link); 5776 gold_assert(os != NULL); 5777 this->first_output_text_section_ = os; 5778 } 5779 5780 return deleted_bytes; 5781 } 5782 5783 // Arm_output_section methods. 5784 5785 // Create a stub group for input sections from BEGIN to END. OWNER 5786 // points to the input section to be the owner a new stub table. 5787 5788 template<bool big_endian> 5789 void 5790 Arm_output_section<big_endian>::create_stub_group( 5791 Input_section_list::const_iterator begin, 5792 Input_section_list::const_iterator end, 5793 Input_section_list::const_iterator owner, 5794 Target_arm<big_endian>* target, 5795 std::vector<Output_relaxed_input_section*>* new_relaxed_sections, 5796 const Task* task) 5797 { 5798 // We use a different kind of relaxed section in an EXIDX section. 5799 // The static casting from Output_relaxed_input_section to 5800 // Arm_input_section is invalid in an EXIDX section. We are okay 5801 // because we should not be calling this for an EXIDX section. 5802 gold_assert(this->type() != elfcpp::SHT_ARM_EXIDX); 5803 5804 // Currently we convert ordinary input sections into relaxed sections only 5805 // at this point but we may want to support creating relaxed input section 5806 // very early. So we check here to see if owner is already a relaxed 5807 // section. 5808 5809 Arm_input_section<big_endian>* arm_input_section; 5810 if (owner->is_relaxed_input_section()) 5811 { 5812 arm_input_section = 5813 Arm_input_section<big_endian>::as_arm_input_section( 5814 owner->relaxed_input_section()); 5815 } 5816 else 5817 { 5818 gold_assert(owner->is_input_section()); 5819 // Create a new relaxed input section. We need to lock the original 5820 // file. 5821 Task_lock_obj<Object> tl(task, owner->relobj()); 5822 arm_input_section = 5823 target->new_arm_input_section(owner->relobj(), owner->shndx()); 5824 new_relaxed_sections->push_back(arm_input_section); 5825 } 5826 5827 // Create a stub table. 5828 Stub_table<big_endian>* stub_table = 5829 target->new_stub_table(arm_input_section); 5830 5831 arm_input_section->set_stub_table(stub_table); 5832 5833 Input_section_list::const_iterator p = begin; 5834 Input_section_list::const_iterator prev_p; 5835 5836 // Look for input sections or relaxed input sections in [begin ... end]. 5837 do 5838 { 5839 if (p->is_input_section() || p->is_relaxed_input_section()) 5840 { 5841 // The stub table information for input sections live 5842 // in their objects. 5843 Arm_relobj<big_endian>* arm_relobj = 5844 Arm_relobj<big_endian>::as_arm_relobj(p->relobj()); 5845 arm_relobj->set_stub_table(p->shndx(), stub_table); 5846 } 5847 prev_p = p++; 5848 } 5849 while (prev_p != end); 5850 } 5851 5852 // Group input sections for stub generation. GROUP_SIZE is roughly the limit 5853 // of stub groups. We grow a stub group by adding input section until the 5854 // size is just below GROUP_SIZE. The last input section will be converted 5855 // into a stub table. If STUB_ALWAYS_AFTER_BRANCH is false, we also add 5856 // input section after the stub table, effectively double the group size. 5857 // 5858 // This is similar to the group_sections() function in elf32-arm.c but is 5859 // implemented differently. 5860 5861 template<bool big_endian> 5862 void 5863 Arm_output_section<big_endian>::group_sections( 5864 section_size_type group_size, 5865 bool stubs_always_after_branch, 5866 Target_arm<big_endian>* target, 5867 const Task* task) 5868 { 5869 // States for grouping. 5870 typedef enum 5871 { 5872 // No group is being built. 5873 NO_GROUP, 5874 // A group is being built but the stub table is not found yet. 5875 // We keep group a stub group until the size is just under GROUP_SIZE. 5876 // The last input section in the group will be used as the stub table. 5877 FINDING_STUB_SECTION, 5878 // A group is being built and we have already found a stub table. 5879 // We enter this state to grow a stub group by adding input section 5880 // after the stub table. This effectively doubles the group size. 5881 HAS_STUB_SECTION 5882 } State; 5883 5884 // Any newly created relaxed sections are stored here. 5885 std::vector<Output_relaxed_input_section*> new_relaxed_sections; 5886 5887 State state = NO_GROUP; 5888 section_size_type off = 0; 5889 section_size_type group_begin_offset = 0; 5890 section_size_type group_end_offset = 0; 5891 section_size_type stub_table_end_offset = 0; 5892 Input_section_list::const_iterator group_begin = 5893 this->input_sections().end(); 5894 Input_section_list::const_iterator stub_table = 5895 this->input_sections().end(); 5896 Input_section_list::const_iterator group_end = this->input_sections().end(); 5897 for (Input_section_list::const_iterator p = this->input_sections().begin(); 5898 p != this->input_sections().end(); 5899 ++p) 5900 { 5901 section_size_type section_begin_offset = 5902 align_address(off, p->addralign()); 5903 section_size_type section_end_offset = 5904 section_begin_offset + p->data_size(); 5905 5906 // Check to see if we should group the previously seen sections. 5907 switch (state) 5908 { 5909 case NO_GROUP: 5910 break; 5911 5912 case FINDING_STUB_SECTION: 5913 // Adding this section makes the group larger than GROUP_SIZE. 5914 if (section_end_offset - group_begin_offset >= group_size) 5915 { 5916 if (stubs_always_after_branch) 5917 { 5918 gold_assert(group_end != this->input_sections().end()); 5919 this->create_stub_group(group_begin, group_end, group_end, 5920 target, &new_relaxed_sections, 5921 task); 5922 state = NO_GROUP; 5923 } 5924 else 5925 { 5926 // But wait, there's more! Input sections up to 5927 // stub_group_size bytes after the stub table can be 5928 // handled by it too. 5929 state = HAS_STUB_SECTION; 5930 stub_table = group_end; 5931 stub_table_end_offset = group_end_offset; 5932 } 5933 } 5934 break; 5935 5936 case HAS_STUB_SECTION: 5937 // Adding this section makes the post stub-section group larger 5938 // than GROUP_SIZE. 5939 if (section_end_offset - stub_table_end_offset >= group_size) 5940 { 5941 gold_assert(group_end != this->input_sections().end()); 5942 this->create_stub_group(group_begin, group_end, stub_table, 5943 target, &new_relaxed_sections, task); 5944 state = NO_GROUP; 5945 } 5946 break; 5947 5948 default: 5949 gold_unreachable(); 5950 } 5951 5952 // If we see an input section and currently there is no group, start 5953 // a new one. Skip any empty sections. We look at the data size 5954 // instead of calling p->relobj()->section_size() to avoid locking. 5955 if ((p->is_input_section() || p->is_relaxed_input_section()) 5956 && (p->data_size() != 0)) 5957 { 5958 if (state == NO_GROUP) 5959 { 5960 state = FINDING_STUB_SECTION; 5961 group_begin = p; 5962 group_begin_offset = section_begin_offset; 5963 } 5964 5965 // Keep track of the last input section seen. 5966 group_end = p; 5967 group_end_offset = section_end_offset; 5968 } 5969 5970 off = section_end_offset; 5971 } 5972 5973 // Create a stub group for any ungrouped sections. 5974 if (state == FINDING_STUB_SECTION || state == HAS_STUB_SECTION) 5975 { 5976 gold_assert(group_end != this->input_sections().end()); 5977 this->create_stub_group(group_begin, group_end, 5978 (state == FINDING_STUB_SECTION 5979 ? group_end 5980 : stub_table), 5981 target, &new_relaxed_sections, task); 5982 } 5983 5984 // Convert input section into relaxed input section in a batch. 5985 if (!new_relaxed_sections.empty()) 5986 this->convert_input_sections_to_relaxed_sections(new_relaxed_sections); 5987 5988 // Update the section offsets 5989 for (size_t i = 0; i < new_relaxed_sections.size(); ++i) 5990 { 5991 Arm_relobj<big_endian>* arm_relobj = 5992 Arm_relobj<big_endian>::as_arm_relobj( 5993 new_relaxed_sections[i]->relobj()); 5994 unsigned int shndx = new_relaxed_sections[i]->shndx(); 5995 // Tell Arm_relobj that this input section is converted. 5996 arm_relobj->convert_input_section_to_relaxed_section(shndx); 5997 } 5998 } 5999 6000 // Append non empty text sections in this to LIST in ascending 6001 // order of their position in this. 6002 6003 template<bool big_endian> 6004 void 6005 Arm_output_section<big_endian>::append_text_sections_to_list( 6006 Text_section_list* list) 6007 { 6008 gold_assert((this->flags() & elfcpp::SHF_ALLOC) != 0); 6009 6010 for (Input_section_list::const_iterator p = this->input_sections().begin(); 6011 p != this->input_sections().end(); 6012 ++p) 6013 { 6014 // We only care about plain or relaxed input sections. We also 6015 // ignore any merged sections. 6016 if (p->is_input_section() || p->is_relaxed_input_section()) 6017 list->push_back(Text_section_list::value_type(p->relobj(), 6018 p->shndx())); 6019 } 6020 } 6021 6022 template<bool big_endian> 6023 void 6024 Arm_output_section<big_endian>::fix_exidx_coverage( 6025 Layout* layout, 6026 const Text_section_list& sorted_text_sections, 6027 Symbol_table* symtab, 6028 bool merge_exidx_entries, 6029 const Task* task) 6030 { 6031 // We should only do this for the EXIDX output section. 6032 gold_assert(this->type() == elfcpp::SHT_ARM_EXIDX); 6033 6034 // We don't want the relaxation loop to undo these changes, so we discard 6035 // the current saved states and take another one after the fix-up. 6036 this->discard_states(); 6037 6038 // Remove all input sections. 6039 uint64_t address = this->address(); 6040 typedef std::list<Output_section::Input_section> Input_section_list; 6041 Input_section_list input_sections; 6042 this->reset_address_and_file_offset(); 6043 this->get_input_sections(address, std::string(""), &input_sections); 6044 6045 if (!this->input_sections().empty()) 6046 gold_error(_("Found non-EXIDX input sections in EXIDX output section")); 6047 6048 // Go through all the known input sections and record them. 6049 typedef Unordered_set<Section_id, Section_id_hash> Section_id_set; 6050 typedef Unordered_map<Section_id, const Output_section::Input_section*, 6051 Section_id_hash> Text_to_exidx_map; 6052 Text_to_exidx_map text_to_exidx_map; 6053 for (Input_section_list::const_iterator p = input_sections.begin(); 6054 p != input_sections.end(); 6055 ++p) 6056 { 6057 // This should never happen. At this point, we should only see 6058 // plain EXIDX input sections. 6059 gold_assert(!p->is_relaxed_input_section()); 6060 text_to_exidx_map[Section_id(p->relobj(), p->shndx())] = &(*p); 6061 } 6062 6063 Arm_exidx_fixup exidx_fixup(this, merge_exidx_entries); 6064 6065 // Go over the sorted text sections. 6066 typedef Unordered_set<Section_id, Section_id_hash> Section_id_set; 6067 Section_id_set processed_input_sections; 6068 for (Text_section_list::const_iterator p = sorted_text_sections.begin(); 6069 p != sorted_text_sections.end(); 6070 ++p) 6071 { 6072 Relobj* relobj = p->first; 6073 unsigned int shndx = p->second; 6074 6075 Arm_relobj<big_endian>* arm_relobj = 6076 Arm_relobj<big_endian>::as_arm_relobj(relobj); 6077 const Arm_exidx_input_section* exidx_input_section = 6078 arm_relobj->exidx_input_section_by_link(shndx); 6079 6080 // If this text section has no EXIDX section or if the EXIDX section 6081 // has errors, force an EXIDX_CANTUNWIND entry pointing to the end 6082 // of the last seen EXIDX section. 6083 if (exidx_input_section == NULL || exidx_input_section->has_errors()) 6084 { 6085 exidx_fixup.add_exidx_cantunwind_as_needed(); 6086 continue; 6087 } 6088 6089 Relobj* exidx_relobj = exidx_input_section->relobj(); 6090 unsigned int exidx_shndx = exidx_input_section->shndx(); 6091 Section_id sid(exidx_relobj, exidx_shndx); 6092 Text_to_exidx_map::const_iterator iter = text_to_exidx_map.find(sid); 6093 if (iter == text_to_exidx_map.end()) 6094 { 6095 // This is odd. We have not seen this EXIDX input section before. 6096 // We cannot do fix-up. If we saw a SECTIONS clause in a script, 6097 // issue a warning instead. We assume the user knows what he 6098 // or she is doing. Otherwise, this is an error. 6099 if (layout->script_options()->saw_sections_clause()) 6100 gold_warning(_("unwinding may not work because EXIDX input section" 6101 " %u of %s is not in EXIDX output section"), 6102 exidx_shndx, exidx_relobj->name().c_str()); 6103 else 6104 gold_error(_("unwinding may not work because EXIDX input section" 6105 " %u of %s is not in EXIDX output section"), 6106 exidx_shndx, exidx_relobj->name().c_str()); 6107 6108 exidx_fixup.add_exidx_cantunwind_as_needed(); 6109 continue; 6110 } 6111 6112 // We need to access the contents of the EXIDX section, lock the 6113 // object here. 6114 Task_lock_obj<Object> tl(task, exidx_relobj); 6115 section_size_type exidx_size; 6116 const unsigned char* exidx_contents = 6117 exidx_relobj->section_contents(exidx_shndx, &exidx_size, false); 6118 6119 // Fix up coverage and append input section to output data list. 6120 Arm_exidx_section_offset_map* section_offset_map = NULL; 6121 uint32_t deleted_bytes = 6122 exidx_fixup.process_exidx_section<big_endian>(exidx_input_section, 6123 exidx_contents, 6124 exidx_size, 6125 §ion_offset_map); 6126 6127 if (deleted_bytes == exidx_input_section->size()) 6128 { 6129 // The whole EXIDX section got merged. Remove it from output. 6130 gold_assert(section_offset_map == NULL); 6131 exidx_relobj->set_output_section(exidx_shndx, NULL); 6132 6133 // All local symbols defined in this input section will be dropped. 6134 // We need to adjust output local symbol count. 6135 arm_relobj->set_output_local_symbol_count_needs_update(); 6136 } 6137 else if (deleted_bytes > 0) 6138 { 6139 // Some entries are merged. We need to convert this EXIDX input 6140 // section into a relaxed section. 6141 gold_assert(section_offset_map != NULL); 6142 6143 Arm_exidx_merged_section* merged_section = 6144 new Arm_exidx_merged_section(*exidx_input_section, 6145 *section_offset_map, deleted_bytes); 6146 merged_section->build_contents(exidx_contents, exidx_size); 6147 6148 const std::string secname = exidx_relobj->section_name(exidx_shndx); 6149 this->add_relaxed_input_section(layout, merged_section, secname); 6150 arm_relobj->convert_input_section_to_relaxed_section(exidx_shndx); 6151 6152 // All local symbols defined in discarded portions of this input 6153 // section will be dropped. We need to adjust output local symbol 6154 // count. 6155 arm_relobj->set_output_local_symbol_count_needs_update(); 6156 } 6157 else 6158 { 6159 // Just add back the EXIDX input section. 6160 gold_assert(section_offset_map == NULL); 6161 const Output_section::Input_section* pis = iter->second; 6162 gold_assert(pis->is_input_section()); 6163 this->add_script_input_section(*pis); 6164 } 6165 6166 processed_input_sections.insert(Section_id(exidx_relobj, exidx_shndx)); 6167 } 6168 6169 // Insert an EXIDX_CANTUNWIND entry at the end of output if necessary. 6170 exidx_fixup.add_exidx_cantunwind_as_needed(); 6171 6172 // Remove any known EXIDX input sections that are not processed. 6173 for (Input_section_list::const_iterator p = input_sections.begin(); 6174 p != input_sections.end(); 6175 ++p) 6176 { 6177 if (processed_input_sections.find(Section_id(p->relobj(), p->shndx())) 6178 == processed_input_sections.end()) 6179 { 6180 // We discard a known EXIDX section because its linked 6181 // text section has been folded by ICF. We also discard an 6182 // EXIDX section with error, the output does not matter in this 6183 // case. We do this to avoid triggering asserts. 6184 Arm_relobj<big_endian>* arm_relobj = 6185 Arm_relobj<big_endian>::as_arm_relobj(p->relobj()); 6186 const Arm_exidx_input_section* exidx_input_section = 6187 arm_relobj->exidx_input_section_by_shndx(p->shndx()); 6188 gold_assert(exidx_input_section != NULL); 6189 if (!exidx_input_section->has_errors()) 6190 { 6191 unsigned int text_shndx = exidx_input_section->link(); 6192 gold_assert(symtab->is_section_folded(p->relobj(), text_shndx)); 6193 } 6194 6195 // Remove this from link. We also need to recount the 6196 // local symbols. 6197 p->relobj()->set_output_section(p->shndx(), NULL); 6198 arm_relobj->set_output_local_symbol_count_needs_update(); 6199 } 6200 } 6201 6202 // Link exidx output section to the first seen output section and 6203 // set correct entry size. 6204 this->set_link_section(exidx_fixup.first_output_text_section()); 6205 this->set_entsize(8); 6206 6207 // Make changes permanent. 6208 this->save_states(); 6209 this->set_section_offsets_need_adjustment(); 6210 } 6211 6212 // Link EXIDX output sections to text output sections. 6213 6214 template<bool big_endian> 6215 void 6216 Arm_output_section<big_endian>::set_exidx_section_link() 6217 { 6218 gold_assert(this->type() == elfcpp::SHT_ARM_EXIDX); 6219 if (!this->input_sections().empty()) 6220 { 6221 Input_section_list::const_iterator p = this->input_sections().begin(); 6222 Arm_relobj<big_endian>* arm_relobj = 6223 Arm_relobj<big_endian>::as_arm_relobj(p->relobj()); 6224 unsigned exidx_shndx = p->shndx(); 6225 const Arm_exidx_input_section* exidx_input_section = 6226 arm_relobj->exidx_input_section_by_shndx(exidx_shndx); 6227 gold_assert(exidx_input_section != NULL); 6228 unsigned int text_shndx = exidx_input_section->link(); 6229 Output_section* os = arm_relobj->output_section(text_shndx); 6230 this->set_link_section(os); 6231 } 6232 } 6233 6234 // Arm_relobj methods. 6235 6236 // Determine if an input section is scannable for stub processing. SHDR is 6237 // the header of the section and SHNDX is the section index. OS is the output 6238 // section for the input section and SYMTAB is the global symbol table used to 6239 // look up ICF information. 6240 6241 template<bool big_endian> 6242 bool 6243 Arm_relobj<big_endian>::section_is_scannable( 6244 const elfcpp::Shdr<32, big_endian>& shdr, 6245 unsigned int shndx, 6246 const Output_section* os, 6247 const Symbol_table* symtab) 6248 { 6249 // Skip any empty sections, unallocated sections or sections whose 6250 // type are not SHT_PROGBITS. 6251 if (shdr.get_sh_size() == 0 6252 || (shdr.get_sh_flags() & elfcpp::SHF_ALLOC) == 0 6253 || shdr.get_sh_type() != elfcpp::SHT_PROGBITS) 6254 return false; 6255 6256 // Skip any discarded or ICF'ed sections. 6257 if (os == NULL || symtab->is_section_folded(this, shndx)) 6258 return false; 6259 6260 // If this requires special offset handling, check to see if it is 6261 // a relaxed section. If this is not, then it is a merged section that 6262 // we cannot handle. 6263 if (this->is_output_section_offset_invalid(shndx)) 6264 { 6265 const Output_relaxed_input_section* poris = 6266 os->find_relaxed_input_section(this, shndx); 6267 if (poris == NULL) 6268 return false; 6269 } 6270 6271 return true; 6272 } 6273 6274 // Determine if we want to scan the SHNDX-th section for relocation stubs. 6275 // This is a helper for Arm_relobj::scan_sections_for_stubs() below. 6276 6277 template<bool big_endian> 6278 bool 6279 Arm_relobj<big_endian>::section_needs_reloc_stub_scanning( 6280 const elfcpp::Shdr<32, big_endian>& shdr, 6281 const Relobj::Output_sections& out_sections, 6282 const Symbol_table* symtab, 6283 const unsigned char* pshdrs) 6284 { 6285 unsigned int sh_type = shdr.get_sh_type(); 6286 if (sh_type != elfcpp::SHT_REL && sh_type != elfcpp::SHT_RELA) 6287 return false; 6288 6289 // Ignore empty section. 6290 off_t sh_size = shdr.get_sh_size(); 6291 if (sh_size == 0) 6292 return false; 6293 6294 // Ignore reloc section with unexpected symbol table. The 6295 // error will be reported in the final link. 6296 if (this->adjust_shndx(shdr.get_sh_link()) != this->symtab_shndx()) 6297 return false; 6298 6299 unsigned int reloc_size; 6300 if (sh_type == elfcpp::SHT_REL) 6301 reloc_size = elfcpp::Elf_sizes<32>::rel_size; 6302 else 6303 reloc_size = elfcpp::Elf_sizes<32>::rela_size; 6304 6305 // Ignore reloc section with unexpected entsize or uneven size. 6306 // The error will be reported in the final link. 6307 if (reloc_size != shdr.get_sh_entsize() || sh_size % reloc_size != 0) 6308 return false; 6309 6310 // Ignore reloc section with bad info. This error will be 6311 // reported in the final link. 6312 unsigned int index = this->adjust_shndx(shdr.get_sh_info()); 6313 if (index >= this->shnum()) 6314 return false; 6315 6316 const unsigned int shdr_size = elfcpp::Elf_sizes<32>::shdr_size; 6317 const elfcpp::Shdr<32, big_endian> text_shdr(pshdrs + index * shdr_size); 6318 return this->section_is_scannable(text_shdr, index, 6319 out_sections[index], symtab); 6320 } 6321 6322 // Return the output address of either a plain input section or a relaxed 6323 // input section. SHNDX is the section index. We define and use this 6324 // instead of calling Output_section::output_address because that is slow 6325 // for large output. 6326 6327 template<bool big_endian> 6328 Arm_address 6329 Arm_relobj<big_endian>::simple_input_section_output_address( 6330 unsigned int shndx, 6331 Output_section* os) 6332 { 6333 if (this->is_output_section_offset_invalid(shndx)) 6334 { 6335 const Output_relaxed_input_section* poris = 6336 os->find_relaxed_input_section(this, shndx); 6337 // We do not handle merged sections here. 6338 gold_assert(poris != NULL); 6339 return poris->address(); 6340 } 6341 else 6342 return os->address() + this->get_output_section_offset(shndx); 6343 } 6344 6345 // Determine if we want to scan the SHNDX-th section for non-relocation stubs. 6346 // This is a helper for Arm_relobj::scan_sections_for_stubs() below. 6347 6348 template<bool big_endian> 6349 bool 6350 Arm_relobj<big_endian>::section_needs_cortex_a8_stub_scanning( 6351 const elfcpp::Shdr<32, big_endian>& shdr, 6352 unsigned int shndx, 6353 Output_section* os, 6354 const Symbol_table* symtab) 6355 { 6356 if (!this->section_is_scannable(shdr, shndx, os, symtab)) 6357 return false; 6358 6359 // If the section does not cross any 4K-boundaries, it does not need to 6360 // be scanned. 6361 Arm_address address = this->simple_input_section_output_address(shndx, os); 6362 if ((address & ~0xfffU) == ((address + shdr.get_sh_size() - 1) & ~0xfffU)) 6363 return false; 6364 6365 return true; 6366 } 6367 6368 // Scan a section for Cortex-A8 workaround. 6369 6370 template<bool big_endian> 6371 void 6372 Arm_relobj<big_endian>::scan_section_for_cortex_a8_erratum( 6373 const elfcpp::Shdr<32, big_endian>& shdr, 6374 unsigned int shndx, 6375 Output_section* os, 6376 Target_arm<big_endian>* arm_target) 6377 { 6378 // Look for the first mapping symbol in this section. It should be 6379 // at (shndx, 0). 6380 Mapping_symbol_position section_start(shndx, 0); 6381 typename Mapping_symbols_info::const_iterator p = 6382 this->mapping_symbols_info_.lower_bound(section_start); 6383 6384 // There are no mapping symbols for this section. Treat it as a data-only 6385 // section. 6386 if (p == this->mapping_symbols_info_.end() || p->first.first != shndx) 6387 return; 6388 6389 Arm_address output_address = 6390 this->simple_input_section_output_address(shndx, os); 6391 6392 // Get the section contents. 6393 section_size_type input_view_size = 0; 6394 const unsigned char* input_view = 6395 this->section_contents(shndx, &input_view_size, false); 6396 6397 // We need to go through the mapping symbols to determine what to 6398 // scan. There are two reasons. First, we should look at THUMB code and 6399 // THUMB code only. Second, we only want to look at the 4K-page boundary 6400 // to speed up the scanning. 6401 6402 while (p != this->mapping_symbols_info_.end() 6403 && p->first.first == shndx) 6404 { 6405 typename Mapping_symbols_info::const_iterator next = 6406 this->mapping_symbols_info_.upper_bound(p->first); 6407 6408 // Only scan part of a section with THUMB code. 6409 if (p->second == 't') 6410 { 6411 // Determine the end of this range. 6412 section_size_type span_start = 6413 convert_to_section_size_type(p->first.second); 6414 section_size_type span_end; 6415 if (next != this->mapping_symbols_info_.end() 6416 && next->first.first == shndx) 6417 span_end = convert_to_section_size_type(next->first.second); 6418 else 6419 span_end = convert_to_section_size_type(shdr.get_sh_size()); 6420 6421 if (((span_start + output_address) & ~0xfffUL) 6422 != ((span_end + output_address - 1) & ~0xfffUL)) 6423 { 6424 arm_target->scan_span_for_cortex_a8_erratum(this, shndx, 6425 span_start, span_end, 6426 input_view, 6427 output_address); 6428 } 6429 } 6430 6431 p = next; 6432 } 6433 } 6434 6435 // Scan relocations for stub generation. 6436 6437 template<bool big_endian> 6438 void 6439 Arm_relobj<big_endian>::scan_sections_for_stubs( 6440 Target_arm<big_endian>* arm_target, 6441 const Symbol_table* symtab, 6442 const Layout* layout) 6443 { 6444 unsigned int shnum = this->shnum(); 6445 const unsigned int shdr_size = elfcpp::Elf_sizes<32>::shdr_size; 6446 6447 // Read the section headers. 6448 const unsigned char* pshdrs = this->get_view(this->elf_file()->shoff(), 6449 shnum * shdr_size, 6450 true, true); 6451 6452 // To speed up processing, we set up hash tables for fast lookup of 6453 // input offsets to output addresses. 6454 this->initialize_input_to_output_maps(); 6455 6456 const Relobj::Output_sections& out_sections(this->output_sections()); 6457 6458 Relocate_info<32, big_endian> relinfo; 6459 relinfo.symtab = symtab; 6460 relinfo.layout = layout; 6461 relinfo.object = this; 6462 6463 // Do relocation stubs scanning. 6464 const unsigned char* p = pshdrs + shdr_size; 6465 for (unsigned int i = 1; i < shnum; ++i, p += shdr_size) 6466 { 6467 const elfcpp::Shdr<32, big_endian> shdr(p); 6468 if (this->section_needs_reloc_stub_scanning(shdr, out_sections, symtab, 6469 pshdrs)) 6470 { 6471 unsigned int index = this->adjust_shndx(shdr.get_sh_info()); 6472 Arm_address output_offset = this->get_output_section_offset(index); 6473 Arm_address output_address; 6474 if (output_offset != invalid_address) 6475 output_address = out_sections[index]->address() + output_offset; 6476 else 6477 { 6478 // Currently this only happens for a relaxed section. 6479 const Output_relaxed_input_section* poris = 6480 out_sections[index]->find_relaxed_input_section(this, index); 6481 gold_assert(poris != NULL); 6482 output_address = poris->address(); 6483 } 6484 6485 // Get the relocations. 6486 const unsigned char* prelocs = this->get_view(shdr.get_sh_offset(), 6487 shdr.get_sh_size(), 6488 true, false); 6489 6490 // Get the section contents. This does work for the case in which 6491 // we modify the contents of an input section. We need to pass the 6492 // output view under such circumstances. 6493 section_size_type input_view_size = 0; 6494 const unsigned char* input_view = 6495 this->section_contents(index, &input_view_size, false); 6496 6497 relinfo.reloc_shndx = i; 6498 relinfo.data_shndx = index; 6499 unsigned int sh_type = shdr.get_sh_type(); 6500 unsigned int reloc_size; 6501 if (sh_type == elfcpp::SHT_REL) 6502 reloc_size = elfcpp::Elf_sizes<32>::rel_size; 6503 else 6504 reloc_size = elfcpp::Elf_sizes<32>::rela_size; 6505 6506 Output_section* os = out_sections[index]; 6507 arm_target->scan_section_for_stubs(&relinfo, sh_type, prelocs, 6508 shdr.get_sh_size() / reloc_size, 6509 os, 6510 output_offset == invalid_address, 6511 input_view, output_address, 6512 input_view_size); 6513 } 6514 } 6515 6516 // Do Cortex-A8 erratum stubs scanning. This has to be done for a section 6517 // after its relocation section, if there is one, is processed for 6518 // relocation stubs. Merging this loop with the one above would have been 6519 // complicated since we would have had to make sure that relocation stub 6520 // scanning is done first. 6521 if (arm_target->fix_cortex_a8()) 6522 { 6523 const unsigned char* p = pshdrs + shdr_size; 6524 for (unsigned int i = 1; i < shnum; ++i, p += shdr_size) 6525 { 6526 const elfcpp::Shdr<32, big_endian> shdr(p); 6527 if (this->section_needs_cortex_a8_stub_scanning(shdr, i, 6528 out_sections[i], 6529 symtab)) 6530 this->scan_section_for_cortex_a8_erratum(shdr, i, out_sections[i], 6531 arm_target); 6532 } 6533 } 6534 6535 // After we've done the relocations, we release the hash tables, 6536 // since we no longer need them. 6537 this->free_input_to_output_maps(); 6538 } 6539 6540 // Count the local symbols. The ARM backend needs to know if a symbol 6541 // is a THUMB function or not. For global symbols, it is easy because 6542 // the Symbol object keeps the ELF symbol type. For local symbol it is 6543 // harder because we cannot access this information. So we override the 6544 // do_count_local_symbol in parent and scan local symbols to mark 6545 // THUMB functions. This is not the most efficient way but I do not want to 6546 // slow down other ports by calling a per symbol target hook inside 6547 // Sized_relobj_file<size, big_endian>::do_count_local_symbols. 6548 6549 template<bool big_endian> 6550 void 6551 Arm_relobj<big_endian>::do_count_local_symbols( 6552 Stringpool_template<char>* pool, 6553 Stringpool_template<char>* dynpool) 6554 { 6555 // We need to fix-up the values of any local symbols whose type are 6556 // STT_ARM_TFUNC. 6557 6558 // Ask parent to count the local symbols. 6559 Sized_relobj_file<32, big_endian>::do_count_local_symbols(pool, dynpool); 6560 const unsigned int loccount = this->local_symbol_count(); 6561 if (loccount == 0) 6562 return; 6563 6564 // Initialize the thumb function bit-vector. 6565 std::vector<bool> empty_vector(loccount, false); 6566 this->local_symbol_is_thumb_function_.swap(empty_vector); 6567 6568 // Read the symbol table section header. 6569 const unsigned int symtab_shndx = this->symtab_shndx(); 6570 elfcpp::Shdr<32, big_endian> 6571 symtabshdr(this, this->elf_file()->section_header(symtab_shndx)); 6572 gold_assert(symtabshdr.get_sh_type() == elfcpp::SHT_SYMTAB); 6573 6574 // Read the local symbols. 6575 const int sym_size =elfcpp::Elf_sizes<32>::sym_size; 6576 gold_assert(loccount == symtabshdr.get_sh_info()); 6577 off_t locsize = loccount * sym_size; 6578 const unsigned char* psyms = this->get_view(symtabshdr.get_sh_offset(), 6579 locsize, true, true); 6580 6581 // For mapping symbol processing, we need to read the symbol names. 6582 unsigned int strtab_shndx = this->adjust_shndx(symtabshdr.get_sh_link()); 6583 if (strtab_shndx >= this->shnum()) 6584 { 6585 this->error(_("invalid symbol table name index: %u"), strtab_shndx); 6586 return; 6587 } 6588 6589 elfcpp::Shdr<32, big_endian> 6590 strtabshdr(this, this->elf_file()->section_header(strtab_shndx)); 6591 if (strtabshdr.get_sh_type() != elfcpp::SHT_STRTAB) 6592 { 6593 this->error(_("symbol table name section has wrong type: %u"), 6594 static_cast<unsigned int>(strtabshdr.get_sh_type())); 6595 return; 6596 } 6597 const char* pnames = 6598 reinterpret_cast<const char*>(this->get_view(strtabshdr.get_sh_offset(), 6599 strtabshdr.get_sh_size(), 6600 false, false)); 6601 6602 // Loop over the local symbols and mark any local symbols pointing 6603 // to THUMB functions. 6604 6605 // Skip the first dummy symbol. 6606 psyms += sym_size; 6607 typename Sized_relobj_file<32, big_endian>::Local_values* plocal_values = 6608 this->local_values(); 6609 for (unsigned int i = 1; i < loccount; ++i, psyms += sym_size) 6610 { 6611 elfcpp::Sym<32, big_endian> sym(psyms); 6612 elfcpp::STT st_type = sym.get_st_type(); 6613 Symbol_value<32>& lv((*plocal_values)[i]); 6614 Arm_address input_value = lv.input_value(); 6615 6616 // Check to see if this is a mapping symbol. 6617 const char* sym_name = pnames + sym.get_st_name(); 6618 if (Target_arm<big_endian>::is_mapping_symbol_name(sym_name)) 6619 { 6620 bool is_ordinary; 6621 unsigned int input_shndx = 6622 this->adjust_sym_shndx(i, sym.get_st_shndx(), &is_ordinary); 6623 gold_assert(is_ordinary); 6624 6625 // Strip of LSB in case this is a THUMB symbol. 6626 Mapping_symbol_position msp(input_shndx, input_value & ~1U); 6627 this->mapping_symbols_info_[msp] = sym_name[1]; 6628 } 6629 6630 if (st_type == elfcpp::STT_ARM_TFUNC 6631 || (st_type == elfcpp::STT_FUNC && ((input_value & 1) != 0))) 6632 { 6633 // This is a THUMB function. Mark this and canonicalize the 6634 // symbol value by setting LSB. 6635 this->local_symbol_is_thumb_function_[i] = true; 6636 if ((input_value & 1) == 0) 6637 lv.set_input_value(input_value | 1); 6638 } 6639 } 6640 } 6641 6642 // Relocate sections. 6643 template<bool big_endian> 6644 void 6645 Arm_relobj<big_endian>::do_relocate_sections( 6646 const Symbol_table* symtab, 6647 const Layout* layout, 6648 const unsigned char* pshdrs, 6649 Output_file* of, 6650 typename Sized_relobj_file<32, big_endian>::Views* pviews) 6651 { 6652 // Relocate the section data. 6653 this->relocate_section_range(symtab, layout, pshdrs, of, pviews, 6654 1, this->shnum() - 1); 6655 6656 // We do not generate stubs if doing a relocatable link. 6657 if (parameters->options().relocatable()) 6658 return; 6659 6660 // Relocate stub tables. 6661 unsigned int shnum = this->shnum(); 6662 6663 Target_arm<big_endian>* arm_target = 6664 Target_arm<big_endian>::default_target(); 6665 6666 Relocate_info<32, big_endian> relinfo; 6667 relinfo.symtab = symtab; 6668 relinfo.layout = layout; 6669 relinfo.object = this; 6670 6671 for (unsigned int i = 1; i < shnum; ++i) 6672 { 6673 Arm_input_section<big_endian>* arm_input_section = 6674 arm_target->find_arm_input_section(this, i); 6675 6676 if (arm_input_section != NULL 6677 && arm_input_section->is_stub_table_owner() 6678 && !arm_input_section->stub_table()->empty()) 6679 { 6680 // We cannot discard a section if it owns a stub table. 6681 Output_section* os = this->output_section(i); 6682 gold_assert(os != NULL); 6683 6684 relinfo.reloc_shndx = elfcpp::SHN_UNDEF; 6685 relinfo.reloc_shdr = NULL; 6686 relinfo.data_shndx = i; 6687 relinfo.data_shdr = pshdrs + i * elfcpp::Elf_sizes<32>::shdr_size; 6688 6689 gold_assert((*pviews)[i].view != NULL); 6690 6691 // We are passed the output section view. Adjust it to cover the 6692 // stub table only. 6693 Stub_table<big_endian>* stub_table = arm_input_section->stub_table(); 6694 gold_assert((stub_table->address() >= (*pviews)[i].address) 6695 && ((stub_table->address() + stub_table->data_size()) 6696 <= (*pviews)[i].address + (*pviews)[i].view_size)); 6697 6698 off_t offset = stub_table->address() - (*pviews)[i].address; 6699 unsigned char* view = (*pviews)[i].view + offset; 6700 Arm_address address = stub_table->address(); 6701 section_size_type view_size = stub_table->data_size(); 6702 6703 stub_table->relocate_stubs(&relinfo, arm_target, os, view, address, 6704 view_size); 6705 } 6706 6707 // Apply Cortex A8 workaround if applicable. 6708 if (this->section_has_cortex_a8_workaround(i)) 6709 { 6710 unsigned char* view = (*pviews)[i].view; 6711 Arm_address view_address = (*pviews)[i].address; 6712 section_size_type view_size = (*pviews)[i].view_size; 6713 Stub_table<big_endian>* stub_table = this->stub_tables_[i]; 6714 6715 // Adjust view to cover section. 6716 Output_section* os = this->output_section(i); 6717 gold_assert(os != NULL); 6718 Arm_address section_address = 6719 this->simple_input_section_output_address(i, os); 6720 uint64_t section_size = this->section_size(i); 6721 6722 gold_assert(section_address >= view_address 6723 && ((section_address + section_size) 6724 <= (view_address + view_size))); 6725 6726 unsigned char* section_view = view + (section_address - view_address); 6727 6728 // Apply the Cortex-A8 workaround to the output address range 6729 // corresponding to this input section. 6730 stub_table->apply_cortex_a8_workaround_to_address_range( 6731 arm_target, 6732 section_view, 6733 section_address, 6734 section_size); 6735 } 6736 } 6737 } 6738 6739 // Find the linked text section of an EXIDX section by looking at the first 6740 // relocation. 4.4.1 of the EHABI specifications says that an EXIDX section 6741 // must be linked to its associated code section via the sh_link field of 6742 // its section header. However, some tools are broken and the link is not 6743 // always set. LD just drops such an EXIDX section silently, causing the 6744 // associated code not unwindabled. Here we try a little bit harder to 6745 // discover the linked code section. 6746 // 6747 // PSHDR points to the section header of a relocation section of an EXIDX 6748 // section. If we can find a linked text section, return true and 6749 // store the text section index in the location PSHNDX. Otherwise 6750 // return false. 6751 6752 template<bool big_endian> 6753 bool 6754 Arm_relobj<big_endian>::find_linked_text_section( 6755 const unsigned char* pshdr, 6756 const unsigned char* psyms, 6757 unsigned int* pshndx) 6758 { 6759 elfcpp::Shdr<32, big_endian> shdr(pshdr); 6760 6761 // If there is no relocation, we cannot find the linked text section. 6762 size_t reloc_size; 6763 if (shdr.get_sh_type() == elfcpp::SHT_REL) 6764 reloc_size = elfcpp::Elf_sizes<32>::rel_size; 6765 else 6766 reloc_size = elfcpp::Elf_sizes<32>::rela_size; 6767 size_t reloc_count = shdr.get_sh_size() / reloc_size; 6768 6769 // Get the relocations. 6770 const unsigned char* prelocs = 6771 this->get_view(shdr.get_sh_offset(), shdr.get_sh_size(), true, false); 6772 6773 // Find the REL31 relocation for the first word of the first EXIDX entry. 6774 for (size_t i = 0; i < reloc_count; ++i, prelocs += reloc_size) 6775 { 6776 Arm_address r_offset; 6777 typename elfcpp::Elf_types<32>::Elf_WXword r_info; 6778 if (shdr.get_sh_type() == elfcpp::SHT_REL) 6779 { 6780 typename elfcpp::Rel<32, big_endian> reloc(prelocs); 6781 r_info = reloc.get_r_info(); 6782 r_offset = reloc.get_r_offset(); 6783 } 6784 else 6785 { 6786 typename elfcpp::Rela<32, big_endian> reloc(prelocs); 6787 r_info = reloc.get_r_info(); 6788 r_offset = reloc.get_r_offset(); 6789 } 6790 6791 unsigned int r_type = elfcpp::elf_r_type<32>(r_info); 6792 if (r_type != elfcpp::R_ARM_PREL31 && r_type != elfcpp::R_ARM_SBREL31) 6793 continue; 6794 6795 unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info); 6796 if (r_sym == 0 6797 || r_sym >= this->local_symbol_count() 6798 || r_offset != 0) 6799 continue; 6800 6801 // This is the relocation for the first word of the first EXIDX entry. 6802 // We expect to see a local section symbol. 6803 const int sym_size = elfcpp::Elf_sizes<32>::sym_size; 6804 elfcpp::Sym<32, big_endian> sym(psyms + r_sym * sym_size); 6805 if (sym.get_st_type() == elfcpp::STT_SECTION) 6806 { 6807 bool is_ordinary; 6808 *pshndx = 6809 this->adjust_sym_shndx(r_sym, sym.get_st_shndx(), &is_ordinary); 6810 gold_assert(is_ordinary); 6811 return true; 6812 } 6813 else 6814 return false; 6815 } 6816 6817 return false; 6818 } 6819 6820 // Make an EXIDX input section object for an EXIDX section whose index is 6821 // SHNDX. SHDR is the section header of the EXIDX section and TEXT_SHNDX 6822 // is the section index of the linked text section. 6823 6824 template<bool big_endian> 6825 void 6826 Arm_relobj<big_endian>::make_exidx_input_section( 6827 unsigned int shndx, 6828 const elfcpp::Shdr<32, big_endian>& shdr, 6829 unsigned int text_shndx, 6830 const elfcpp::Shdr<32, big_endian>& text_shdr) 6831 { 6832 // Create an Arm_exidx_input_section object for this EXIDX section. 6833 Arm_exidx_input_section* exidx_input_section = 6834 new Arm_exidx_input_section(this, shndx, text_shndx, shdr.get_sh_size(), 6835 shdr.get_sh_addralign(), 6836 text_shdr.get_sh_size()); 6837 6838 gold_assert(this->exidx_section_map_[shndx] == NULL); 6839 this->exidx_section_map_[shndx] = exidx_input_section; 6840 6841 if (text_shndx == elfcpp::SHN_UNDEF || text_shndx >= this->shnum()) 6842 { 6843 gold_error(_("EXIDX section %s(%u) links to invalid section %u in %s"), 6844 this->section_name(shndx).c_str(), shndx, text_shndx, 6845 this->name().c_str()); 6846 exidx_input_section->set_has_errors(); 6847 } 6848 else if (this->exidx_section_map_[text_shndx] != NULL) 6849 { 6850 unsigned other_exidx_shndx = 6851 this->exidx_section_map_[text_shndx]->shndx(); 6852 gold_error(_("EXIDX sections %s(%u) and %s(%u) both link to text section" 6853 "%s(%u) in %s"), 6854 this->section_name(shndx).c_str(), shndx, 6855 this->section_name(other_exidx_shndx).c_str(), 6856 other_exidx_shndx, this->section_name(text_shndx).c_str(), 6857 text_shndx, this->name().c_str()); 6858 exidx_input_section->set_has_errors(); 6859 } 6860 else 6861 this->exidx_section_map_[text_shndx] = exidx_input_section; 6862 6863 // Check section flags of text section. 6864 if ((text_shdr.get_sh_flags() & elfcpp::SHF_ALLOC) == 0) 6865 { 6866 gold_error(_("EXIDX section %s(%u) links to non-allocated section %s(%u) " 6867 " in %s"), 6868 this->section_name(shndx).c_str(), shndx, 6869 this->section_name(text_shndx).c_str(), text_shndx, 6870 this->name().c_str()); 6871 exidx_input_section->set_has_errors(); 6872 } 6873 else if ((text_shdr.get_sh_flags() & elfcpp::SHF_EXECINSTR) == 0) 6874 // I would like to make this an error but currently ld just ignores 6875 // this. 6876 gold_warning(_("EXIDX section %s(%u) links to non-executable section " 6877 "%s(%u) in %s"), 6878 this->section_name(shndx).c_str(), shndx, 6879 this->section_name(text_shndx).c_str(), text_shndx, 6880 this->name().c_str()); 6881 } 6882 6883 // Read the symbol information. 6884 6885 template<bool big_endian> 6886 void 6887 Arm_relobj<big_endian>::do_read_symbols(Read_symbols_data* sd) 6888 { 6889 // Call parent class to read symbol information. 6890 this->base_read_symbols(sd); 6891 6892 // If this input file is a binary file, it has no processor 6893 // specific flags and attributes section. 6894 Input_file::Format format = this->input_file()->format(); 6895 if (format != Input_file::FORMAT_ELF) 6896 { 6897 gold_assert(format == Input_file::FORMAT_BINARY); 6898 this->merge_flags_and_attributes_ = false; 6899 return; 6900 } 6901 6902 // Read processor-specific flags in ELF file header. 6903 const unsigned char* pehdr = this->get_view(elfcpp::file_header_offset, 6904 elfcpp::Elf_sizes<32>::ehdr_size, 6905 true, false); 6906 elfcpp::Ehdr<32, big_endian> ehdr(pehdr); 6907 this->processor_specific_flags_ = ehdr.get_e_flags(); 6908 6909 // Go over the section headers and look for .ARM.attributes and .ARM.exidx 6910 // sections. 6911 std::vector<unsigned int> deferred_exidx_sections; 6912 const size_t shdr_size = elfcpp::Elf_sizes<32>::shdr_size; 6913 const unsigned char* pshdrs = sd->section_headers->data(); 6914 const unsigned char* ps = pshdrs + shdr_size; 6915 bool must_merge_flags_and_attributes = false; 6916 for (unsigned int i = 1; i < this->shnum(); ++i, ps += shdr_size) 6917 { 6918 elfcpp::Shdr<32, big_endian> shdr(ps); 6919 6920 // Sometimes an object has no contents except the section name string 6921 // table and an empty symbol table with the undefined symbol. We 6922 // don't want to merge processor-specific flags from such an object. 6923 if (shdr.get_sh_type() == elfcpp::SHT_SYMTAB) 6924 { 6925 // Symbol table is not empty. 6926 const elfcpp::Elf_types<32>::Elf_WXword sym_size = 6927 elfcpp::Elf_sizes<32>::sym_size; 6928 if (shdr.get_sh_size() > sym_size) 6929 must_merge_flags_and_attributes = true; 6930 } 6931 else if (shdr.get_sh_type() != elfcpp::SHT_STRTAB) 6932 // If this is neither an empty symbol table nor a string table, 6933 // be conservative. 6934 must_merge_flags_and_attributes = true; 6935 6936 if (shdr.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES) 6937 { 6938 gold_assert(this->attributes_section_data_ == NULL); 6939 section_offset_type section_offset = shdr.get_sh_offset(); 6940 section_size_type section_size = 6941 convert_to_section_size_type(shdr.get_sh_size()); 6942 const unsigned char* view = 6943 this->get_view(section_offset, section_size, true, false); 6944 this->attributes_section_data_ = 6945 new Attributes_section_data(view, section_size); 6946 } 6947 else if (shdr.get_sh_type() == elfcpp::SHT_ARM_EXIDX) 6948 { 6949 unsigned int text_shndx = this->adjust_shndx(shdr.get_sh_link()); 6950 if (text_shndx == elfcpp::SHN_UNDEF) 6951 deferred_exidx_sections.push_back(i); 6952 else 6953 { 6954 elfcpp::Shdr<32, big_endian> text_shdr(pshdrs 6955 + text_shndx * shdr_size); 6956 this->make_exidx_input_section(i, shdr, text_shndx, text_shdr); 6957 } 6958 // EHABI 4.4.1 requires that SHF_LINK_ORDER flag to be set. 6959 if ((shdr.get_sh_flags() & elfcpp::SHF_LINK_ORDER) == 0) 6960 gold_warning(_("SHF_LINK_ORDER not set in EXIDX section %s of %s"), 6961 this->section_name(i).c_str(), this->name().c_str()); 6962 } 6963 } 6964 6965 // This is rare. 6966 if (!must_merge_flags_and_attributes) 6967 { 6968 gold_assert(deferred_exidx_sections.empty()); 6969 this->merge_flags_and_attributes_ = false; 6970 return; 6971 } 6972 6973 // Some tools are broken and they do not set the link of EXIDX sections. 6974 // We look at the first relocation to figure out the linked sections. 6975 if (!deferred_exidx_sections.empty()) 6976 { 6977 // We need to go over the section headers again to find the mapping 6978 // from sections being relocated to their relocation sections. This is 6979 // a bit inefficient as we could do that in the loop above. However, 6980 // we do not expect any deferred EXIDX sections normally. So we do not 6981 // want to slow down the most common path. 6982 typedef Unordered_map<unsigned int, unsigned int> Reloc_map; 6983 Reloc_map reloc_map; 6984 ps = pshdrs + shdr_size; 6985 for (unsigned int i = 1; i < this->shnum(); ++i, ps += shdr_size) 6986 { 6987 elfcpp::Shdr<32, big_endian> shdr(ps); 6988 elfcpp::Elf_Word sh_type = shdr.get_sh_type(); 6989 if (sh_type == elfcpp::SHT_REL || sh_type == elfcpp::SHT_RELA) 6990 { 6991 unsigned int info_shndx = this->adjust_shndx(shdr.get_sh_info()); 6992 if (info_shndx >= this->shnum()) 6993 gold_error(_("relocation section %u has invalid info %u"), 6994 i, info_shndx); 6995 Reloc_map::value_type value(info_shndx, i); 6996 std::pair<Reloc_map::iterator, bool> result = 6997 reloc_map.insert(value); 6998 if (!result.second) 6999 gold_error(_("section %u has multiple relocation sections " 7000 "%u and %u"), 7001 info_shndx, i, reloc_map[info_shndx]); 7002 } 7003 } 7004 7005 // Read the symbol table section header. 7006 const unsigned int symtab_shndx = this->symtab_shndx(); 7007 elfcpp::Shdr<32, big_endian> 7008 symtabshdr(this, this->elf_file()->section_header(symtab_shndx)); 7009 gold_assert(symtabshdr.get_sh_type() == elfcpp::SHT_SYMTAB); 7010 7011 // Read the local symbols. 7012 const int sym_size =elfcpp::Elf_sizes<32>::sym_size; 7013 const unsigned int loccount = this->local_symbol_count(); 7014 gold_assert(loccount == symtabshdr.get_sh_info()); 7015 off_t locsize = loccount * sym_size; 7016 const unsigned char* psyms = this->get_view(symtabshdr.get_sh_offset(), 7017 locsize, true, true); 7018 7019 // Process the deferred EXIDX sections. 7020 for (unsigned int i = 0; i < deferred_exidx_sections.size(); ++i) 7021 { 7022 unsigned int shndx = deferred_exidx_sections[i]; 7023 elfcpp::Shdr<32, big_endian> shdr(pshdrs + shndx * shdr_size); 7024 unsigned int text_shndx = elfcpp::SHN_UNDEF; 7025 Reloc_map::const_iterator it = reloc_map.find(shndx); 7026 if (it != reloc_map.end()) 7027 find_linked_text_section(pshdrs + it->second * shdr_size, 7028 psyms, &text_shndx); 7029 elfcpp::Shdr<32, big_endian> text_shdr(pshdrs 7030 + text_shndx * shdr_size); 7031 this->make_exidx_input_section(shndx, shdr, text_shndx, text_shdr); 7032 } 7033 } 7034 } 7035 7036 // Process relocations for garbage collection. The ARM target uses .ARM.exidx 7037 // sections for unwinding. These sections are referenced implicitly by 7038 // text sections linked in the section headers. If we ignore these implicit 7039 // references, the .ARM.exidx sections and any .ARM.extab sections they use 7040 // will be garbage-collected incorrectly. Hence we override the same function 7041 // in the base class to handle these implicit references. 7042 7043 template<bool big_endian> 7044 void 7045 Arm_relobj<big_endian>::do_gc_process_relocs(Symbol_table* symtab, 7046 Layout* layout, 7047 Read_relocs_data* rd) 7048 { 7049 // First, call base class method to process relocations in this object. 7050 Sized_relobj_file<32, big_endian>::do_gc_process_relocs(symtab, layout, rd); 7051 7052 // If --gc-sections is not specified, there is nothing more to do. 7053 // This happens when --icf is used but --gc-sections is not. 7054 if (!parameters->options().gc_sections()) 7055 return; 7056 7057 unsigned int shnum = this->shnum(); 7058 const unsigned int shdr_size = elfcpp::Elf_sizes<32>::shdr_size; 7059 const unsigned char* pshdrs = this->get_view(this->elf_file()->shoff(), 7060 shnum * shdr_size, 7061 true, true); 7062 7063 // Scan section headers for sections of type SHT_ARM_EXIDX. Add references 7064 // to these from the linked text sections. 7065 const unsigned char* ps = pshdrs + shdr_size; 7066 for (unsigned int i = 1; i < shnum; ++i, ps += shdr_size) 7067 { 7068 elfcpp::Shdr<32, big_endian> shdr(ps); 7069 if (shdr.get_sh_type() == elfcpp::SHT_ARM_EXIDX) 7070 { 7071 // Found an .ARM.exidx section, add it to the set of reachable 7072 // sections from its linked text section. 7073 unsigned int text_shndx = this->adjust_shndx(shdr.get_sh_link()); 7074 symtab->gc()->add_reference(this, text_shndx, this, i); 7075 } 7076 } 7077 } 7078 7079 // Update output local symbol count. Owing to EXIDX entry merging, some local 7080 // symbols will be removed in output. Adjust output local symbol count 7081 // accordingly. We can only changed the static output local symbol count. It 7082 // is too late to change the dynamic symbols. 7083 7084 template<bool big_endian> 7085 void 7086 Arm_relobj<big_endian>::update_output_local_symbol_count() 7087 { 7088 // Caller should check that this needs updating. We want caller checking 7089 // because output_local_symbol_count_needs_update() is most likely inlined. 7090 gold_assert(this->output_local_symbol_count_needs_update_); 7091 7092 gold_assert(this->symtab_shndx() != -1U); 7093 if (this->symtab_shndx() == 0) 7094 { 7095 // This object has no symbols. Weird but legal. 7096 return; 7097 } 7098 7099 // Read the symbol table section header. 7100 const unsigned int symtab_shndx = this->symtab_shndx(); 7101 elfcpp::Shdr<32, big_endian> 7102 symtabshdr(this, this->elf_file()->section_header(symtab_shndx)); 7103 gold_assert(symtabshdr.get_sh_type() == elfcpp::SHT_SYMTAB); 7104 7105 // Read the local symbols. 7106 const int sym_size = elfcpp::Elf_sizes<32>::sym_size; 7107 const unsigned int loccount = this->local_symbol_count(); 7108 gold_assert(loccount == symtabshdr.get_sh_info()); 7109 off_t locsize = loccount * sym_size; 7110 const unsigned char* psyms = this->get_view(symtabshdr.get_sh_offset(), 7111 locsize, true, true); 7112 7113 // Loop over the local symbols. 7114 7115 typedef typename Sized_relobj_file<32, big_endian>::Output_sections 7116 Output_sections; 7117 const Output_sections& out_sections(this->output_sections()); 7118 unsigned int shnum = this->shnum(); 7119 unsigned int count = 0; 7120 // Skip the first, dummy, symbol. 7121 psyms += sym_size; 7122 for (unsigned int i = 1; i < loccount; ++i, psyms += sym_size) 7123 { 7124 elfcpp::Sym<32, big_endian> sym(psyms); 7125 7126 Symbol_value<32>& lv((*this->local_values())[i]); 7127 7128 // This local symbol was already discarded by do_count_local_symbols. 7129 if (lv.is_output_symtab_index_set() && !lv.has_output_symtab_entry()) 7130 continue; 7131 7132 bool is_ordinary; 7133 unsigned int shndx = this->adjust_sym_shndx(i, sym.get_st_shndx(), 7134 &is_ordinary); 7135 7136 if (shndx < shnum) 7137 { 7138 Output_section* os = out_sections[shndx]; 7139 7140 // This local symbol no longer has an output section. Discard it. 7141 if (os == NULL) 7142 { 7143 lv.set_no_output_symtab_entry(); 7144 continue; 7145 } 7146 7147 // Currently we only discard parts of EXIDX input sections. 7148 // We explicitly check for a merged EXIDX input section to avoid 7149 // calling Output_section_data::output_offset unless necessary. 7150 if ((this->get_output_section_offset(shndx) == invalid_address) 7151 && (this->exidx_input_section_by_shndx(shndx) != NULL)) 7152 { 7153 section_offset_type output_offset = 7154 os->output_offset(this, shndx, lv.input_value()); 7155 if (output_offset == -1) 7156 { 7157 // This symbol is defined in a part of an EXIDX input section 7158 // that is discarded due to entry merging. 7159 lv.set_no_output_symtab_entry(); 7160 continue; 7161 } 7162 } 7163 } 7164 7165 ++count; 7166 } 7167 7168 this->set_output_local_symbol_count(count); 7169 this->output_local_symbol_count_needs_update_ = false; 7170 } 7171 7172 // Arm_dynobj methods. 7173 7174 // Read the symbol information. 7175 7176 template<bool big_endian> 7177 void 7178 Arm_dynobj<big_endian>::do_read_symbols(Read_symbols_data* sd) 7179 { 7180 // Call parent class to read symbol information. 7181 this->base_read_symbols(sd); 7182 7183 // Read processor-specific flags in ELF file header. 7184 const unsigned char* pehdr = this->get_view(elfcpp::file_header_offset, 7185 elfcpp::Elf_sizes<32>::ehdr_size, 7186 true, false); 7187 elfcpp::Ehdr<32, big_endian> ehdr(pehdr); 7188 this->processor_specific_flags_ = ehdr.get_e_flags(); 7189 7190 // Read the attributes section if there is one. 7191 // We read from the end because gas seems to put it near the end of 7192 // the section headers. 7193 const size_t shdr_size = elfcpp::Elf_sizes<32>::shdr_size; 7194 const unsigned char* ps = 7195 sd->section_headers->data() + shdr_size * (this->shnum() - 1); 7196 for (unsigned int i = this->shnum(); i > 0; --i, ps -= shdr_size) 7197 { 7198 elfcpp::Shdr<32, big_endian> shdr(ps); 7199 if (shdr.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES) 7200 { 7201 section_offset_type section_offset = shdr.get_sh_offset(); 7202 section_size_type section_size = 7203 convert_to_section_size_type(shdr.get_sh_size()); 7204 const unsigned char* view = 7205 this->get_view(section_offset, section_size, true, false); 7206 this->attributes_section_data_ = 7207 new Attributes_section_data(view, section_size); 7208 break; 7209 } 7210 } 7211 } 7212 7213 // Stub_addend_reader methods. 7214 7215 // Read the addend of a REL relocation of type R_TYPE at VIEW. 7216 7217 template<bool big_endian> 7218 elfcpp::Elf_types<32>::Elf_Swxword 7219 Stub_addend_reader<elfcpp::SHT_REL, big_endian>::operator()( 7220 unsigned int r_type, 7221 const unsigned char* view, 7222 const typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc&) const 7223 { 7224 typedef class Arm_relocate_functions<big_endian> RelocFuncs; 7225 7226 switch (r_type) 7227 { 7228 case elfcpp::R_ARM_CALL: 7229 case elfcpp::R_ARM_JUMP24: 7230 case elfcpp::R_ARM_PLT32: 7231 { 7232 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; 7233 const Valtype* wv = reinterpret_cast<const Valtype*>(view); 7234 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv); 7235 return Bits<26>::sign_extend32(val << 2); 7236 } 7237 7238 case elfcpp::R_ARM_THM_CALL: 7239 case elfcpp::R_ARM_THM_JUMP24: 7240 case elfcpp::R_ARM_THM_XPC22: 7241 { 7242 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; 7243 const Valtype* wv = reinterpret_cast<const Valtype*>(view); 7244 Valtype upper_insn = elfcpp::Swap<16, big_endian>::readval(wv); 7245 Valtype lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1); 7246 return RelocFuncs::thumb32_branch_offset(upper_insn, lower_insn); 7247 } 7248 7249 case elfcpp::R_ARM_THM_JUMP19: 7250 { 7251 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; 7252 const Valtype* wv = reinterpret_cast<const Valtype*>(view); 7253 Valtype upper_insn = elfcpp::Swap<16, big_endian>::readval(wv); 7254 Valtype lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1); 7255 return RelocFuncs::thumb32_cond_branch_offset(upper_insn, lower_insn); 7256 } 7257 7258 default: 7259 gold_unreachable(); 7260 } 7261 } 7262 7263 // Arm_output_data_got methods. 7264 7265 // Add a GOT pair for R_ARM_TLS_GD32. The creates a pair of GOT entries. 7266 // The first one is initialized to be 1, which is the module index for 7267 // the main executable and the second one 0. A reloc of the type 7268 // R_ARM_TLS_DTPOFF32 will be created for the second GOT entry and will 7269 // be applied by gold. GSYM is a global symbol. 7270 // 7271 template<bool big_endian> 7272 void 7273 Arm_output_data_got<big_endian>::add_tls_gd32_with_static_reloc( 7274 unsigned int got_type, 7275 Symbol* gsym) 7276 { 7277 if (gsym->has_got_offset(got_type)) 7278 return; 7279 7280 // We are doing a static link. Just mark it as belong to module 1, 7281 // the executable. 7282 unsigned int got_offset = this->add_constant(1); 7283 gsym->set_got_offset(got_type, got_offset); 7284 got_offset = this->add_constant(0); 7285 this->static_relocs_.push_back(Static_reloc(got_offset, 7286 elfcpp::R_ARM_TLS_DTPOFF32, 7287 gsym)); 7288 } 7289 7290 // Same as the above but for a local symbol. 7291 7292 template<bool big_endian> 7293 void 7294 Arm_output_data_got<big_endian>::add_tls_gd32_with_static_reloc( 7295 unsigned int got_type, 7296 Sized_relobj_file<32, big_endian>* object, 7297 unsigned int index) 7298 { 7299 if (object->local_has_got_offset(index, got_type)) 7300 return; 7301 7302 // We are doing a static link. Just mark it as belong to module 1, 7303 // the executable. 7304 unsigned int got_offset = this->add_constant(1); 7305 object->set_local_got_offset(index, got_type, got_offset); 7306 got_offset = this->add_constant(0); 7307 this->static_relocs_.push_back(Static_reloc(got_offset, 7308 elfcpp::R_ARM_TLS_DTPOFF32, 7309 object, index)); 7310 } 7311 7312 template<bool big_endian> 7313 void 7314 Arm_output_data_got<big_endian>::do_write(Output_file* of) 7315 { 7316 // Call parent to write out GOT. 7317 Output_data_got<32, big_endian>::do_write(of); 7318 7319 // We are done if there is no fix up. 7320 if (this->static_relocs_.empty()) 7321 return; 7322 7323 gold_assert(parameters->doing_static_link()); 7324 7325 const off_t offset = this->offset(); 7326 const section_size_type oview_size = 7327 convert_to_section_size_type(this->data_size()); 7328 unsigned char* const oview = of->get_output_view(offset, oview_size); 7329 7330 Output_segment* tls_segment = this->layout_->tls_segment(); 7331 gold_assert(tls_segment != NULL); 7332 7333 // The thread pointer $tp points to the TCB, which is followed by the 7334 // TLS. So we need to adjust $tp relative addressing by this amount. 7335 Arm_address aligned_tcb_size = 7336 align_address(ARM_TCB_SIZE, tls_segment->maximum_alignment()); 7337 7338 for (size_t i = 0; i < this->static_relocs_.size(); ++i) 7339 { 7340 Static_reloc& reloc(this->static_relocs_[i]); 7341 7342 Arm_address value; 7343 if (!reloc.symbol_is_global()) 7344 { 7345 Sized_relobj_file<32, big_endian>* object = reloc.relobj(); 7346 const Symbol_value<32>* psymval = 7347 reloc.relobj()->local_symbol(reloc.index()); 7348 7349 // We are doing static linking. Issue an error and skip this 7350 // relocation if the symbol is undefined or in a discarded_section. 7351 bool is_ordinary; 7352 unsigned int shndx = psymval->input_shndx(&is_ordinary); 7353 if ((shndx == elfcpp::SHN_UNDEF) 7354 || (is_ordinary 7355 && shndx != elfcpp::SHN_UNDEF 7356 && !object->is_section_included(shndx) 7357 && !this->symbol_table_->is_section_folded(object, shndx))) 7358 { 7359 gold_error(_("undefined or discarded local symbol %u from " 7360 " object %s in GOT"), 7361 reloc.index(), reloc.relobj()->name().c_str()); 7362 continue; 7363 } 7364 7365 value = psymval->value(object, 0); 7366 } 7367 else 7368 { 7369 const Symbol* gsym = reloc.symbol(); 7370 gold_assert(gsym != NULL); 7371 if (gsym->is_forwarder()) 7372 gsym = this->symbol_table_->resolve_forwards(gsym); 7373 7374 // We are doing static linking. Issue an error and skip this 7375 // relocation if the symbol is undefined or in a discarded_section 7376 // unless it is a weakly_undefined symbol. 7377 if ((gsym->is_defined_in_discarded_section() 7378 || gsym->is_undefined()) 7379 && !gsym->is_weak_undefined()) 7380 { 7381 gold_error(_("undefined or discarded symbol %s in GOT"), 7382 gsym->name()); 7383 continue; 7384 } 7385 7386 if (!gsym->is_weak_undefined()) 7387 { 7388 const Sized_symbol<32>* sym = 7389 static_cast<const Sized_symbol<32>*>(gsym); 7390 value = sym->value(); 7391 } 7392 else 7393 value = 0; 7394 } 7395 7396 unsigned got_offset = reloc.got_offset(); 7397 gold_assert(got_offset < oview_size); 7398 7399 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; 7400 Valtype* wv = reinterpret_cast<Valtype*>(oview + got_offset); 7401 Valtype x; 7402 switch (reloc.r_type()) 7403 { 7404 case elfcpp::R_ARM_TLS_DTPOFF32: 7405 x = value; 7406 break; 7407 case elfcpp::R_ARM_TLS_TPOFF32: 7408 x = value + aligned_tcb_size; 7409 break; 7410 default: 7411 gold_unreachable(); 7412 } 7413 elfcpp::Swap<32, big_endian>::writeval(wv, x); 7414 } 7415 7416 of->write_output_view(offset, oview_size, oview); 7417 } 7418 7419 // A class to handle the PLT data. 7420 // This is an abstract base class that handles most of the linker details 7421 // but does not know the actual contents of PLT entries. The derived 7422 // classes below fill in those details. 7423 7424 template<bool big_endian> 7425 class Output_data_plt_arm : public Output_section_data 7426 { 7427 public: 7428 // Unlike aarch64, which records symbol value in "addend" field of relocations 7429 // and could be done at the same time an IRelative reloc is created for the 7430 // symbol, arm puts the symbol value into "GOT" table, which, however, is 7431 // issued later in Output_data_plt_arm::do_write(). So we have a struct here 7432 // to keep necessary symbol information for later use in do_write. We usually 7433 // have only a very limited number of ifuncs, so the extra data required here 7434 // is also limited. 7435 7436 struct IRelative_data 7437 { 7438 IRelative_data(Sized_symbol<32>* sized_symbol) 7439 : symbol_is_global_(true) 7440 { 7441 u_.global = sized_symbol; 7442 } 7443 7444 IRelative_data(Sized_relobj_file<32, big_endian>* relobj, 7445 unsigned int index) 7446 : symbol_is_global_(false) 7447 { 7448 u_.local.relobj = relobj; 7449 u_.local.index = index; 7450 } 7451 7452 union 7453 { 7454 Sized_symbol<32>* global; 7455 7456 struct 7457 { 7458 Sized_relobj_file<32, big_endian>* relobj; 7459 unsigned int index; 7460 } local; 7461 } u_; 7462 7463 bool symbol_is_global_; 7464 }; 7465 7466 typedef Output_data_reloc<elfcpp::SHT_REL, true, 32, big_endian> 7467 Reloc_section; 7468 7469 Output_data_plt_arm(Layout* layout, uint64_t addralign, 7470 Arm_output_data_got<big_endian>* got, 7471 Output_data_space* got_plt, 7472 Output_data_space* got_irelative); 7473 7474 // Add an entry to the PLT. 7475 void 7476 add_entry(Symbol_table* symtab, Layout* layout, Symbol* gsym); 7477 7478 // Add the relocation for a plt entry. 7479 void 7480 add_relocation(Symbol_table* symtab, Layout* layout, 7481 Symbol* gsym, unsigned int got_offset); 7482 7483 // Add an entry to the PLT for a local STT_GNU_IFUNC symbol. 7484 unsigned int 7485 add_local_ifunc_entry(Symbol_table* symtab, Layout*, 7486 Sized_relobj_file<32, big_endian>* relobj, 7487 unsigned int local_sym_index); 7488 7489 // Return the .rel.plt section data. 7490 const Reloc_section* 7491 rel_plt() const 7492 { return this->rel_; } 7493 7494 // Return the PLT relocation container for IRELATIVE. 7495 Reloc_section* 7496 rel_irelative(Symbol_table*, Layout*); 7497 7498 // Return the number of PLT entries. 7499 unsigned int 7500 entry_count() const 7501 { return this->count_ + this->irelative_count_; } 7502 7503 // Return the offset of the first non-reserved PLT entry. 7504 unsigned int 7505 first_plt_entry_offset() const 7506 { return this->do_first_plt_entry_offset(); } 7507 7508 // Return the size of a PLT entry. 7509 unsigned int 7510 get_plt_entry_size() const 7511 { return this->do_get_plt_entry_size(); } 7512 7513 // Return the PLT address for globals. 7514 uint32_t 7515 address_for_global(const Symbol*) const; 7516 7517 // Return the PLT address for locals. 7518 uint32_t 7519 address_for_local(const Relobj*, unsigned int symndx) const; 7520 7521 protected: 7522 // Fill in the first PLT entry. 7523 void 7524 fill_first_plt_entry(unsigned char* pov, 7525 Arm_address got_address, 7526 Arm_address plt_address) 7527 { this->do_fill_first_plt_entry(pov, got_address, plt_address); } 7528 7529 void 7530 fill_plt_entry(unsigned char* pov, 7531 Arm_address got_address, 7532 Arm_address plt_address, 7533 unsigned int got_offset, 7534 unsigned int plt_offset) 7535 { do_fill_plt_entry(pov, got_address, plt_address, got_offset, plt_offset); } 7536 7537 virtual unsigned int 7538 do_first_plt_entry_offset() const = 0; 7539 7540 virtual unsigned int 7541 do_get_plt_entry_size() const = 0; 7542 7543 virtual void 7544 do_fill_first_plt_entry(unsigned char* pov, 7545 Arm_address got_address, 7546 Arm_address plt_address) = 0; 7547 7548 virtual void 7549 do_fill_plt_entry(unsigned char* pov, 7550 Arm_address got_address, 7551 Arm_address plt_address, 7552 unsigned int got_offset, 7553 unsigned int plt_offset) = 0; 7554 7555 void 7556 do_adjust_output_section(Output_section* os); 7557 7558 // Write to a map file. 7559 void 7560 do_print_to_mapfile(Mapfile* mapfile) const 7561 { mapfile->print_output_data(this, _("** PLT")); } 7562 7563 private: 7564 // Set the final size. 7565 void 7566 set_final_data_size() 7567 { 7568 this->set_data_size(this->first_plt_entry_offset() 7569 + ((this->count_ + this->irelative_count_) 7570 * this->get_plt_entry_size())); 7571 } 7572 7573 // Write out the PLT data. 7574 void 7575 do_write(Output_file*); 7576 7577 // Record irelative symbol data. 7578 void insert_irelative_data(const IRelative_data& idata) 7579 { irelative_data_vec_.push_back(idata); } 7580 7581 // The reloc section. 7582 Reloc_section* rel_; 7583 // The IRELATIVE relocs, if necessary. These must follow the 7584 // regular PLT relocations. 7585 Reloc_section* irelative_rel_; 7586 // The .got section. 7587 Arm_output_data_got<big_endian>* got_; 7588 // The .got.plt section. 7589 Output_data_space* got_plt_; 7590 // The part of the .got.plt section used for IRELATIVE relocs. 7591 Output_data_space* got_irelative_; 7592 // The number of PLT entries. 7593 unsigned int count_; 7594 // Number of PLT entries with R_ARM_IRELATIVE relocs. These 7595 // follow the regular PLT entries. 7596 unsigned int irelative_count_; 7597 // Vector for irelative data. 7598 typedef std::vector<IRelative_data> IRelative_data_vec; 7599 IRelative_data_vec irelative_data_vec_; 7600 }; 7601 7602 // Create the PLT section. The ordinary .got section is an argument, 7603 // since we need to refer to the start. We also create our own .got 7604 // section just for PLT entries. 7605 7606 template<bool big_endian> 7607 Output_data_plt_arm<big_endian>::Output_data_plt_arm( 7608 Layout* layout, uint64_t addralign, 7609 Arm_output_data_got<big_endian>* got, 7610 Output_data_space* got_plt, 7611 Output_data_space* got_irelative) 7612 : Output_section_data(addralign), irelative_rel_(NULL), 7613 got_(got), got_plt_(got_plt), got_irelative_(got_irelative), 7614 count_(0), irelative_count_(0) 7615 { 7616 this->rel_ = new Reloc_section(false); 7617 layout->add_output_section_data(".rel.plt", elfcpp::SHT_REL, 7618 elfcpp::SHF_ALLOC, this->rel_, 7619 ORDER_DYNAMIC_PLT_RELOCS, false); 7620 } 7621 7622 template<bool big_endian> 7623 void 7624 Output_data_plt_arm<big_endian>::do_adjust_output_section(Output_section* os) 7625 { 7626 os->set_entsize(0); 7627 } 7628 7629 // Add an entry to the PLT. 7630 7631 template<bool big_endian> 7632 void 7633 Output_data_plt_arm<big_endian>::add_entry(Symbol_table* symtab, 7634 Layout* layout, 7635 Symbol* gsym) 7636 { 7637 gold_assert(!gsym->has_plt_offset()); 7638 7639 unsigned int* entry_count; 7640 Output_section_data_build* got; 7641 7642 // We have 2 different types of plt entry here, normal and ifunc. 7643 7644 // For normal plt, the offset begins with first_plt_entry_offset(20), and the 7645 // 1st entry offset would be 20, the second 32, third 44 ... etc. 7646 7647 // For ifunc plt, the offset begins with 0. So the first offset would 0, 7648 // second 12, third 24 ... etc. 7649 7650 // IFunc plt entries *always* come after *normal* plt entries. 7651 7652 // Notice, when computing the plt address of a certain symbol, "plt_address + 7653 // plt_offset" is no longer correct. Use target->plt_address_for_global() or 7654 // target->plt_address_for_local() instead. 7655 7656 int begin_offset = 0; 7657 if (gsym->type() == elfcpp::STT_GNU_IFUNC 7658 && gsym->can_use_relative_reloc(false)) 7659 { 7660 entry_count = &this->irelative_count_; 7661 got = this->got_irelative_; 7662 // For irelative plt entries, offset is relative to the end of normal plt 7663 // entries, so it starts from 0. 7664 begin_offset = 0; 7665 // Record symbol information. 7666 this->insert_irelative_data( 7667 IRelative_data(symtab->get_sized_symbol<32>(gsym))); 7668 } 7669 else 7670 { 7671 entry_count = &this->count_; 7672 got = this->got_plt_; 7673 // Note that for normal plt entries, when setting the PLT offset we skip 7674 // the initial reserved PLT entry. 7675 begin_offset = this->first_plt_entry_offset(); 7676 } 7677 7678 gsym->set_plt_offset(begin_offset 7679 + (*entry_count) * this->get_plt_entry_size()); 7680 7681 ++(*entry_count); 7682 7683 section_offset_type got_offset = got->current_data_size(); 7684 7685 // Every PLT entry needs a GOT entry which points back to the PLT 7686 // entry (this will be changed by the dynamic linker, normally 7687 // lazily when the function is called). 7688 got->set_current_data_size(got_offset + 4); 7689 7690 // Every PLT entry needs a reloc. 7691 this->add_relocation(symtab, layout, gsym, got_offset); 7692 7693 // Note that we don't need to save the symbol. The contents of the 7694 // PLT are independent of which symbols are used. The symbols only 7695 // appear in the relocations. 7696 } 7697 7698 // Add an entry to the PLT for a local STT_GNU_IFUNC symbol. Return 7699 // the PLT offset. 7700 7701 template<bool big_endian> 7702 unsigned int 7703 Output_data_plt_arm<big_endian>::add_local_ifunc_entry( 7704 Symbol_table* symtab, 7705 Layout* layout, 7706 Sized_relobj_file<32, big_endian>* relobj, 7707 unsigned int local_sym_index) 7708 { 7709 this->insert_irelative_data(IRelative_data(relobj, local_sym_index)); 7710 7711 // Notice, when computingthe plt entry address, "plt_address + plt_offset" is 7712 // no longer correct. Use target->plt_address_for_local() instead. 7713 unsigned int plt_offset = this->irelative_count_ * this->get_plt_entry_size(); 7714 ++this->irelative_count_; 7715 7716 section_offset_type got_offset = this->got_irelative_->current_data_size(); 7717 7718 // Every PLT entry needs a GOT entry which points back to the PLT 7719 // entry. 7720 this->got_irelative_->set_current_data_size(got_offset + 4); 7721 7722 7723 // Every PLT entry needs a reloc. 7724 Reloc_section* rel = this->rel_irelative(symtab, layout); 7725 rel->add_symbolless_local_addend(relobj, local_sym_index, 7726 elfcpp::R_ARM_IRELATIVE, 7727 this->got_irelative_, got_offset); 7728 return plt_offset; 7729 } 7730 7731 7732 // Add the relocation for a PLT entry. 7733 7734 template<bool big_endian> 7735 void 7736 Output_data_plt_arm<big_endian>::add_relocation( 7737 Symbol_table* symtab, Layout* layout, Symbol* gsym, unsigned int got_offset) 7738 { 7739 if (gsym->type() == elfcpp::STT_GNU_IFUNC 7740 && gsym->can_use_relative_reloc(false)) 7741 { 7742 Reloc_section* rel = this->rel_irelative(symtab, layout); 7743 rel->add_symbolless_global_addend(gsym, elfcpp::R_ARM_IRELATIVE, 7744 this->got_irelative_, got_offset); 7745 } 7746 else 7747 { 7748 gsym->set_needs_dynsym_entry(); 7749 this->rel_->add_global(gsym, elfcpp::R_ARM_JUMP_SLOT, this->got_plt_, 7750 got_offset); 7751 } 7752 } 7753 7754 7755 // Create the irelative relocation data. 7756 7757 template<bool big_endian> 7758 typename Output_data_plt_arm<big_endian>::Reloc_section* 7759 Output_data_plt_arm<big_endian>::rel_irelative(Symbol_table* symtab, 7760 Layout* layout) 7761 { 7762 if (this->irelative_rel_ == NULL) 7763 { 7764 // Since irelative relocations goes into 'rel.dyn', we delegate the 7765 // creation of irelative_rel_ to where rel_dyn section gets created. 7766 Target_arm<big_endian>* arm_target = 7767 Target_arm<big_endian>::default_target(); 7768 this->irelative_rel_ = arm_target->rel_irelative_section(layout); 7769 7770 // Make sure we have a place for the TLSDESC relocations, in 7771 // case we see any later on. 7772 // this->rel_tlsdesc(layout); 7773 if (parameters->doing_static_link()) 7774 { 7775 // A statically linked executable will only have a .rel.plt section to 7776 // hold R_ARM_IRELATIVE relocs for STT_GNU_IFUNC symbols. The library 7777 // will use these symbols to locate the IRELATIVE relocs at program 7778 // startup time. 7779 symtab->define_in_output_data("__rel_iplt_start", NULL, 7780 Symbol_table::PREDEFINED, 7781 this->irelative_rel_, 0, 0, 7782 elfcpp::STT_NOTYPE, elfcpp::STB_GLOBAL, 7783 elfcpp::STV_HIDDEN, 0, false, true); 7784 symtab->define_in_output_data("__rel_iplt_end", NULL, 7785 Symbol_table::PREDEFINED, 7786 this->irelative_rel_, 0, 0, 7787 elfcpp::STT_NOTYPE, elfcpp::STB_GLOBAL, 7788 elfcpp::STV_HIDDEN, 0, true, true); 7789 } 7790 } 7791 return this->irelative_rel_; 7792 } 7793 7794 7795 // Return the PLT address for a global symbol. 7796 7797 template<bool big_endian> 7798 uint32_t 7799 Output_data_plt_arm<big_endian>::address_for_global(const Symbol* gsym) const 7800 { 7801 uint64_t begin_offset = 0; 7802 if (gsym->type() == elfcpp::STT_GNU_IFUNC 7803 && gsym->can_use_relative_reloc(false)) 7804 { 7805 begin_offset = (this->first_plt_entry_offset() + 7806 this->count_ * this->get_plt_entry_size()); 7807 } 7808 return this->address() + begin_offset + gsym->plt_offset(); 7809 } 7810 7811 7812 // Return the PLT address for a local symbol. These are always 7813 // IRELATIVE relocs. 7814 7815 template<bool big_endian> 7816 uint32_t 7817 Output_data_plt_arm<big_endian>::address_for_local( 7818 const Relobj* object, 7819 unsigned int r_sym) const 7820 { 7821 return (this->address() 7822 + this->first_plt_entry_offset() 7823 + this->count_ * this->get_plt_entry_size() 7824 + object->local_plt_offset(r_sym)); 7825 } 7826 7827 7828 template<bool big_endian> 7829 class Output_data_plt_arm_standard : public Output_data_plt_arm<big_endian> 7830 { 7831 public: 7832 Output_data_plt_arm_standard(Layout* layout, 7833 Arm_output_data_got<big_endian>* got, 7834 Output_data_space* got_plt, 7835 Output_data_space* got_irelative) 7836 : Output_data_plt_arm<big_endian>(layout, 4, got, got_plt, got_irelative) 7837 { } 7838 7839 protected: 7840 // Return the offset of the first non-reserved PLT entry. 7841 virtual unsigned int 7842 do_first_plt_entry_offset() const 7843 { return sizeof(first_plt_entry); } 7844 7845 virtual void 7846 do_fill_first_plt_entry(unsigned char* pov, 7847 Arm_address got_address, 7848 Arm_address plt_address); 7849 7850 private: 7851 // Template for the first PLT entry. 7852 static const uint32_t first_plt_entry[5]; 7853 }; 7854 7855 // ARM PLTs. 7856 // FIXME: This is not very flexible. Right now this has only been tested 7857 // on armv5te. If we are to support additional architecture features like 7858 // Thumb-2 or BE8, we need to make this more flexible like GNU ld. 7859 7860 // The first entry in the PLT. 7861 template<bool big_endian> 7862 const uint32_t Output_data_plt_arm_standard<big_endian>::first_plt_entry[5] = 7863 { 7864 0xe52de004, // str lr, [sp, #-4]! 7865 0xe59fe004, // ldr lr, [pc, #4] 7866 0xe08fe00e, // add lr, pc, lr 7867 0xe5bef008, // ldr pc, [lr, #8]! 7868 0x00000000, // &GOT[0] - . 7869 }; 7870 7871 template<bool big_endian> 7872 void 7873 Output_data_plt_arm_standard<big_endian>::do_fill_first_plt_entry( 7874 unsigned char* pov, 7875 Arm_address got_address, 7876 Arm_address plt_address) 7877 { 7878 // Write first PLT entry. All but the last word are constants. 7879 const size_t num_first_plt_words = (sizeof(first_plt_entry) 7880 / sizeof(first_plt_entry[0])); 7881 for (size_t i = 0; i < num_first_plt_words - 1; i++) 7882 elfcpp::Swap<32, big_endian>::writeval(pov + i * 4, first_plt_entry[i]); 7883 // Last word in first PLT entry is &GOT[0] - . 7884 elfcpp::Swap<32, big_endian>::writeval(pov + 16, 7885 got_address - (plt_address + 16)); 7886 } 7887 7888 // Subsequent entries in the PLT. 7889 // This class generates short (12-byte) entries, for displacements up to 2^28. 7890 7891 template<bool big_endian> 7892 class Output_data_plt_arm_short : public Output_data_plt_arm_standard<big_endian> 7893 { 7894 public: 7895 Output_data_plt_arm_short(Layout* layout, 7896 Arm_output_data_got<big_endian>* got, 7897 Output_data_space* got_plt, 7898 Output_data_space* got_irelative) 7899 : Output_data_plt_arm_standard<big_endian>(layout, got, got_plt, got_irelative) 7900 { } 7901 7902 protected: 7903 // Return the size of a PLT entry. 7904 virtual unsigned int 7905 do_get_plt_entry_size() const 7906 { return sizeof(plt_entry); } 7907 7908 virtual void 7909 do_fill_plt_entry(unsigned char* pov, 7910 Arm_address got_address, 7911 Arm_address plt_address, 7912 unsigned int got_offset, 7913 unsigned int plt_offset); 7914 7915 private: 7916 // Template for subsequent PLT entries. 7917 static const uint32_t plt_entry[3]; 7918 }; 7919 7920 template<bool big_endian> 7921 const uint32_t Output_data_plt_arm_short<big_endian>::plt_entry[3] = 7922 { 7923 0xe28fc600, // add ip, pc, #0xNN00000 7924 0xe28cca00, // add ip, ip, #0xNN000 7925 0xe5bcf000, // ldr pc, [ip, #0xNNN]! 7926 }; 7927 7928 template<bool big_endian> 7929 void 7930 Output_data_plt_arm_short<big_endian>::do_fill_plt_entry( 7931 unsigned char* pov, 7932 Arm_address got_address, 7933 Arm_address plt_address, 7934 unsigned int got_offset, 7935 unsigned int plt_offset) 7936 { 7937 int32_t offset = ((got_address + got_offset) 7938 - (plt_address + plt_offset + 8)); 7939 if (offset < 0 || offset > 0x0fffffff) 7940 gold_error(_("PLT offset too large, try linking with --long-plt")); 7941 7942 uint32_t plt_insn0 = plt_entry[0] | ((offset >> 20) & 0xff); 7943 elfcpp::Swap<32, big_endian>::writeval(pov, plt_insn0); 7944 uint32_t plt_insn1 = plt_entry[1] | ((offset >> 12) & 0xff); 7945 elfcpp::Swap<32, big_endian>::writeval(pov + 4, plt_insn1); 7946 uint32_t plt_insn2 = plt_entry[2] | (offset & 0xfff); 7947 elfcpp::Swap<32, big_endian>::writeval(pov + 8, plt_insn2); 7948 } 7949 7950 // This class generates long (16-byte) entries, for arbitrary displacements. 7951 7952 template<bool big_endian> 7953 class Output_data_plt_arm_long : public Output_data_plt_arm_standard<big_endian> 7954 { 7955 public: 7956 Output_data_plt_arm_long(Layout* layout, 7957 Arm_output_data_got<big_endian>* got, 7958 Output_data_space* got_plt, 7959 Output_data_space* got_irelative) 7960 : Output_data_plt_arm_standard<big_endian>(layout, got, got_plt, got_irelative) 7961 { } 7962 7963 protected: 7964 // Return the size of a PLT entry. 7965 virtual unsigned int 7966 do_get_plt_entry_size() const 7967 { return sizeof(plt_entry); } 7968 7969 virtual void 7970 do_fill_plt_entry(unsigned char* pov, 7971 Arm_address got_address, 7972 Arm_address plt_address, 7973 unsigned int got_offset, 7974 unsigned int plt_offset); 7975 7976 private: 7977 // Template for subsequent PLT entries. 7978 static const uint32_t plt_entry[4]; 7979 }; 7980 7981 template<bool big_endian> 7982 const uint32_t Output_data_plt_arm_long<big_endian>::plt_entry[4] = 7983 { 7984 0xe28fc200, // add ip, pc, #0xN0000000 7985 0xe28cc600, // add ip, ip, #0xNN00000 7986 0xe28cca00, // add ip, ip, #0xNN000 7987 0xe5bcf000, // ldr pc, [ip, #0xNNN]! 7988 }; 7989 7990 template<bool big_endian> 7991 void 7992 Output_data_plt_arm_long<big_endian>::do_fill_plt_entry( 7993 unsigned char* pov, 7994 Arm_address got_address, 7995 Arm_address plt_address, 7996 unsigned int got_offset, 7997 unsigned int plt_offset) 7998 { 7999 int32_t offset = ((got_address + got_offset) 8000 - (plt_address + plt_offset + 8)); 8001 8002 uint32_t plt_insn0 = plt_entry[0] | (offset >> 28); 8003 elfcpp::Swap<32, big_endian>::writeval(pov, plt_insn0); 8004 uint32_t plt_insn1 = plt_entry[1] | ((offset >> 20) & 0xff); 8005 elfcpp::Swap<32, big_endian>::writeval(pov + 4, plt_insn1); 8006 uint32_t plt_insn2 = plt_entry[2] | ((offset >> 12) & 0xff); 8007 elfcpp::Swap<32, big_endian>::writeval(pov + 8, plt_insn2); 8008 uint32_t plt_insn3 = plt_entry[3] | (offset & 0xfff); 8009 elfcpp::Swap<32, big_endian>::writeval(pov + 12, plt_insn3); 8010 } 8011 8012 // Write out the PLT. This uses the hand-coded instructions above, 8013 // and adjusts them as needed. This is all specified by the arm ELF 8014 // Processor Supplement. 8015 8016 template<bool big_endian> 8017 void 8018 Output_data_plt_arm<big_endian>::do_write(Output_file* of) 8019 { 8020 const off_t offset = this->offset(); 8021 const section_size_type oview_size = 8022 convert_to_section_size_type(this->data_size()); 8023 unsigned char* const oview = of->get_output_view(offset, oview_size); 8024 8025 const off_t got_file_offset = this->got_plt_->offset(); 8026 gold_assert(got_file_offset + this->got_plt_->data_size() 8027 == this->got_irelative_->offset()); 8028 const section_size_type got_size = 8029 convert_to_section_size_type(this->got_plt_->data_size() 8030 + this->got_irelative_->data_size()); 8031 unsigned char* const got_view = of->get_output_view(got_file_offset, 8032 got_size); 8033 unsigned char* pov = oview; 8034 8035 Arm_address plt_address = this->address(); 8036 Arm_address got_address = this->got_plt_->address(); 8037 8038 // Write first PLT entry. 8039 this->fill_first_plt_entry(pov, got_address, plt_address); 8040 pov += this->first_plt_entry_offset(); 8041 8042 unsigned char* got_pov = got_view; 8043 8044 memset(got_pov, 0, 12); 8045 got_pov += 12; 8046 8047 unsigned int plt_offset = this->first_plt_entry_offset(); 8048 unsigned int got_offset = 12; 8049 const unsigned int count = this->count_ + this->irelative_count_; 8050 gold_assert(this->irelative_count_ == this->irelative_data_vec_.size()); 8051 for (unsigned int i = 0; 8052 i < count; 8053 ++i, 8054 pov += this->get_plt_entry_size(), 8055 got_pov += 4, 8056 plt_offset += this->get_plt_entry_size(), 8057 got_offset += 4) 8058 { 8059 // Set and adjust the PLT entry itself. 8060 this->fill_plt_entry(pov, got_address, plt_address, 8061 got_offset, plt_offset); 8062 8063 Arm_address value; 8064 if (i < this->count_) 8065 { 8066 // For non-irelative got entries, the value is the beginning of plt. 8067 value = plt_address; 8068 } 8069 else 8070 { 8071 // For irelative got entries, the value is the (global/local) symbol 8072 // address. 8073 const IRelative_data& idata = 8074 this->irelative_data_vec_[i - this->count_]; 8075 if (idata.symbol_is_global_) 8076 { 8077 // Set the entry in the GOT for irelative symbols. The content is 8078 // the address of the ifunc, not the address of plt start. 8079 const Sized_symbol<32>* sized_symbol = idata.u_.global; 8080 gold_assert(sized_symbol->type() == elfcpp::STT_GNU_IFUNC); 8081 value = sized_symbol->value(); 8082 } 8083 else 8084 { 8085 value = idata.u_.local.relobj->local_symbol_value( 8086 idata.u_.local.index, 0); 8087 } 8088 } 8089 elfcpp::Swap<32, big_endian>::writeval(got_pov, value); 8090 } 8091 8092 gold_assert(static_cast<section_size_type>(pov - oview) == oview_size); 8093 gold_assert(static_cast<section_size_type>(got_pov - got_view) == got_size); 8094 8095 of->write_output_view(offset, oview_size, oview); 8096 of->write_output_view(got_file_offset, got_size, got_view); 8097 } 8098 8099 8100 // Create a PLT entry for a global symbol. 8101 8102 template<bool big_endian> 8103 void 8104 Target_arm<big_endian>::make_plt_entry(Symbol_table* symtab, Layout* layout, 8105 Symbol* gsym) 8106 { 8107 if (gsym->has_plt_offset()) 8108 return; 8109 8110 if (this->plt_ == NULL) 8111 this->make_plt_section(symtab, layout); 8112 8113 this->plt_->add_entry(symtab, layout, gsym); 8114 } 8115 8116 8117 // Create the PLT section. 8118 template<bool big_endian> 8119 void 8120 Target_arm<big_endian>::make_plt_section( 8121 Symbol_table* symtab, Layout* layout) 8122 { 8123 if (this->plt_ == NULL) 8124 { 8125 // Create the GOT section first. 8126 this->got_section(symtab, layout); 8127 8128 // GOT for irelatives is create along with got.plt. 8129 gold_assert(this->got_ != NULL 8130 && this->got_plt_ != NULL 8131 && this->got_irelative_ != NULL); 8132 this->plt_ = this->make_data_plt(layout, this->got_, this->got_plt_, 8133 this->got_irelative_); 8134 8135 layout->add_output_section_data(".plt", elfcpp::SHT_PROGBITS, 8136 (elfcpp::SHF_ALLOC 8137 | elfcpp::SHF_EXECINSTR), 8138 this->plt_, ORDER_PLT, false); 8139 symtab->define_in_output_data("$a", NULL, 8140 Symbol_table::PREDEFINED, 8141 this->plt_, 8142 0, 0, elfcpp::STT_NOTYPE, 8143 elfcpp::STB_LOCAL, 8144 elfcpp::STV_DEFAULT, 0, 8145 false, false); 8146 } 8147 } 8148 8149 8150 // Make a PLT entry for a local STT_GNU_IFUNC symbol. 8151 8152 template<bool big_endian> 8153 void 8154 Target_arm<big_endian>::make_local_ifunc_plt_entry( 8155 Symbol_table* symtab, Layout* layout, 8156 Sized_relobj_file<32, big_endian>* relobj, 8157 unsigned int local_sym_index) 8158 { 8159 if (relobj->local_has_plt_offset(local_sym_index)) 8160 return; 8161 if (this->plt_ == NULL) 8162 this->make_plt_section(symtab, layout); 8163 unsigned int plt_offset = this->plt_->add_local_ifunc_entry(symtab, layout, 8164 relobj, 8165 local_sym_index); 8166 relobj->set_local_plt_offset(local_sym_index, plt_offset); 8167 } 8168 8169 8170 // Return the number of entries in the PLT. 8171 8172 template<bool big_endian> 8173 unsigned int 8174 Target_arm<big_endian>::plt_entry_count() const 8175 { 8176 if (this->plt_ == NULL) 8177 return 0; 8178 return this->plt_->entry_count(); 8179 } 8180 8181 // Return the offset of the first non-reserved PLT entry. 8182 8183 template<bool big_endian> 8184 unsigned int 8185 Target_arm<big_endian>::first_plt_entry_offset() const 8186 { 8187 return this->plt_->first_plt_entry_offset(); 8188 } 8189 8190 // Return the size of each PLT entry. 8191 8192 template<bool big_endian> 8193 unsigned int 8194 Target_arm<big_endian>::plt_entry_size() const 8195 { 8196 return this->plt_->get_plt_entry_size(); 8197 } 8198 8199 // Get the section to use for TLS_DESC relocations. 8200 8201 template<bool big_endian> 8202 typename Target_arm<big_endian>::Reloc_section* 8203 Target_arm<big_endian>::rel_tls_desc_section(Layout* layout) const 8204 { 8205 return this->plt_section()->rel_tls_desc(layout); 8206 } 8207 8208 // Define the _TLS_MODULE_BASE_ symbol in the TLS segment. 8209 8210 template<bool big_endian> 8211 void 8212 Target_arm<big_endian>::define_tls_base_symbol( 8213 Symbol_table* symtab, 8214 Layout* layout) 8215 { 8216 if (this->tls_base_symbol_defined_) 8217 return; 8218 8219 Output_segment* tls_segment = layout->tls_segment(); 8220 if (tls_segment != NULL) 8221 { 8222 bool is_exec = parameters->options().output_is_executable(); 8223 symtab->define_in_output_segment("_TLS_MODULE_BASE_", NULL, 8224 Symbol_table::PREDEFINED, 8225 tls_segment, 0, 0, 8226 elfcpp::STT_TLS, 8227 elfcpp::STB_LOCAL, 8228 elfcpp::STV_HIDDEN, 0, 8229 (is_exec 8230 ? Symbol::SEGMENT_END 8231 : Symbol::SEGMENT_START), 8232 true); 8233 } 8234 this->tls_base_symbol_defined_ = true; 8235 } 8236 8237 // Create a GOT entry for the TLS module index. 8238 8239 template<bool big_endian> 8240 unsigned int 8241 Target_arm<big_endian>::got_mod_index_entry( 8242 Symbol_table* symtab, 8243 Layout* layout, 8244 Sized_relobj_file<32, big_endian>* object) 8245 { 8246 if (this->got_mod_index_offset_ == -1U) 8247 { 8248 gold_assert(symtab != NULL && layout != NULL && object != NULL); 8249 Arm_output_data_got<big_endian>* got = this->got_section(symtab, layout); 8250 unsigned int got_offset; 8251 if (!parameters->doing_static_link()) 8252 { 8253 got_offset = got->add_constant(0); 8254 Reloc_section* rel_dyn = this->rel_dyn_section(layout); 8255 rel_dyn->add_local(object, 0, elfcpp::R_ARM_TLS_DTPMOD32, got, 8256 got_offset); 8257 } 8258 else 8259 { 8260 // We are doing a static link. Just mark it as belong to module 1, 8261 // the executable. 8262 got_offset = got->add_constant(1); 8263 } 8264 8265 got->add_constant(0); 8266 this->got_mod_index_offset_ = got_offset; 8267 } 8268 return this->got_mod_index_offset_; 8269 } 8270 8271 // Optimize the TLS relocation type based on what we know about the 8272 // symbol. IS_FINAL is true if the final address of this symbol is 8273 // known at link time. 8274 8275 template<bool big_endian> 8276 tls::Tls_optimization 8277 Target_arm<big_endian>::optimize_tls_reloc(bool, int) 8278 { 8279 // FIXME: Currently we do not do any TLS optimization. 8280 return tls::TLSOPT_NONE; 8281 } 8282 8283 // Get the Reference_flags for a particular relocation. 8284 8285 template<bool big_endian> 8286 int 8287 Target_arm<big_endian>::Scan::get_reference_flags(unsigned int r_type) 8288 { 8289 switch (r_type) 8290 { 8291 case elfcpp::R_ARM_NONE: 8292 case elfcpp::R_ARM_V4BX: 8293 case elfcpp::R_ARM_GNU_VTENTRY: 8294 case elfcpp::R_ARM_GNU_VTINHERIT: 8295 // No symbol reference. 8296 return 0; 8297 8298 case elfcpp::R_ARM_ABS32: 8299 case elfcpp::R_ARM_ABS16: 8300 case elfcpp::R_ARM_ABS12: 8301 case elfcpp::R_ARM_THM_ABS5: 8302 case elfcpp::R_ARM_ABS8: 8303 case elfcpp::R_ARM_BASE_ABS: 8304 case elfcpp::R_ARM_MOVW_ABS_NC: 8305 case elfcpp::R_ARM_MOVT_ABS: 8306 case elfcpp::R_ARM_THM_MOVW_ABS_NC: 8307 case elfcpp::R_ARM_THM_MOVT_ABS: 8308 case elfcpp::R_ARM_ABS32_NOI: 8309 return Symbol::ABSOLUTE_REF; 8310 8311 case elfcpp::R_ARM_REL32: 8312 case elfcpp::R_ARM_LDR_PC_G0: 8313 case elfcpp::R_ARM_SBREL32: 8314 case elfcpp::R_ARM_THM_PC8: 8315 case elfcpp::R_ARM_BASE_PREL: 8316 case elfcpp::R_ARM_MOVW_PREL_NC: 8317 case elfcpp::R_ARM_MOVT_PREL: 8318 case elfcpp::R_ARM_THM_MOVW_PREL_NC: 8319 case elfcpp::R_ARM_THM_MOVT_PREL: 8320 case elfcpp::R_ARM_THM_ALU_PREL_11_0: 8321 case elfcpp::R_ARM_THM_PC12: 8322 case elfcpp::R_ARM_REL32_NOI: 8323 case elfcpp::R_ARM_ALU_PC_G0_NC: 8324 case elfcpp::R_ARM_ALU_PC_G0: 8325 case elfcpp::R_ARM_ALU_PC_G1_NC: 8326 case elfcpp::R_ARM_ALU_PC_G1: 8327 case elfcpp::R_ARM_ALU_PC_G2: 8328 case elfcpp::R_ARM_LDR_PC_G1: 8329 case elfcpp::R_ARM_LDR_PC_G2: 8330 case elfcpp::R_ARM_LDRS_PC_G0: 8331 case elfcpp::R_ARM_LDRS_PC_G1: 8332 case elfcpp::R_ARM_LDRS_PC_G2: 8333 case elfcpp::R_ARM_LDC_PC_G0: 8334 case elfcpp::R_ARM_LDC_PC_G1: 8335 case elfcpp::R_ARM_LDC_PC_G2: 8336 case elfcpp::R_ARM_ALU_SB_G0_NC: 8337 case elfcpp::R_ARM_ALU_SB_G0: 8338 case elfcpp::R_ARM_ALU_SB_G1_NC: 8339 case elfcpp::R_ARM_ALU_SB_G1: 8340 case elfcpp::R_ARM_ALU_SB_G2: 8341 case elfcpp::R_ARM_LDR_SB_G0: 8342 case elfcpp::R_ARM_LDR_SB_G1: 8343 case elfcpp::R_ARM_LDR_SB_G2: 8344 case elfcpp::R_ARM_LDRS_SB_G0: 8345 case elfcpp::R_ARM_LDRS_SB_G1: 8346 case elfcpp::R_ARM_LDRS_SB_G2: 8347 case elfcpp::R_ARM_LDC_SB_G0: 8348 case elfcpp::R_ARM_LDC_SB_G1: 8349 case elfcpp::R_ARM_LDC_SB_G2: 8350 case elfcpp::R_ARM_MOVW_BREL_NC: 8351 case elfcpp::R_ARM_MOVT_BREL: 8352 case elfcpp::R_ARM_MOVW_BREL: 8353 case elfcpp::R_ARM_THM_MOVW_BREL_NC: 8354 case elfcpp::R_ARM_THM_MOVT_BREL: 8355 case elfcpp::R_ARM_THM_MOVW_BREL: 8356 case elfcpp::R_ARM_GOTOFF32: 8357 case elfcpp::R_ARM_GOTOFF12: 8358 case elfcpp::R_ARM_SBREL31: 8359 return Symbol::RELATIVE_REF; 8360 8361 case elfcpp::R_ARM_PLT32: 8362 case elfcpp::R_ARM_CALL: 8363 case elfcpp::R_ARM_JUMP24: 8364 case elfcpp::R_ARM_THM_CALL: 8365 case elfcpp::R_ARM_THM_JUMP24: 8366 case elfcpp::R_ARM_THM_JUMP19: 8367 case elfcpp::R_ARM_THM_JUMP6: 8368 case elfcpp::R_ARM_THM_JUMP11: 8369 case elfcpp::R_ARM_THM_JUMP8: 8370 // R_ARM_PREL31 is not used to relocate call/jump instructions but 8371 // in unwind tables. It may point to functions via PLTs. 8372 // So we treat it like call/jump relocations above. 8373 case elfcpp::R_ARM_PREL31: 8374 return Symbol::FUNCTION_CALL | Symbol::RELATIVE_REF; 8375 8376 case elfcpp::R_ARM_GOT_BREL: 8377 case elfcpp::R_ARM_GOT_ABS: 8378 case elfcpp::R_ARM_GOT_PREL: 8379 // Absolute in GOT. 8380 return Symbol::ABSOLUTE_REF; 8381 8382 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic 8383 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic 8384 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic 8385 case elfcpp::R_ARM_TLS_IE32: // Initial-exec 8386 case elfcpp::R_ARM_TLS_LE32: // Local-exec 8387 return Symbol::TLS_REF; 8388 8389 case elfcpp::R_ARM_TARGET1: 8390 case elfcpp::R_ARM_TARGET2: 8391 case elfcpp::R_ARM_COPY: 8392 case elfcpp::R_ARM_GLOB_DAT: 8393 case elfcpp::R_ARM_JUMP_SLOT: 8394 case elfcpp::R_ARM_RELATIVE: 8395 case elfcpp::R_ARM_PC24: 8396 case elfcpp::R_ARM_LDR_SBREL_11_0_NC: 8397 case elfcpp::R_ARM_ALU_SBREL_19_12_NC: 8398 case elfcpp::R_ARM_ALU_SBREL_27_20_CK: 8399 default: 8400 // Not expected. We will give an error later. 8401 return 0; 8402 } 8403 } 8404 8405 // Report an unsupported relocation against a local symbol. 8406 8407 template<bool big_endian> 8408 void 8409 Target_arm<big_endian>::Scan::unsupported_reloc_local( 8410 Sized_relobj_file<32, big_endian>* object, 8411 unsigned int r_type) 8412 { 8413 gold_error(_("%s: unsupported reloc %u against local symbol"), 8414 object->name().c_str(), r_type); 8415 } 8416 8417 // We are about to emit a dynamic relocation of type R_TYPE. If the 8418 // dynamic linker does not support it, issue an error. The GNU linker 8419 // only issues a non-PIC error for an allocated read-only section. 8420 // Here we know the section is allocated, but we don't know that it is 8421 // read-only. But we check for all the relocation types which the 8422 // glibc dynamic linker supports, so it seems appropriate to issue an 8423 // error even if the section is not read-only. 8424 8425 template<bool big_endian> 8426 void 8427 Target_arm<big_endian>::Scan::check_non_pic(Relobj* object, 8428 unsigned int r_type) 8429 { 8430 switch (r_type) 8431 { 8432 // These are the relocation types supported by glibc for ARM. 8433 case elfcpp::R_ARM_RELATIVE: 8434 case elfcpp::R_ARM_COPY: 8435 case elfcpp::R_ARM_GLOB_DAT: 8436 case elfcpp::R_ARM_JUMP_SLOT: 8437 case elfcpp::R_ARM_ABS32: 8438 case elfcpp::R_ARM_ABS32_NOI: 8439 case elfcpp::R_ARM_IRELATIVE: 8440 case elfcpp::R_ARM_PC24: 8441 // FIXME: The following 3 types are not supported by Android's dynamic 8442 // linker. 8443 case elfcpp::R_ARM_TLS_DTPMOD32: 8444 case elfcpp::R_ARM_TLS_DTPOFF32: 8445 case elfcpp::R_ARM_TLS_TPOFF32: 8446 return; 8447 8448 default: 8449 { 8450 // This prevents us from issuing more than one error per reloc 8451 // section. But we can still wind up issuing more than one 8452 // error per object file. 8453 if (this->issued_non_pic_error_) 8454 return; 8455 const Arm_reloc_property* reloc_property = 8456 arm_reloc_property_table->get_reloc_property(r_type); 8457 gold_assert(reloc_property != NULL); 8458 object->error(_("requires unsupported dynamic reloc %s; " 8459 "recompile with -fPIC"), 8460 reloc_property->name().c_str()); 8461 this->issued_non_pic_error_ = true; 8462 return; 8463 } 8464 8465 case elfcpp::R_ARM_NONE: 8466 gold_unreachable(); 8467 } 8468 } 8469 8470 8471 // Return whether we need to make a PLT entry for a relocation of the 8472 // given type against a STT_GNU_IFUNC symbol. 8473 8474 template<bool big_endian> 8475 bool 8476 Target_arm<big_endian>::Scan::reloc_needs_plt_for_ifunc( 8477 Sized_relobj_file<32, big_endian>* object, 8478 unsigned int r_type) 8479 { 8480 int flags = Scan::get_reference_flags(r_type); 8481 if (flags & Symbol::TLS_REF) 8482 { 8483 gold_error(_("%s: unsupported TLS reloc %u for IFUNC symbol"), 8484 object->name().c_str(), r_type); 8485 return false; 8486 } 8487 return flags != 0; 8488 } 8489 8490 8491 // Scan a relocation for a local symbol. 8492 // FIXME: This only handles a subset of relocation types used by Android 8493 // on ARM v5te devices. 8494 8495 template<bool big_endian> 8496 inline void 8497 Target_arm<big_endian>::Scan::local(Symbol_table* symtab, 8498 Layout* layout, 8499 Target_arm* target, 8500 Sized_relobj_file<32, big_endian>* object, 8501 unsigned int data_shndx, 8502 Output_section* output_section, 8503 const elfcpp::Rel<32, big_endian>& reloc, 8504 unsigned int r_type, 8505 const elfcpp::Sym<32, big_endian>& lsym, 8506 bool is_discarded) 8507 { 8508 if (is_discarded) 8509 return; 8510 8511 r_type = get_real_reloc_type(r_type); 8512 8513 // A local STT_GNU_IFUNC symbol may require a PLT entry. 8514 bool is_ifunc = lsym.get_st_type() == elfcpp::STT_GNU_IFUNC; 8515 if (is_ifunc && this->reloc_needs_plt_for_ifunc(object, r_type)) 8516 { 8517 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info()); 8518 target->make_local_ifunc_plt_entry(symtab, layout, object, r_sym); 8519 } 8520 8521 switch (r_type) 8522 { 8523 case elfcpp::R_ARM_NONE: 8524 case elfcpp::R_ARM_V4BX: 8525 case elfcpp::R_ARM_GNU_VTENTRY: 8526 case elfcpp::R_ARM_GNU_VTINHERIT: 8527 break; 8528 8529 case elfcpp::R_ARM_ABS32: 8530 case elfcpp::R_ARM_ABS32_NOI: 8531 // If building a shared library (or a position-independent 8532 // executable), we need to create a dynamic relocation for 8533 // this location. The relocation applied at link time will 8534 // apply the link-time value, so we flag the location with 8535 // an R_ARM_RELATIVE relocation so the dynamic loader can 8536 // relocate it easily. 8537 if (parameters->options().output_is_position_independent()) 8538 { 8539 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info()); 8540 if (parameters->options().experimental_use_relr()) 8541 { 8542 Relr_section* relr_dyn = target->relr_dyn_section(layout); 8543 relr_dyn->add_local_relative(object, r_sym, output_section, 8544 data_shndx, reloc.get_r_offset()); 8545 } 8546 else 8547 { 8548 Reloc_section* rel_dyn = target->rel_dyn_section(layout); 8549 // If we are to add more other reloc types than R_ARM_ABS32, 8550 // we need to add check_non_pic(object, r_type) here. 8551 rel_dyn->add_local_relative(object, r_sym, elfcpp::R_ARM_RELATIVE, 8552 output_section, data_shndx, 8553 reloc.get_r_offset(), is_ifunc); 8554 } 8555 } 8556 break; 8557 8558 case elfcpp::R_ARM_ABS16: 8559 case elfcpp::R_ARM_ABS12: 8560 case elfcpp::R_ARM_THM_ABS5: 8561 case elfcpp::R_ARM_ABS8: 8562 case elfcpp::R_ARM_BASE_ABS: 8563 case elfcpp::R_ARM_MOVW_ABS_NC: 8564 case elfcpp::R_ARM_MOVT_ABS: 8565 case elfcpp::R_ARM_THM_MOVW_ABS_NC: 8566 case elfcpp::R_ARM_THM_MOVT_ABS: 8567 // If building a shared library (or a position-independent 8568 // executable), we need to create a dynamic relocation for 8569 // this location. Because the addend needs to remain in the 8570 // data section, we need to be careful not to apply this 8571 // relocation statically. 8572 if (parameters->options().output_is_position_independent()) 8573 { 8574 check_non_pic(object, r_type); 8575 Reloc_section* rel_dyn = target->rel_dyn_section(layout); 8576 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info()); 8577 if (lsym.get_st_type() != elfcpp::STT_SECTION) 8578 rel_dyn->add_local(object, r_sym, r_type, output_section, 8579 data_shndx, reloc.get_r_offset()); 8580 else 8581 { 8582 gold_assert(lsym.get_st_value() == 0); 8583 unsigned int shndx = lsym.get_st_shndx(); 8584 bool is_ordinary; 8585 shndx = object->adjust_sym_shndx(r_sym, shndx, 8586 &is_ordinary); 8587 if (!is_ordinary) 8588 object->error(_("section symbol %u has bad shndx %u"), 8589 r_sym, shndx); 8590 else 8591 rel_dyn->add_local_section(object, shndx, 8592 r_type, output_section, 8593 data_shndx, reloc.get_r_offset()); 8594 } 8595 } 8596 break; 8597 8598 case elfcpp::R_ARM_REL32: 8599 case elfcpp::R_ARM_LDR_PC_G0: 8600 case elfcpp::R_ARM_SBREL32: 8601 case elfcpp::R_ARM_THM_CALL: 8602 case elfcpp::R_ARM_THM_PC8: 8603 case elfcpp::R_ARM_BASE_PREL: 8604 case elfcpp::R_ARM_PLT32: 8605 case elfcpp::R_ARM_CALL: 8606 case elfcpp::R_ARM_JUMP24: 8607 case elfcpp::R_ARM_THM_JUMP24: 8608 case elfcpp::R_ARM_SBREL31: 8609 case elfcpp::R_ARM_PREL31: 8610 case elfcpp::R_ARM_MOVW_PREL_NC: 8611 case elfcpp::R_ARM_MOVT_PREL: 8612 case elfcpp::R_ARM_THM_MOVW_PREL_NC: 8613 case elfcpp::R_ARM_THM_MOVT_PREL: 8614 case elfcpp::R_ARM_THM_JUMP19: 8615 case elfcpp::R_ARM_THM_JUMP6: 8616 case elfcpp::R_ARM_THM_ALU_PREL_11_0: 8617 case elfcpp::R_ARM_THM_PC12: 8618 case elfcpp::R_ARM_REL32_NOI: 8619 case elfcpp::R_ARM_ALU_PC_G0_NC: 8620 case elfcpp::R_ARM_ALU_PC_G0: 8621 case elfcpp::R_ARM_ALU_PC_G1_NC: 8622 case elfcpp::R_ARM_ALU_PC_G1: 8623 case elfcpp::R_ARM_ALU_PC_G2: 8624 case elfcpp::R_ARM_LDR_PC_G1: 8625 case elfcpp::R_ARM_LDR_PC_G2: 8626 case elfcpp::R_ARM_LDRS_PC_G0: 8627 case elfcpp::R_ARM_LDRS_PC_G1: 8628 case elfcpp::R_ARM_LDRS_PC_G2: 8629 case elfcpp::R_ARM_LDC_PC_G0: 8630 case elfcpp::R_ARM_LDC_PC_G1: 8631 case elfcpp::R_ARM_LDC_PC_G2: 8632 case elfcpp::R_ARM_ALU_SB_G0_NC: 8633 case elfcpp::R_ARM_ALU_SB_G0: 8634 case elfcpp::R_ARM_ALU_SB_G1_NC: 8635 case elfcpp::R_ARM_ALU_SB_G1: 8636 case elfcpp::R_ARM_ALU_SB_G2: 8637 case elfcpp::R_ARM_LDR_SB_G0: 8638 case elfcpp::R_ARM_LDR_SB_G1: 8639 case elfcpp::R_ARM_LDR_SB_G2: 8640 case elfcpp::R_ARM_LDRS_SB_G0: 8641 case elfcpp::R_ARM_LDRS_SB_G1: 8642 case elfcpp::R_ARM_LDRS_SB_G2: 8643 case elfcpp::R_ARM_LDC_SB_G0: 8644 case elfcpp::R_ARM_LDC_SB_G1: 8645 case elfcpp::R_ARM_LDC_SB_G2: 8646 case elfcpp::R_ARM_MOVW_BREL_NC: 8647 case elfcpp::R_ARM_MOVT_BREL: 8648 case elfcpp::R_ARM_MOVW_BREL: 8649 case elfcpp::R_ARM_THM_MOVW_BREL_NC: 8650 case elfcpp::R_ARM_THM_MOVT_BREL: 8651 case elfcpp::R_ARM_THM_MOVW_BREL: 8652 case elfcpp::R_ARM_THM_JUMP11: 8653 case elfcpp::R_ARM_THM_JUMP8: 8654 // We don't need to do anything for a relative addressing relocation 8655 // against a local symbol if it does not reference the GOT. 8656 break; 8657 8658 case elfcpp::R_ARM_GOTOFF32: 8659 case elfcpp::R_ARM_GOTOFF12: 8660 // We need a GOT section: 8661 target->got_section(symtab, layout); 8662 break; 8663 8664 case elfcpp::R_ARM_GOT_BREL: 8665 case elfcpp::R_ARM_GOT_PREL: 8666 { 8667 // The symbol requires a GOT entry. 8668 Arm_output_data_got<big_endian>* got = 8669 target->got_section(symtab, layout); 8670 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info()); 8671 if (got->add_local(object, r_sym, GOT_TYPE_STANDARD)) 8672 { 8673 // If we are generating a shared object, we need to add a 8674 // dynamic RELATIVE relocation for this symbol's GOT entry. 8675 if (parameters->options().output_is_position_independent()) 8676 { 8677 unsigned int got_offset = 8678 object->local_got_offset(r_sym, GOT_TYPE_STANDARD); 8679 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info()); 8680 if (parameters->options().experimental_use_relr()) 8681 { 8682 Relr_section* relr_dyn = 8683 target->relr_dyn_section(layout); 8684 relr_dyn->add_local_relative(object, r_sym, 8685 got, got_offset); 8686 } 8687 else 8688 { 8689 Reloc_section* rel_dyn = target->rel_dyn_section(layout); 8690 rel_dyn->add_local_relative(object, r_sym, 8691 elfcpp::R_ARM_RELATIVE, 8692 got, got_offset); 8693 } 8694 } 8695 } 8696 } 8697 break; 8698 8699 case elfcpp::R_ARM_TARGET1: 8700 case elfcpp::R_ARM_TARGET2: 8701 // This should have been mapped to another type already. 8702 // Fall through. 8703 case elfcpp::R_ARM_COPY: 8704 case elfcpp::R_ARM_GLOB_DAT: 8705 case elfcpp::R_ARM_JUMP_SLOT: 8706 case elfcpp::R_ARM_RELATIVE: 8707 // These are relocations which should only be seen by the 8708 // dynamic linker, and should never be seen here. 8709 gold_error(_("%s: unexpected reloc %u in object file"), 8710 object->name().c_str(), r_type); 8711 break; 8712 8713 8714 // These are initial TLS relocs, which are expected when 8715 // linking. 8716 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic 8717 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic 8718 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic 8719 case elfcpp::R_ARM_TLS_IE32: // Initial-exec 8720 case elfcpp::R_ARM_TLS_LE32: // Local-exec 8721 { 8722 bool output_is_shared = parameters->options().shared(); 8723 const tls::Tls_optimization optimized_type 8724 = Target_arm<big_endian>::optimize_tls_reloc(!output_is_shared, 8725 r_type); 8726 switch (r_type) 8727 { 8728 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic 8729 if (optimized_type == tls::TLSOPT_NONE) 8730 { 8731 // Create a pair of GOT entries for the module index and 8732 // dtv-relative offset. 8733 Arm_output_data_got<big_endian>* got 8734 = target->got_section(symtab, layout); 8735 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info()); 8736 unsigned int shndx = lsym.get_st_shndx(); 8737 bool is_ordinary; 8738 shndx = object->adjust_sym_shndx(r_sym, shndx, &is_ordinary); 8739 if (!is_ordinary) 8740 { 8741 object->error(_("local symbol %u has bad shndx %u"), 8742 r_sym, shndx); 8743 break; 8744 } 8745 8746 if (!parameters->doing_static_link()) 8747 got->add_local_pair_with_rel(object, r_sym, shndx, 8748 GOT_TYPE_TLS_PAIR, 8749 target->rel_dyn_section(layout), 8750 elfcpp::R_ARM_TLS_DTPMOD32); 8751 else 8752 got->add_tls_gd32_with_static_reloc(GOT_TYPE_TLS_PAIR, 8753 object, r_sym); 8754 } 8755 else 8756 // FIXME: TLS optimization not supported yet. 8757 gold_unreachable(); 8758 break; 8759 8760 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic 8761 if (optimized_type == tls::TLSOPT_NONE) 8762 { 8763 // Create a GOT entry for the module index. 8764 target->got_mod_index_entry(symtab, layout, object); 8765 } 8766 else 8767 // FIXME: TLS optimization not supported yet. 8768 gold_unreachable(); 8769 break; 8770 8771 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic 8772 break; 8773 8774 case elfcpp::R_ARM_TLS_IE32: // Initial-exec 8775 layout->set_has_static_tls(); 8776 if (optimized_type == tls::TLSOPT_NONE) 8777 { 8778 // Create a GOT entry for the tp-relative offset. 8779 Arm_output_data_got<big_endian>* got 8780 = target->got_section(symtab, layout); 8781 unsigned int r_sym = 8782 elfcpp::elf_r_sym<32>(reloc.get_r_info()); 8783 if (!parameters->doing_static_link()) 8784 got->add_local_with_rel(object, r_sym, GOT_TYPE_TLS_OFFSET, 8785 target->rel_dyn_section(layout), 8786 elfcpp::R_ARM_TLS_TPOFF32); 8787 else if (!object->local_has_got_offset(r_sym, 8788 GOT_TYPE_TLS_OFFSET)) 8789 { 8790 got->add_local(object, r_sym, GOT_TYPE_TLS_OFFSET); 8791 unsigned int got_offset = 8792 object->local_got_offset(r_sym, GOT_TYPE_TLS_OFFSET); 8793 got->add_static_reloc(got_offset, 8794 elfcpp::R_ARM_TLS_TPOFF32, object, 8795 r_sym); 8796 } 8797 } 8798 else 8799 // FIXME: TLS optimization not supported yet. 8800 gold_unreachable(); 8801 break; 8802 8803 case elfcpp::R_ARM_TLS_LE32: // Local-exec 8804 layout->set_has_static_tls(); 8805 if (output_is_shared) 8806 { 8807 // We need to create a dynamic relocation. 8808 gold_assert(lsym.get_st_type() != elfcpp::STT_SECTION); 8809 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info()); 8810 Reloc_section* rel_dyn = target->rel_dyn_section(layout); 8811 rel_dyn->add_local(object, r_sym, elfcpp::R_ARM_TLS_TPOFF32, 8812 output_section, data_shndx, 8813 reloc.get_r_offset()); 8814 } 8815 break; 8816 8817 default: 8818 gold_unreachable(); 8819 } 8820 } 8821 break; 8822 8823 case elfcpp::R_ARM_PC24: 8824 case elfcpp::R_ARM_LDR_SBREL_11_0_NC: 8825 case elfcpp::R_ARM_ALU_SBREL_19_12_NC: 8826 case elfcpp::R_ARM_ALU_SBREL_27_20_CK: 8827 default: 8828 unsupported_reloc_local(object, r_type); 8829 break; 8830 } 8831 } 8832 8833 // Report an unsupported relocation against a global symbol. 8834 8835 template<bool big_endian> 8836 void 8837 Target_arm<big_endian>::Scan::unsupported_reloc_global( 8838 Sized_relobj_file<32, big_endian>* object, 8839 unsigned int r_type, 8840 Symbol* gsym) 8841 { 8842 gold_error(_("%s: unsupported reloc %u against global symbol %s"), 8843 object->name().c_str(), r_type, gsym->demangled_name().c_str()); 8844 } 8845 8846 template<bool big_endian> 8847 inline bool 8848 Target_arm<big_endian>::Scan::possible_function_pointer_reloc( 8849 unsigned int r_type) 8850 { 8851 switch (r_type) 8852 { 8853 case elfcpp::R_ARM_PC24: 8854 case elfcpp::R_ARM_THM_CALL: 8855 case elfcpp::R_ARM_PLT32: 8856 case elfcpp::R_ARM_CALL: 8857 case elfcpp::R_ARM_JUMP24: 8858 case elfcpp::R_ARM_THM_JUMP24: 8859 case elfcpp::R_ARM_SBREL31: 8860 case elfcpp::R_ARM_PREL31: 8861 case elfcpp::R_ARM_THM_JUMP19: 8862 case elfcpp::R_ARM_THM_JUMP6: 8863 case elfcpp::R_ARM_THM_JUMP11: 8864 case elfcpp::R_ARM_THM_JUMP8: 8865 // All the relocations above are branches except SBREL31 and PREL31. 8866 return false; 8867 8868 default: 8869 // Be conservative and assume this is a function pointer. 8870 return true; 8871 } 8872 } 8873 8874 template<bool big_endian> 8875 inline bool 8876 Target_arm<big_endian>::Scan::local_reloc_may_be_function_pointer( 8877 Symbol_table*, 8878 Layout*, 8879 Target_arm<big_endian>* target, 8880 Sized_relobj_file<32, big_endian>*, 8881 unsigned int, 8882 Output_section*, 8883 const elfcpp::Rel<32, big_endian>&, 8884 unsigned int r_type, 8885 const elfcpp::Sym<32, big_endian>&) 8886 { 8887 r_type = target->get_real_reloc_type(r_type); 8888 return possible_function_pointer_reloc(r_type); 8889 } 8890 8891 template<bool big_endian> 8892 inline bool 8893 Target_arm<big_endian>::Scan::global_reloc_may_be_function_pointer( 8894 Symbol_table*, 8895 Layout*, 8896 Target_arm<big_endian>* target, 8897 Sized_relobj_file<32, big_endian>*, 8898 unsigned int, 8899 Output_section*, 8900 const elfcpp::Rel<32, big_endian>&, 8901 unsigned int r_type, 8902 Symbol* gsym) 8903 { 8904 // GOT is not a function. 8905 if (strcmp(gsym->name(), "_GLOBAL_OFFSET_TABLE_") == 0) 8906 return false; 8907 8908 r_type = target->get_real_reloc_type(r_type); 8909 return possible_function_pointer_reloc(r_type); 8910 } 8911 8912 // Scan a relocation for a global symbol. 8913 8914 template<bool big_endian> 8915 inline void 8916 Target_arm<big_endian>::Scan::global(Symbol_table* symtab, 8917 Layout* layout, 8918 Target_arm* target, 8919 Sized_relobj_file<32, big_endian>* object, 8920 unsigned int data_shndx, 8921 Output_section* output_section, 8922 const elfcpp::Rel<32, big_endian>& reloc, 8923 unsigned int r_type, 8924 Symbol* gsym) 8925 { 8926 // A reference to _GLOBAL_OFFSET_TABLE_ implies that we need a got 8927 // section. We check here to avoid creating a dynamic reloc against 8928 // _GLOBAL_OFFSET_TABLE_. 8929 if (!target->has_got_section() 8930 && strcmp(gsym->name(), "_GLOBAL_OFFSET_TABLE_") == 0) 8931 target->got_section(symtab, layout); 8932 8933 // A STT_GNU_IFUNC symbol may require a PLT entry. 8934 if (gsym->type() == elfcpp::STT_GNU_IFUNC 8935 && this->reloc_needs_plt_for_ifunc(object, r_type)) 8936 target->make_plt_entry(symtab, layout, gsym); 8937 8938 r_type = get_real_reloc_type(r_type); 8939 switch (r_type) 8940 { 8941 case elfcpp::R_ARM_NONE: 8942 case elfcpp::R_ARM_V4BX: 8943 case elfcpp::R_ARM_GNU_VTENTRY: 8944 case elfcpp::R_ARM_GNU_VTINHERIT: 8945 break; 8946 8947 case elfcpp::R_ARM_ABS32: 8948 case elfcpp::R_ARM_ABS16: 8949 case elfcpp::R_ARM_ABS12: 8950 case elfcpp::R_ARM_THM_ABS5: 8951 case elfcpp::R_ARM_ABS8: 8952 case elfcpp::R_ARM_BASE_ABS: 8953 case elfcpp::R_ARM_MOVW_ABS_NC: 8954 case elfcpp::R_ARM_MOVT_ABS: 8955 case elfcpp::R_ARM_THM_MOVW_ABS_NC: 8956 case elfcpp::R_ARM_THM_MOVT_ABS: 8957 case elfcpp::R_ARM_ABS32_NOI: 8958 // Absolute addressing relocations. 8959 { 8960 // Make a PLT entry if necessary. 8961 if (this->symbol_needs_plt_entry(gsym)) 8962 { 8963 target->make_plt_entry(symtab, layout, gsym); 8964 // Since this is not a PC-relative relocation, we may be 8965 // taking the address of a function. In that case we need to 8966 // set the entry in the dynamic symbol table to the address of 8967 // the PLT entry. 8968 if (gsym->is_from_dynobj() && !parameters->options().shared()) 8969 gsym->set_needs_dynsym_value(); 8970 } 8971 // Make a dynamic relocation if necessary. 8972 if (gsym->needs_dynamic_reloc(Scan::get_reference_flags(r_type))) 8973 { 8974 if (!parameters->options().output_is_position_independent() 8975 && gsym->may_need_copy_reloc()) 8976 { 8977 target->copy_reloc(symtab, layout, object, 8978 data_shndx, output_section, gsym, reloc); 8979 } 8980 else if ((r_type == elfcpp::R_ARM_ABS32 8981 || r_type == elfcpp::R_ARM_ABS32_NOI) 8982 && gsym->type() == elfcpp::STT_GNU_IFUNC 8983 && gsym->can_use_relative_reloc(false) 8984 && !gsym->is_from_dynobj() 8985 && !gsym->is_undefined() 8986 && !gsym->is_preemptible()) 8987 { 8988 // Use an IRELATIVE reloc for a locally defined STT_GNU_IFUNC 8989 // symbol. This makes a function address in a PIE executable 8990 // match the address in a shared library that it links against. 8991 Reloc_section* rel_irelative = 8992 target->rel_irelative_section(layout); 8993 unsigned int r_type = elfcpp::R_ARM_IRELATIVE; 8994 rel_irelative->add_symbolless_global_addend( 8995 gsym, r_type, output_section, object, 8996 data_shndx, reloc.get_r_offset()); 8997 } 8998 else if ((r_type == elfcpp::R_ARM_ABS32 8999 || r_type == elfcpp::R_ARM_ABS32_NOI) 9000 && gsym->can_use_relative_reloc(false)) 9001 { 9002 if (parameters->options().experimental_use_relr()) 9003 { 9004 Relr_section* relr_dyn = 9005 target->relr_dyn_section(layout); 9006 relr_dyn->add_global_relative(gsym, output_section, 9007 object, data_shndx, 9008 reloc.get_r_offset()); 9009 } 9010 else 9011 { 9012 Reloc_section* rel_dyn = target->rel_dyn_section(layout); 9013 rel_dyn->add_global_relative(gsym, elfcpp::R_ARM_RELATIVE, 9014 output_section, object, 9015 data_shndx, 9016 reloc.get_r_offset()); 9017 } 9018 } 9019 else 9020 { 9021 check_non_pic(object, r_type); 9022 Reloc_section* rel_dyn = target->rel_dyn_section(layout); 9023 rel_dyn->add_global(gsym, r_type, output_section, object, 9024 data_shndx, reloc.get_r_offset()); 9025 } 9026 } 9027 } 9028 break; 9029 9030 case elfcpp::R_ARM_GOTOFF32: 9031 case elfcpp::R_ARM_GOTOFF12: 9032 // We need a GOT section. 9033 target->got_section(symtab, layout); 9034 break; 9035 9036 case elfcpp::R_ARM_REL32: 9037 case elfcpp::R_ARM_LDR_PC_G0: 9038 case elfcpp::R_ARM_SBREL32: 9039 case elfcpp::R_ARM_THM_PC8: 9040 case elfcpp::R_ARM_BASE_PREL: 9041 case elfcpp::R_ARM_MOVW_PREL_NC: 9042 case elfcpp::R_ARM_MOVT_PREL: 9043 case elfcpp::R_ARM_THM_MOVW_PREL_NC: 9044 case elfcpp::R_ARM_THM_MOVT_PREL: 9045 case elfcpp::R_ARM_THM_ALU_PREL_11_0: 9046 case elfcpp::R_ARM_THM_PC12: 9047 case elfcpp::R_ARM_REL32_NOI: 9048 case elfcpp::R_ARM_ALU_PC_G0_NC: 9049 case elfcpp::R_ARM_ALU_PC_G0: 9050 case elfcpp::R_ARM_ALU_PC_G1_NC: 9051 case elfcpp::R_ARM_ALU_PC_G1: 9052 case elfcpp::R_ARM_ALU_PC_G2: 9053 case elfcpp::R_ARM_LDR_PC_G1: 9054 case elfcpp::R_ARM_LDR_PC_G2: 9055 case elfcpp::R_ARM_LDRS_PC_G0: 9056 case elfcpp::R_ARM_LDRS_PC_G1: 9057 case elfcpp::R_ARM_LDRS_PC_G2: 9058 case elfcpp::R_ARM_LDC_PC_G0: 9059 case elfcpp::R_ARM_LDC_PC_G1: 9060 case elfcpp::R_ARM_LDC_PC_G2: 9061 case elfcpp::R_ARM_ALU_SB_G0_NC: 9062 case elfcpp::R_ARM_ALU_SB_G0: 9063 case elfcpp::R_ARM_ALU_SB_G1_NC: 9064 case elfcpp::R_ARM_ALU_SB_G1: 9065 case elfcpp::R_ARM_ALU_SB_G2: 9066 case elfcpp::R_ARM_LDR_SB_G0: 9067 case elfcpp::R_ARM_LDR_SB_G1: 9068 case elfcpp::R_ARM_LDR_SB_G2: 9069 case elfcpp::R_ARM_LDRS_SB_G0: 9070 case elfcpp::R_ARM_LDRS_SB_G1: 9071 case elfcpp::R_ARM_LDRS_SB_G2: 9072 case elfcpp::R_ARM_LDC_SB_G0: 9073 case elfcpp::R_ARM_LDC_SB_G1: 9074 case elfcpp::R_ARM_LDC_SB_G2: 9075 case elfcpp::R_ARM_MOVW_BREL_NC: 9076 case elfcpp::R_ARM_MOVT_BREL: 9077 case elfcpp::R_ARM_MOVW_BREL: 9078 case elfcpp::R_ARM_THM_MOVW_BREL_NC: 9079 case elfcpp::R_ARM_THM_MOVT_BREL: 9080 case elfcpp::R_ARM_THM_MOVW_BREL: 9081 // Relative addressing relocations. 9082 { 9083 // Make a dynamic relocation if necessary. 9084 if (gsym->needs_dynamic_reloc(Scan::get_reference_flags(r_type))) 9085 { 9086 if (parameters->options().output_is_executable() 9087 && target->may_need_copy_reloc(gsym)) 9088 { 9089 target->copy_reloc(symtab, layout, object, 9090 data_shndx, output_section, gsym, reloc); 9091 } 9092 else 9093 { 9094 check_non_pic(object, r_type); 9095 Reloc_section* rel_dyn = target->rel_dyn_section(layout); 9096 rel_dyn->add_global(gsym, r_type, output_section, object, 9097 data_shndx, reloc.get_r_offset()); 9098 } 9099 } 9100 } 9101 break; 9102 9103 case elfcpp::R_ARM_THM_CALL: 9104 case elfcpp::R_ARM_PLT32: 9105 case elfcpp::R_ARM_CALL: 9106 case elfcpp::R_ARM_JUMP24: 9107 case elfcpp::R_ARM_THM_JUMP24: 9108 case elfcpp::R_ARM_SBREL31: 9109 case elfcpp::R_ARM_PREL31: 9110 case elfcpp::R_ARM_THM_JUMP19: 9111 case elfcpp::R_ARM_THM_JUMP6: 9112 case elfcpp::R_ARM_THM_JUMP11: 9113 case elfcpp::R_ARM_THM_JUMP8: 9114 // All the relocation above are branches except for the PREL31 ones. 9115 // A PREL31 relocation can point to a personality function in a shared 9116 // library. In that case we want to use a PLT because we want to 9117 // call the personality routine and the dynamic linkers we care about 9118 // do not support dynamic PREL31 relocations. An REL31 relocation may 9119 // point to a function whose unwinding behaviour is being described but 9120 // we will not mistakenly generate a PLT for that because we should use 9121 // a local section symbol. 9122 9123 // If the symbol is fully resolved, this is just a relative 9124 // local reloc. Otherwise we need a PLT entry. 9125 if (gsym->final_value_is_known()) 9126 break; 9127 // If building a shared library, we can also skip the PLT entry 9128 // if the symbol is defined in the output file and is protected 9129 // or hidden. 9130 if (gsym->is_defined() 9131 && !gsym->is_from_dynobj() 9132 && !gsym->is_preemptible()) 9133 break; 9134 target->make_plt_entry(symtab, layout, gsym); 9135 break; 9136 9137 case elfcpp::R_ARM_GOT_BREL: 9138 case elfcpp::R_ARM_GOT_ABS: 9139 case elfcpp::R_ARM_GOT_PREL: 9140 { 9141 // The symbol requires a GOT entry. 9142 Arm_output_data_got<big_endian>* got = 9143 target->got_section(symtab, layout); 9144 if (gsym->final_value_is_known()) 9145 { 9146 // For a STT_GNU_IFUNC symbol we want the PLT address. 9147 if (gsym->type() == elfcpp::STT_GNU_IFUNC) 9148 got->add_global_plt(gsym, GOT_TYPE_STANDARD); 9149 else 9150 got->add_global(gsym, GOT_TYPE_STANDARD); 9151 } 9152 else 9153 { 9154 // If this symbol is not fully resolved, we need to add a 9155 // GOT entry with a dynamic relocation. 9156 Reloc_section* rel_dyn = target->rel_dyn_section(layout); 9157 if (gsym->is_from_dynobj() 9158 || gsym->is_undefined() 9159 || gsym->is_preemptible() 9160 || (gsym->visibility() == elfcpp::STV_PROTECTED 9161 && parameters->options().shared()) 9162 || (gsym->type() == elfcpp::STT_GNU_IFUNC 9163 && parameters->options().output_is_position_independent())) 9164 got->add_global_with_rel(gsym, GOT_TYPE_STANDARD, 9165 rel_dyn, elfcpp::R_ARM_GLOB_DAT); 9166 else 9167 { 9168 // For a STT_GNU_IFUNC symbol we want to write the PLT 9169 // offset into the GOT, so that function pointer 9170 // comparisons work correctly. 9171 bool is_new; 9172 if (gsym->type() != elfcpp::STT_GNU_IFUNC) 9173 is_new = got->add_global(gsym, GOT_TYPE_STANDARD); 9174 else 9175 { 9176 is_new = got->add_global_plt(gsym, GOT_TYPE_STANDARD); 9177 // Tell the dynamic linker to use the PLT address 9178 // when resolving relocations. 9179 if (gsym->is_from_dynobj() 9180 && !parameters->options().shared()) 9181 gsym->set_needs_dynsym_value(); 9182 } 9183 if (is_new) 9184 { 9185 unsigned int got_off = gsym->got_offset(GOT_TYPE_STANDARD); 9186 if (parameters->options().experimental_use_relr()) 9187 { 9188 Relr_section* relr_dyn = 9189 target->relr_dyn_section(layout); 9190 relr_dyn->add_global_relative(gsym, got, got_off); 9191 } 9192 else 9193 { 9194 rel_dyn->add_global_relative(gsym, 9195 elfcpp::R_ARM_RELATIVE, 9196 got, got_off); 9197 } 9198 } 9199 } 9200 } 9201 } 9202 break; 9203 9204 case elfcpp::R_ARM_TARGET1: 9205 case elfcpp::R_ARM_TARGET2: 9206 // These should have been mapped to other types already. 9207 // Fall through. 9208 case elfcpp::R_ARM_COPY: 9209 case elfcpp::R_ARM_GLOB_DAT: 9210 case elfcpp::R_ARM_JUMP_SLOT: 9211 case elfcpp::R_ARM_RELATIVE: 9212 // These are relocations which should only be seen by the 9213 // dynamic linker, and should never be seen here. 9214 gold_error(_("%s: unexpected reloc %u in object file"), 9215 object->name().c_str(), r_type); 9216 break; 9217 9218 // These are initial tls relocs, which are expected when 9219 // linking. 9220 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic 9221 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic 9222 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic 9223 case elfcpp::R_ARM_TLS_IE32: // Initial-exec 9224 case elfcpp::R_ARM_TLS_LE32: // Local-exec 9225 { 9226 const bool is_final = gsym->final_value_is_known(); 9227 const tls::Tls_optimization optimized_type 9228 = Target_arm<big_endian>::optimize_tls_reloc(is_final, r_type); 9229 switch (r_type) 9230 { 9231 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic 9232 if (optimized_type == tls::TLSOPT_NONE) 9233 { 9234 // Create a pair of GOT entries for the module index and 9235 // dtv-relative offset. 9236 Arm_output_data_got<big_endian>* got 9237 = target->got_section(symtab, layout); 9238 if (!parameters->doing_static_link()) 9239 got->add_global_pair_with_rel(gsym, GOT_TYPE_TLS_PAIR, 9240 target->rel_dyn_section(layout), 9241 elfcpp::R_ARM_TLS_DTPMOD32, 9242 elfcpp::R_ARM_TLS_DTPOFF32); 9243 else 9244 got->add_tls_gd32_with_static_reloc(GOT_TYPE_TLS_PAIR, gsym); 9245 } 9246 else 9247 // FIXME: TLS optimization not supported yet. 9248 gold_unreachable(); 9249 break; 9250 9251 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic 9252 if (optimized_type == tls::TLSOPT_NONE) 9253 { 9254 // Create a GOT entry for the module index. 9255 target->got_mod_index_entry(symtab, layout, object); 9256 } 9257 else 9258 // FIXME: TLS optimization not supported yet. 9259 gold_unreachable(); 9260 break; 9261 9262 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic 9263 break; 9264 9265 case elfcpp::R_ARM_TLS_IE32: // Initial-exec 9266 layout->set_has_static_tls(); 9267 if (optimized_type == tls::TLSOPT_NONE) 9268 { 9269 // Create a GOT entry for the tp-relative offset. 9270 Arm_output_data_got<big_endian>* got 9271 = target->got_section(symtab, layout); 9272 if (!parameters->doing_static_link()) 9273 got->add_global_with_rel(gsym, GOT_TYPE_TLS_OFFSET, 9274 target->rel_dyn_section(layout), 9275 elfcpp::R_ARM_TLS_TPOFF32); 9276 else if (!gsym->has_got_offset(GOT_TYPE_TLS_OFFSET)) 9277 { 9278 got->add_global(gsym, GOT_TYPE_TLS_OFFSET); 9279 unsigned int got_offset = 9280 gsym->got_offset(GOT_TYPE_TLS_OFFSET); 9281 got->add_static_reloc(got_offset, 9282 elfcpp::R_ARM_TLS_TPOFF32, gsym); 9283 } 9284 } 9285 else 9286 // FIXME: TLS optimization not supported yet. 9287 gold_unreachable(); 9288 break; 9289 9290 case elfcpp::R_ARM_TLS_LE32: // Local-exec 9291 layout->set_has_static_tls(); 9292 if (parameters->options().shared()) 9293 { 9294 // We need to create a dynamic relocation. 9295 Reloc_section* rel_dyn = target->rel_dyn_section(layout); 9296 rel_dyn->add_global(gsym, elfcpp::R_ARM_TLS_TPOFF32, 9297 output_section, object, 9298 data_shndx, reloc.get_r_offset()); 9299 } 9300 break; 9301 9302 default: 9303 gold_unreachable(); 9304 } 9305 } 9306 break; 9307 9308 case elfcpp::R_ARM_PC24: 9309 case elfcpp::R_ARM_LDR_SBREL_11_0_NC: 9310 case elfcpp::R_ARM_ALU_SBREL_19_12_NC: 9311 case elfcpp::R_ARM_ALU_SBREL_27_20_CK: 9312 default: 9313 unsupported_reloc_global(object, r_type, gsym); 9314 break; 9315 } 9316 } 9317 9318 // Process relocations for gc. 9319 9320 template<bool big_endian> 9321 void 9322 Target_arm<big_endian>::gc_process_relocs( 9323 Symbol_table* symtab, 9324 Layout* layout, 9325 Sized_relobj_file<32, big_endian>* object, 9326 unsigned int data_shndx, 9327 unsigned int, 9328 const unsigned char* prelocs, 9329 size_t reloc_count, 9330 Output_section* output_section, 9331 bool needs_special_offset_handling, 9332 size_t local_symbol_count, 9333 const unsigned char* plocal_symbols) 9334 { 9335 typedef Target_arm<big_endian> Arm; 9336 typedef typename Target_arm<big_endian>::Scan Scan; 9337 9338 gold::gc_process_relocs<32, big_endian, Arm, Scan, Classify_reloc>( 9339 symtab, 9340 layout, 9341 this, 9342 object, 9343 data_shndx, 9344 prelocs, 9345 reloc_count, 9346 output_section, 9347 needs_special_offset_handling, 9348 local_symbol_count, 9349 plocal_symbols); 9350 } 9351 9352 // Scan relocations for a section. 9353 9354 template<bool big_endian> 9355 void 9356 Target_arm<big_endian>::scan_relocs(Symbol_table* symtab, 9357 Layout* layout, 9358 Sized_relobj_file<32, big_endian>* object, 9359 unsigned int data_shndx, 9360 unsigned int sh_type, 9361 const unsigned char* prelocs, 9362 size_t reloc_count, 9363 Output_section* output_section, 9364 bool needs_special_offset_handling, 9365 size_t local_symbol_count, 9366 const unsigned char* plocal_symbols) 9367 { 9368 if (sh_type == elfcpp::SHT_RELA) 9369 { 9370 gold_error(_("%s: unsupported RELA reloc section"), 9371 object->name().c_str()); 9372 return; 9373 } 9374 9375 gold::scan_relocs<32, big_endian, Target_arm, Scan, Classify_reloc>( 9376 symtab, 9377 layout, 9378 this, 9379 object, 9380 data_shndx, 9381 prelocs, 9382 reloc_count, 9383 output_section, 9384 needs_special_offset_handling, 9385 local_symbol_count, 9386 plocal_symbols); 9387 } 9388 9389 // Finalize the sections. 9390 9391 template<bool big_endian> 9392 void 9393 Target_arm<big_endian>::do_finalize_sections( 9394 Layout* layout, 9395 const Input_objects* input_objects, 9396 Symbol_table*) 9397 { 9398 bool merged_any_attributes = false; 9399 // Merge processor-specific flags. 9400 for (Input_objects::Relobj_iterator p = input_objects->relobj_begin(); 9401 p != input_objects->relobj_end(); 9402 ++p) 9403 { 9404 Arm_relobj<big_endian>* arm_relobj = 9405 Arm_relobj<big_endian>::as_arm_relobj(*p); 9406 if (arm_relobj->merge_flags_and_attributes()) 9407 { 9408 this->merge_processor_specific_flags( 9409 arm_relobj->name(), 9410 arm_relobj->processor_specific_flags()); 9411 this->merge_object_attributes(arm_relobj->name().c_str(), 9412 arm_relobj->attributes_section_data()); 9413 merged_any_attributes = true; 9414 } 9415 } 9416 9417 for (Input_objects::Dynobj_iterator p = input_objects->dynobj_begin(); 9418 p != input_objects->dynobj_end(); 9419 ++p) 9420 { 9421 Arm_dynobj<big_endian>* arm_dynobj = 9422 Arm_dynobj<big_endian>::as_arm_dynobj(*p); 9423 this->merge_processor_specific_flags( 9424 arm_dynobj->name(), 9425 arm_dynobj->processor_specific_flags()); 9426 this->merge_object_attributes(arm_dynobj->name().c_str(), 9427 arm_dynobj->attributes_section_data()); 9428 merged_any_attributes = true; 9429 } 9430 9431 // Create an empty uninitialized attribute section if we still don't have it 9432 // at this moment. This happens if there is no attributes sections in all 9433 // inputs. 9434 if (this->attributes_section_data_ == NULL) 9435 this->attributes_section_data_ = new Attributes_section_data(NULL, 0); 9436 9437 const Object_attribute* cpu_arch_attr = 9438 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch); 9439 // Check if we need to use Cortex-A8 workaround. 9440 if (parameters->options().user_set_fix_cortex_a8()) 9441 this->fix_cortex_a8_ = parameters->options().fix_cortex_a8(); 9442 else 9443 { 9444 // If neither --fix-cortex-a8 nor --no-fix-cortex-a8 is used, turn on 9445 // Cortex-A8 erratum workaround for ARMv7-A or ARMv7 with unknown 9446 // profile. 9447 const Object_attribute* cpu_arch_profile_attr = 9448 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile); 9449 this->fix_cortex_a8_ = 9450 (cpu_arch_attr->int_value() == elfcpp::TAG_CPU_ARCH_V7 9451 && (cpu_arch_profile_attr->int_value() == 'A' 9452 || cpu_arch_profile_attr->int_value() == 0)); 9453 } 9454 9455 // Check if we can use V4BX interworking. 9456 // The V4BX interworking stub contains BX instruction, 9457 // which is not specified for some profiles. 9458 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING 9459 && !this->may_use_v4t_interworking()) 9460 gold_error(_("unable to provide V4BX reloc interworking fix up; " 9461 "the target profile does not support BX instruction")); 9462 9463 // Fill in some more dynamic tags. 9464 const Reloc_section* rel_plt = (this->plt_ == NULL 9465 ? NULL 9466 : this->plt_->rel_plt()); 9467 layout->add_target_dynamic_tags(true, this->got_plt_, rel_plt, 9468 this->rel_dyn_, true, false, 9469 this->relr_dyn_); 9470 9471 // Emit any relocs we saved in an attempt to avoid generating COPY 9472 // relocs. 9473 if (this->copy_relocs_.any_saved_relocs()) 9474 this->copy_relocs_.emit(this->rel_dyn_section(layout)); 9475 9476 // Handle the .ARM.exidx section. 9477 Output_section* exidx_section = layout->find_output_section(".ARM.exidx"); 9478 9479 if (!parameters->options().relocatable()) 9480 { 9481 if (exidx_section != NULL 9482 && exidx_section->type() == elfcpp::SHT_ARM_EXIDX) 9483 { 9484 // For the ARM target, we need to add a PT_ARM_EXIDX segment for 9485 // the .ARM.exidx section. 9486 if (!layout->script_options()->saw_phdrs_clause()) 9487 { 9488 gold_assert(layout->find_output_segment(elfcpp::PT_ARM_EXIDX, 0, 9489 0) 9490 == NULL); 9491 Output_segment* exidx_segment = 9492 layout->make_output_segment(elfcpp::PT_ARM_EXIDX, elfcpp::PF_R); 9493 exidx_segment->add_output_section_to_nonload(exidx_section, 9494 elfcpp::PF_R); 9495 } 9496 } 9497 } 9498 9499 // Create an .ARM.attributes section if we have merged any attributes 9500 // from inputs. 9501 if (merged_any_attributes) 9502 { 9503 Output_attributes_section_data* attributes_section = 9504 new Output_attributes_section_data(*this->attributes_section_data_); 9505 layout->add_output_section_data(".ARM.attributes", 9506 elfcpp::SHT_ARM_ATTRIBUTES, 0, 9507 attributes_section, ORDER_INVALID, 9508 false); 9509 } 9510 9511 // Fix up links in section EXIDX headers. 9512 for (Layout::Section_list::const_iterator p = layout->section_list().begin(); 9513 p != layout->section_list().end(); 9514 ++p) 9515 if ((*p)->type() == elfcpp::SHT_ARM_EXIDX) 9516 { 9517 Arm_output_section<big_endian>* os = 9518 Arm_output_section<big_endian>::as_arm_output_section(*p); 9519 os->set_exidx_section_link(); 9520 } 9521 } 9522 9523 // Return whether a direct absolute static relocation needs to be applied. 9524 // In cases where Scan::local() or Scan::global() has created 9525 // a dynamic relocation other than R_ARM_RELATIVE, the addend 9526 // of the relocation is carried in the data, and we must not 9527 // apply the static relocation. 9528 9529 template<bool big_endian> 9530 inline bool 9531 Target_arm<big_endian>::Relocate::should_apply_static_reloc( 9532 const Sized_symbol<32>* gsym, 9533 unsigned int r_type, 9534 bool is_32bit, 9535 Output_section* output_section) 9536 { 9537 // If the output section is not allocated, then we didn't call 9538 // scan_relocs, we didn't create a dynamic reloc, and we must apply 9539 // the reloc here. 9540 if ((output_section->flags() & elfcpp::SHF_ALLOC) == 0) 9541 return true; 9542 9543 int ref_flags = Scan::get_reference_flags(r_type); 9544 9545 // For local symbols, we will have created a non-RELATIVE dynamic 9546 // relocation only if (a) the output is position independent, 9547 // (b) the relocation is absolute (not pc- or segment-relative), and 9548 // (c) the relocation is not 32 bits wide. 9549 if (gsym == NULL) 9550 return !(parameters->options().output_is_position_independent() 9551 && (ref_flags & Symbol::ABSOLUTE_REF) 9552 && !is_32bit); 9553 9554 // For global symbols, we use the same helper routines used in the 9555 // scan pass. If we did not create a dynamic relocation, or if we 9556 // created a RELATIVE dynamic relocation, we should apply the static 9557 // relocation. 9558 bool has_dyn = gsym->needs_dynamic_reloc(ref_flags); 9559 bool is_rel = (ref_flags & Symbol::ABSOLUTE_REF) 9560 && gsym->can_use_relative_reloc(ref_flags 9561 & Symbol::FUNCTION_CALL); 9562 return !has_dyn || is_rel; 9563 } 9564 9565 // Perform a relocation. 9566 9567 template<bool big_endian> 9568 inline bool 9569 Target_arm<big_endian>::Relocate::relocate( 9570 const Relocate_info<32, big_endian>* relinfo, 9571 unsigned int, 9572 Target_arm* target, 9573 Output_section* output_section, 9574 size_t relnum, 9575 const unsigned char* preloc, 9576 const Sized_symbol<32>* gsym, 9577 const Symbol_value<32>* psymval, 9578 unsigned char* view, 9579 Arm_address address, 9580 section_size_type view_size) 9581 { 9582 if (view == NULL) 9583 return true; 9584 9585 typedef Arm_relocate_functions<big_endian> Arm_relocate_functions; 9586 9587 const elfcpp::Rel<32, big_endian> rel(preloc); 9588 unsigned int r_type = elfcpp::elf_r_type<32>(rel.get_r_info()); 9589 r_type = get_real_reloc_type(r_type); 9590 const Arm_reloc_property* reloc_property = 9591 arm_reloc_property_table->get_implemented_static_reloc_property(r_type); 9592 if (reloc_property == NULL) 9593 { 9594 std::string reloc_name = 9595 arm_reloc_property_table->reloc_name_in_error_message(r_type); 9596 gold_error_at_location(relinfo, relnum, rel.get_r_offset(), 9597 _("cannot relocate %s in object file"), 9598 reloc_name.c_str()); 9599 return true; 9600 } 9601 9602 const Arm_relobj<big_endian>* object = 9603 Arm_relobj<big_endian>::as_arm_relobj(relinfo->object); 9604 9605 // If the final branch target of a relocation is THUMB instruction, this 9606 // is 1. Otherwise it is 0. 9607 Arm_address thumb_bit = 0; 9608 Symbol_value<32> symval; 9609 bool is_weakly_undefined_without_plt = false; 9610 bool have_got_offset = false; 9611 unsigned int got_offset = 0; 9612 9613 // If the relocation uses the GOT entry of a symbol instead of the symbol 9614 // itself, we don't care about whether the symbol is defined or what kind 9615 // of symbol it is. 9616 if (reloc_property->uses_got_entry()) 9617 { 9618 // Get the GOT offset. 9619 // The GOT pointer points to the end of the GOT section. 9620 // We need to subtract the size of the GOT section to get 9621 // the actual offset to use in the relocation. 9622 // TODO: We should move GOT offset computing code in TLS relocations 9623 // to here. 9624 switch (r_type) 9625 { 9626 case elfcpp::R_ARM_GOT_BREL: 9627 case elfcpp::R_ARM_GOT_PREL: 9628 if (gsym != NULL) 9629 { 9630 gold_assert(gsym->has_got_offset(GOT_TYPE_STANDARD)); 9631 got_offset = (gsym->got_offset(GOT_TYPE_STANDARD) 9632 - target->got_size()); 9633 } 9634 else 9635 { 9636 unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info()); 9637 gold_assert(object->local_has_got_offset(r_sym, 9638 GOT_TYPE_STANDARD)); 9639 got_offset = (object->local_got_offset(r_sym, GOT_TYPE_STANDARD) 9640 - target->got_size()); 9641 } 9642 have_got_offset = true; 9643 break; 9644 9645 default: 9646 break; 9647 } 9648 } 9649 else if (relnum != Target_arm<big_endian>::fake_relnum_for_stubs) 9650 { 9651 if (gsym != NULL) 9652 { 9653 // This is a global symbol. Determine if we use PLT and if the 9654 // final target is THUMB. 9655 if (gsym->use_plt_offset(Scan::get_reference_flags(r_type))) 9656 { 9657 // This uses a PLT, change the symbol value. 9658 symval.set_output_value(target->plt_address_for_global(gsym)); 9659 psymval = &symval; 9660 } 9661 else if (gsym->is_weak_undefined()) 9662 { 9663 // This is a weakly undefined symbol and we do not use PLT 9664 // for this relocation. A branch targeting this symbol will 9665 // be converted into an NOP. 9666 is_weakly_undefined_without_plt = true; 9667 } 9668 else if (gsym->is_undefined() && reloc_property->uses_symbol()) 9669 { 9670 // This relocation uses the symbol value but the symbol is 9671 // undefined. Exit early and have the caller reporting an 9672 // error. 9673 return true; 9674 } 9675 else 9676 { 9677 // Set thumb bit if symbol: 9678 // -Has type STT_ARM_TFUNC or 9679 // -Has type STT_FUNC, is defined and with LSB in value set. 9680 thumb_bit = 9681 (((gsym->type() == elfcpp::STT_ARM_TFUNC) 9682 || (gsym->type() == elfcpp::STT_FUNC 9683 && !gsym->is_undefined() 9684 && ((psymval->value(object, 0) & 1) != 0))) 9685 ? 1 9686 : 0); 9687 } 9688 } 9689 else 9690 { 9691 // This is a local symbol. Determine if the final target is THUMB. 9692 // We saved this information when all the local symbols were read. 9693 elfcpp::Elf_types<32>::Elf_WXword r_info = rel.get_r_info(); 9694 unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info); 9695 thumb_bit = object->local_symbol_is_thumb_function(r_sym) ? 1 : 0; 9696 9697 if (psymval->is_ifunc_symbol() && object->local_has_plt_offset(r_sym)) 9698 { 9699 symval.set_output_value( 9700 target->plt_address_for_local(object, r_sym)); 9701 psymval = &symval; 9702 } 9703 } 9704 } 9705 else 9706 { 9707 // This is a fake relocation synthesized for a stub. It does not have 9708 // a real symbol. We just look at the LSB of the symbol value to 9709 // determine if the target is THUMB or not. 9710 thumb_bit = ((psymval->value(object, 0) & 1) != 0); 9711 } 9712 9713 // Strip LSB if this points to a THUMB target. 9714 if (thumb_bit != 0 9715 && reloc_property->uses_thumb_bit() 9716 && ((psymval->value(object, 0) & 1) != 0)) 9717 { 9718 Arm_address stripped_value = 9719 psymval->value(object, 0) & ~static_cast<Arm_address>(1); 9720 symval.set_output_value(stripped_value); 9721 psymval = &symval; 9722 } 9723 9724 // To look up relocation stubs, we need to pass the symbol table index of 9725 // a local symbol. 9726 unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info()); 9727 9728 // Get the addressing origin of the output segment defining the 9729 // symbol gsym if needed (AAELF 4.6.1.2 Relocation types). 9730 Arm_address sym_origin = 0; 9731 if (reloc_property->uses_symbol_base()) 9732 { 9733 if (r_type == elfcpp::R_ARM_BASE_ABS && gsym == NULL) 9734 // R_ARM_BASE_ABS with the NULL symbol will give the 9735 // absolute address of the GOT origin (GOT_ORG) (see ARM IHI 9736 // 0044C (AAELF): 4.6.1.8 Proxy generating relocations). 9737 sym_origin = target->got_plt_section()->address(); 9738 else if (gsym == NULL) 9739 sym_origin = 0; 9740 else if (gsym->source() == Symbol::IN_OUTPUT_SEGMENT) 9741 sym_origin = gsym->output_segment()->vaddr(); 9742 else if (gsym->source() == Symbol::IN_OUTPUT_DATA) 9743 sym_origin = gsym->output_data()->address(); 9744 9745 // TODO: Assumes the segment base to be zero for the global symbols 9746 // till the proper support for the segment-base-relative addressing 9747 // will be implemented. This is consistent with GNU ld. 9748 } 9749 9750 // For relative addressing relocation, find out the relative address base. 9751 Arm_address relative_address_base = 0; 9752 switch(reloc_property->relative_address_base()) 9753 { 9754 case Arm_reloc_property::RAB_NONE: 9755 // Relocations with relative address bases RAB_TLS and RAB_tp are 9756 // handled by relocate_tls. So we do not need to do anything here. 9757 case Arm_reloc_property::RAB_TLS: 9758 case Arm_reloc_property::RAB_tp: 9759 break; 9760 case Arm_reloc_property::RAB_B_S: 9761 relative_address_base = sym_origin; 9762 break; 9763 case Arm_reloc_property::RAB_GOT_ORG: 9764 relative_address_base = target->got_plt_section()->address(); 9765 break; 9766 case Arm_reloc_property::RAB_P: 9767 relative_address_base = address; 9768 break; 9769 case Arm_reloc_property::RAB_Pa: 9770 relative_address_base = address & 0xfffffffcU; 9771 break; 9772 default: 9773 gold_unreachable(); 9774 } 9775 9776 typename Arm_relocate_functions::Status reloc_status = 9777 Arm_relocate_functions::STATUS_OKAY; 9778 bool check_overflow = reloc_property->checks_overflow(); 9779 switch (r_type) 9780 { 9781 case elfcpp::R_ARM_NONE: 9782 break; 9783 9784 case elfcpp::R_ARM_ABS8: 9785 if (should_apply_static_reloc(gsym, r_type, false, output_section)) 9786 reloc_status = Arm_relocate_functions::abs8(view, object, psymval); 9787 break; 9788 9789 case elfcpp::R_ARM_ABS12: 9790 if (should_apply_static_reloc(gsym, r_type, false, output_section)) 9791 reloc_status = Arm_relocate_functions::abs12(view, object, psymval); 9792 break; 9793 9794 case elfcpp::R_ARM_ABS16: 9795 if (should_apply_static_reloc(gsym, r_type, false, output_section)) 9796 reloc_status = Arm_relocate_functions::abs16(view, object, psymval); 9797 break; 9798 9799 case elfcpp::R_ARM_ABS32: 9800 if (should_apply_static_reloc(gsym, r_type, true, output_section)) 9801 reloc_status = Arm_relocate_functions::abs32(view, object, psymval, 9802 thumb_bit); 9803 break; 9804 9805 case elfcpp::R_ARM_ABS32_NOI: 9806 if (should_apply_static_reloc(gsym, r_type, true, output_section)) 9807 // No thumb bit for this relocation: (S + A) 9808 reloc_status = Arm_relocate_functions::abs32(view, object, psymval, 9809 0); 9810 break; 9811 9812 case elfcpp::R_ARM_MOVW_ABS_NC: 9813 if (should_apply_static_reloc(gsym, r_type, false, output_section)) 9814 reloc_status = Arm_relocate_functions::movw(view, object, psymval, 9815 0, thumb_bit, 9816 check_overflow); 9817 break; 9818 9819 case elfcpp::R_ARM_MOVT_ABS: 9820 if (should_apply_static_reloc(gsym, r_type, false, output_section)) 9821 reloc_status = Arm_relocate_functions::movt(view, object, psymval, 0); 9822 break; 9823 9824 case elfcpp::R_ARM_THM_MOVW_ABS_NC: 9825 if (should_apply_static_reloc(gsym, r_type, false, output_section)) 9826 reloc_status = Arm_relocate_functions::thm_movw(view, object, psymval, 9827 0, thumb_bit, false); 9828 break; 9829 9830 case elfcpp::R_ARM_THM_MOVT_ABS: 9831 if (should_apply_static_reloc(gsym, r_type, false, output_section)) 9832 reloc_status = Arm_relocate_functions::thm_movt(view, object, 9833 psymval, 0); 9834 break; 9835 9836 case elfcpp::R_ARM_MOVW_PREL_NC: 9837 case elfcpp::R_ARM_MOVW_BREL_NC: 9838 case elfcpp::R_ARM_MOVW_BREL: 9839 reloc_status = 9840 Arm_relocate_functions::movw(view, object, psymval, 9841 relative_address_base, thumb_bit, 9842 check_overflow); 9843 break; 9844 9845 case elfcpp::R_ARM_MOVT_PREL: 9846 case elfcpp::R_ARM_MOVT_BREL: 9847 reloc_status = 9848 Arm_relocate_functions::movt(view, object, psymval, 9849 relative_address_base); 9850 break; 9851 9852 case elfcpp::R_ARM_THM_MOVW_PREL_NC: 9853 case elfcpp::R_ARM_THM_MOVW_BREL_NC: 9854 case elfcpp::R_ARM_THM_MOVW_BREL: 9855 reloc_status = 9856 Arm_relocate_functions::thm_movw(view, object, psymval, 9857 relative_address_base, 9858 thumb_bit, check_overflow); 9859 break; 9860 9861 case elfcpp::R_ARM_THM_MOVT_PREL: 9862 case elfcpp::R_ARM_THM_MOVT_BREL: 9863 reloc_status = 9864 Arm_relocate_functions::thm_movt(view, object, psymval, 9865 relative_address_base); 9866 break; 9867 9868 case elfcpp::R_ARM_REL32: 9869 reloc_status = Arm_relocate_functions::rel32(view, object, psymval, 9870 address, thumb_bit); 9871 break; 9872 9873 case elfcpp::R_ARM_THM_ABS5: 9874 if (should_apply_static_reloc(gsym, r_type, false, output_section)) 9875 reloc_status = Arm_relocate_functions::thm_abs5(view, object, psymval); 9876 break; 9877 9878 // Thumb long branches. 9879 case elfcpp::R_ARM_THM_CALL: 9880 case elfcpp::R_ARM_THM_XPC22: 9881 case elfcpp::R_ARM_THM_JUMP24: 9882 reloc_status = 9883 Arm_relocate_functions::thumb_branch_common( 9884 r_type, relinfo, view, gsym, object, r_sym, psymval, address, 9885 thumb_bit, is_weakly_undefined_without_plt); 9886 break; 9887 9888 case elfcpp::R_ARM_GOTOFF32: 9889 { 9890 Arm_address got_origin; 9891 got_origin = target->got_plt_section()->address(); 9892 reloc_status = Arm_relocate_functions::rel32(view, object, psymval, 9893 got_origin, thumb_bit); 9894 } 9895 break; 9896 9897 case elfcpp::R_ARM_BASE_PREL: 9898 gold_assert(gsym != NULL); 9899 reloc_status = 9900 Arm_relocate_functions::base_prel(view, sym_origin, address); 9901 break; 9902 9903 case elfcpp::R_ARM_BASE_ABS: 9904 if (should_apply_static_reloc(gsym, r_type, false, output_section)) 9905 reloc_status = Arm_relocate_functions::base_abs(view, sym_origin); 9906 break; 9907 9908 case elfcpp::R_ARM_GOT_BREL: 9909 gold_assert(have_got_offset); 9910 reloc_status = Arm_relocate_functions::got_brel(view, got_offset); 9911 break; 9912 9913 case elfcpp::R_ARM_GOT_PREL: 9914 gold_assert(have_got_offset); 9915 // Get the address origin for GOT PLT, which is allocated right 9916 // after the GOT section, to calculate an absolute address of 9917 // the symbol GOT entry (got_origin + got_offset). 9918 Arm_address got_origin; 9919 got_origin = target->got_plt_section()->address(); 9920 reloc_status = Arm_relocate_functions::got_prel(view, 9921 got_origin + got_offset, 9922 address); 9923 break; 9924 9925 case elfcpp::R_ARM_PLT32: 9926 case elfcpp::R_ARM_CALL: 9927 case elfcpp::R_ARM_JUMP24: 9928 case elfcpp::R_ARM_XPC25: 9929 gold_assert(gsym == NULL 9930 || gsym->has_plt_offset() 9931 || gsym->final_value_is_known() 9932 || (gsym->is_defined() 9933 && !gsym->is_from_dynobj() 9934 && !gsym->is_preemptible())); 9935 reloc_status = 9936 Arm_relocate_functions::arm_branch_common( 9937 r_type, relinfo, view, gsym, object, r_sym, psymval, address, 9938 thumb_bit, is_weakly_undefined_without_plt); 9939 break; 9940 9941 case elfcpp::R_ARM_THM_JUMP19: 9942 reloc_status = 9943 Arm_relocate_functions::thm_jump19(view, object, psymval, address, 9944 thumb_bit); 9945 break; 9946 9947 case elfcpp::R_ARM_THM_JUMP6: 9948 reloc_status = 9949 Arm_relocate_functions::thm_jump6(view, object, psymval, address); 9950 break; 9951 9952 case elfcpp::R_ARM_THM_JUMP8: 9953 reloc_status = 9954 Arm_relocate_functions::thm_jump8(view, object, psymval, address); 9955 break; 9956 9957 case elfcpp::R_ARM_THM_JUMP11: 9958 reloc_status = 9959 Arm_relocate_functions::thm_jump11(view, object, psymval, address); 9960 break; 9961 9962 case elfcpp::R_ARM_PREL31: 9963 reloc_status = Arm_relocate_functions::prel31(view, object, psymval, 9964 address, thumb_bit); 9965 break; 9966 9967 case elfcpp::R_ARM_V4BX: 9968 if (target->fix_v4bx() > General_options::FIX_V4BX_NONE) 9969 { 9970 const bool is_v4bx_interworking = 9971 (target->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING); 9972 reloc_status = 9973 Arm_relocate_functions::v4bx(relinfo, view, object, address, 9974 is_v4bx_interworking); 9975 } 9976 break; 9977 9978 case elfcpp::R_ARM_THM_PC8: 9979 reloc_status = 9980 Arm_relocate_functions::thm_pc8(view, object, psymval, address); 9981 break; 9982 9983 case elfcpp::R_ARM_THM_PC12: 9984 reloc_status = 9985 Arm_relocate_functions::thm_pc12(view, object, psymval, address); 9986 break; 9987 9988 case elfcpp::R_ARM_THM_ALU_PREL_11_0: 9989 reloc_status = 9990 Arm_relocate_functions::thm_alu11(view, object, psymval, address, 9991 thumb_bit); 9992 break; 9993 9994 case elfcpp::R_ARM_ALU_PC_G0_NC: 9995 case elfcpp::R_ARM_ALU_PC_G0: 9996 case elfcpp::R_ARM_ALU_PC_G1_NC: 9997 case elfcpp::R_ARM_ALU_PC_G1: 9998 case elfcpp::R_ARM_ALU_PC_G2: 9999 case elfcpp::R_ARM_ALU_SB_G0_NC: 10000 case elfcpp::R_ARM_ALU_SB_G0: 10001 case elfcpp::R_ARM_ALU_SB_G1_NC: 10002 case elfcpp::R_ARM_ALU_SB_G1: 10003 case elfcpp::R_ARM_ALU_SB_G2: 10004 reloc_status = 10005 Arm_relocate_functions::arm_grp_alu(view, object, psymval, 10006 reloc_property->group_index(), 10007 relative_address_base, 10008 thumb_bit, check_overflow); 10009 break; 10010 10011 case elfcpp::R_ARM_LDR_PC_G0: 10012 case elfcpp::R_ARM_LDR_PC_G1: 10013 case elfcpp::R_ARM_LDR_PC_G2: 10014 case elfcpp::R_ARM_LDR_SB_G0: 10015 case elfcpp::R_ARM_LDR_SB_G1: 10016 case elfcpp::R_ARM_LDR_SB_G2: 10017 reloc_status = 10018 Arm_relocate_functions::arm_grp_ldr(view, object, psymval, 10019 reloc_property->group_index(), 10020 relative_address_base); 10021 break; 10022 10023 case elfcpp::R_ARM_LDRS_PC_G0: 10024 case elfcpp::R_ARM_LDRS_PC_G1: 10025 case elfcpp::R_ARM_LDRS_PC_G2: 10026 case elfcpp::R_ARM_LDRS_SB_G0: 10027 case elfcpp::R_ARM_LDRS_SB_G1: 10028 case elfcpp::R_ARM_LDRS_SB_G2: 10029 reloc_status = 10030 Arm_relocate_functions::arm_grp_ldrs(view, object, psymval, 10031 reloc_property->group_index(), 10032 relative_address_base); 10033 break; 10034 10035 case elfcpp::R_ARM_LDC_PC_G0: 10036 case elfcpp::R_ARM_LDC_PC_G1: 10037 case elfcpp::R_ARM_LDC_PC_G2: 10038 case elfcpp::R_ARM_LDC_SB_G0: 10039 case elfcpp::R_ARM_LDC_SB_G1: 10040 case elfcpp::R_ARM_LDC_SB_G2: 10041 reloc_status = 10042 Arm_relocate_functions::arm_grp_ldc(view, object, psymval, 10043 reloc_property->group_index(), 10044 relative_address_base); 10045 break; 10046 10047 // These are initial tls relocs, which are expected when 10048 // linking. 10049 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic 10050 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic 10051 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic 10052 case elfcpp::R_ARM_TLS_IE32: // Initial-exec 10053 case elfcpp::R_ARM_TLS_LE32: // Local-exec 10054 reloc_status = 10055 this->relocate_tls(relinfo, target, relnum, rel, r_type, gsym, psymval, 10056 view, address, view_size); 10057 break; 10058 10059 // The known and unknown unsupported and/or deprecated relocations. 10060 case elfcpp::R_ARM_PC24: 10061 case elfcpp::R_ARM_LDR_SBREL_11_0_NC: 10062 case elfcpp::R_ARM_ALU_SBREL_19_12_NC: 10063 case elfcpp::R_ARM_ALU_SBREL_27_20_CK: 10064 default: 10065 // Just silently leave the method. We should get an appropriate error 10066 // message in the scan methods. 10067 break; 10068 } 10069 10070 // Report any errors. 10071 switch (reloc_status) 10072 { 10073 case Arm_relocate_functions::STATUS_OKAY: 10074 break; 10075 case Arm_relocate_functions::STATUS_OVERFLOW: 10076 gold_error_at_location(relinfo, relnum, rel.get_r_offset(), 10077 _("relocation overflow in %s"), 10078 reloc_property->name().c_str()); 10079 break; 10080 case Arm_relocate_functions::STATUS_BAD_RELOC: 10081 gold_error_at_location( 10082 relinfo, 10083 relnum, 10084 rel.get_r_offset(), 10085 _("unexpected opcode while processing relocation %s"), 10086 reloc_property->name().c_str()); 10087 break; 10088 default: 10089 gold_unreachable(); 10090 } 10091 10092 return true; 10093 } 10094 10095 // Perform a TLS relocation. 10096 10097 template<bool big_endian> 10098 inline typename Arm_relocate_functions<big_endian>::Status 10099 Target_arm<big_endian>::Relocate::relocate_tls( 10100 const Relocate_info<32, big_endian>* relinfo, 10101 Target_arm<big_endian>* target, 10102 size_t relnum, 10103 const elfcpp::Rel<32, big_endian>& rel, 10104 unsigned int r_type, 10105 const Sized_symbol<32>* gsym, 10106 const Symbol_value<32>* psymval, 10107 unsigned char* view, 10108 elfcpp::Elf_types<32>::Elf_Addr address, 10109 section_size_type /*view_size*/ ) 10110 { 10111 typedef Arm_relocate_functions<big_endian> ArmRelocFuncs; 10112 typedef Relocate_functions<32, big_endian> RelocFuncs; 10113 Output_segment* tls_segment = relinfo->layout->tls_segment(); 10114 10115 const Sized_relobj_file<32, big_endian>* object = relinfo->object; 10116 10117 elfcpp::Elf_types<32>::Elf_Addr value = psymval->value(object, 0); 10118 10119 const bool is_final = (gsym == NULL 10120 ? !parameters->options().shared() 10121 : gsym->final_value_is_known()); 10122 const tls::Tls_optimization optimized_type 10123 = Target_arm<big_endian>::optimize_tls_reloc(is_final, r_type); 10124 switch (r_type) 10125 { 10126 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic 10127 { 10128 unsigned int got_type = GOT_TYPE_TLS_PAIR; 10129 unsigned int got_offset; 10130 if (gsym != NULL) 10131 { 10132 gold_assert(gsym->has_got_offset(got_type)); 10133 got_offset = gsym->got_offset(got_type) - target->got_size(); 10134 } 10135 else 10136 { 10137 unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info()); 10138 gold_assert(object->local_has_got_offset(r_sym, got_type)); 10139 got_offset = (object->local_got_offset(r_sym, got_type) 10140 - target->got_size()); 10141 } 10142 if (optimized_type == tls::TLSOPT_NONE) 10143 { 10144 Arm_address got_entry = 10145 target->got_plt_section()->address() + got_offset; 10146 10147 // Relocate the field with the PC relative offset of the pair of 10148 // GOT entries. 10149 RelocFuncs::pcrel32_unaligned(view, got_entry, address); 10150 return ArmRelocFuncs::STATUS_OKAY; 10151 } 10152 } 10153 break; 10154 10155 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic 10156 if (optimized_type == tls::TLSOPT_NONE) 10157 { 10158 // Relocate the field with the offset of the GOT entry for 10159 // the module index. 10160 unsigned int got_offset; 10161 got_offset = (target->got_mod_index_entry(NULL, NULL, NULL) 10162 - target->got_size()); 10163 Arm_address got_entry = 10164 target->got_plt_section()->address() + got_offset; 10165 10166 // Relocate the field with the PC relative offset of the pair of 10167 // GOT entries. 10168 RelocFuncs::pcrel32_unaligned(view, got_entry, address); 10169 return ArmRelocFuncs::STATUS_OKAY; 10170 } 10171 break; 10172 10173 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic 10174 RelocFuncs::rel32_unaligned(view, value); 10175 return ArmRelocFuncs::STATUS_OKAY; 10176 10177 case elfcpp::R_ARM_TLS_IE32: // Initial-exec 10178 if (optimized_type == tls::TLSOPT_NONE) 10179 { 10180 // Relocate the field with the offset of the GOT entry for 10181 // the tp-relative offset of the symbol. 10182 unsigned int got_type = GOT_TYPE_TLS_OFFSET; 10183 unsigned int got_offset; 10184 if (gsym != NULL) 10185 { 10186 gold_assert(gsym->has_got_offset(got_type)); 10187 got_offset = gsym->got_offset(got_type); 10188 } 10189 else 10190 { 10191 unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info()); 10192 gold_assert(object->local_has_got_offset(r_sym, got_type)); 10193 got_offset = object->local_got_offset(r_sym, got_type); 10194 } 10195 10196 // All GOT offsets are relative to the end of the GOT. 10197 got_offset -= target->got_size(); 10198 10199 Arm_address got_entry = 10200 target->got_plt_section()->address() + got_offset; 10201 10202 // Relocate the field with the PC relative offset of the GOT entry. 10203 RelocFuncs::pcrel32_unaligned(view, got_entry, address); 10204 return ArmRelocFuncs::STATUS_OKAY; 10205 } 10206 break; 10207 10208 case elfcpp::R_ARM_TLS_LE32: // Local-exec 10209 // If we're creating a shared library, a dynamic relocation will 10210 // have been created for this location, so do not apply it now. 10211 if (!parameters->options().shared()) 10212 { 10213 gold_assert(tls_segment != NULL); 10214 10215 // $tp points to the TCB, which is followed by the TLS, so we 10216 // need to add TCB size to the offset. 10217 Arm_address aligned_tcb_size = 10218 align_address(ARM_TCB_SIZE, tls_segment->maximum_alignment()); 10219 RelocFuncs::rel32_unaligned(view, value + aligned_tcb_size); 10220 10221 } 10222 return ArmRelocFuncs::STATUS_OKAY; 10223 10224 default: 10225 gold_unreachable(); 10226 } 10227 10228 gold_error_at_location(relinfo, relnum, rel.get_r_offset(), 10229 _("unsupported reloc %u"), 10230 r_type); 10231 return ArmRelocFuncs::STATUS_BAD_RELOC; 10232 } 10233 10234 // Relocate section data. 10235 10236 template<bool big_endian> 10237 void 10238 Target_arm<big_endian>::relocate_section( 10239 const Relocate_info<32, big_endian>* relinfo, 10240 unsigned int sh_type, 10241 const unsigned char* prelocs, 10242 size_t reloc_count, 10243 Output_section* output_section, 10244 bool needs_special_offset_handling, 10245 unsigned char* view, 10246 Arm_address address, 10247 section_size_type view_size, 10248 const Reloc_symbol_changes* reloc_symbol_changes) 10249 { 10250 typedef typename Target_arm<big_endian>::Relocate Arm_relocate; 10251 gold_assert(sh_type == elfcpp::SHT_REL); 10252 10253 // See if we are relocating a relaxed input section. If so, the view 10254 // covers the whole output section and we need to adjust accordingly. 10255 if (needs_special_offset_handling) 10256 { 10257 const Output_relaxed_input_section* poris = 10258 output_section->find_relaxed_input_section(relinfo->object, 10259 relinfo->data_shndx); 10260 if (poris != NULL) 10261 { 10262 Arm_address section_address = poris->address(); 10263 section_size_type section_size = poris->data_size(); 10264 10265 gold_assert((section_address >= address) 10266 && ((section_address + section_size) 10267 <= (address + view_size))); 10268 10269 off_t offset = section_address - address; 10270 view += offset; 10271 address += offset; 10272 view_size = section_size; 10273 } 10274 } 10275 10276 gold::relocate_section<32, big_endian, Target_arm, Arm_relocate, 10277 gold::Default_comdat_behavior, Classify_reloc>( 10278 relinfo, 10279 this, 10280 prelocs, 10281 reloc_count, 10282 output_section, 10283 needs_special_offset_handling, 10284 view, 10285 address, 10286 view_size, 10287 reloc_symbol_changes); 10288 } 10289 10290 // Return the size of a relocation while scanning during a relocatable 10291 // link. 10292 10293 template<bool big_endian> 10294 unsigned int 10295 Target_arm<big_endian>::Classify_reloc::get_size_for_reloc( 10296 unsigned int r_type, 10297 Relobj* object) 10298 { 10299 r_type = get_real_reloc_type(r_type); 10300 const Arm_reloc_property* arp = 10301 arm_reloc_property_table->get_implemented_static_reloc_property(r_type); 10302 if (arp != NULL) 10303 return arp->size(); 10304 else 10305 { 10306 std::string reloc_name = 10307 arm_reloc_property_table->reloc_name_in_error_message(r_type); 10308 gold_error(_("%s: unexpected %s in object file"), 10309 object->name().c_str(), reloc_name.c_str()); 10310 return 0; 10311 } 10312 } 10313 10314 // Scan the relocs during a relocatable link. 10315 10316 template<bool big_endian> 10317 void 10318 Target_arm<big_endian>::scan_relocatable_relocs( 10319 Symbol_table* symtab, 10320 Layout* layout, 10321 Sized_relobj_file<32, big_endian>* object, 10322 unsigned int data_shndx, 10323 unsigned int sh_type, 10324 const unsigned char* prelocs, 10325 size_t reloc_count, 10326 Output_section* output_section, 10327 bool needs_special_offset_handling, 10328 size_t local_symbol_count, 10329 const unsigned char* plocal_symbols, 10330 Relocatable_relocs* rr) 10331 { 10332 typedef Arm_scan_relocatable_relocs<big_endian, Classify_reloc> 10333 Scan_relocatable_relocs; 10334 10335 gold_assert(sh_type == elfcpp::SHT_REL); 10336 10337 gold::scan_relocatable_relocs<32, big_endian, Scan_relocatable_relocs>( 10338 symtab, 10339 layout, 10340 object, 10341 data_shndx, 10342 prelocs, 10343 reloc_count, 10344 output_section, 10345 needs_special_offset_handling, 10346 local_symbol_count, 10347 plocal_symbols, 10348 rr); 10349 } 10350 10351 // Scan the relocs for --emit-relocs. 10352 10353 template<bool big_endian> 10354 void 10355 Target_arm<big_endian>::emit_relocs_scan(Symbol_table* symtab, 10356 Layout* layout, 10357 Sized_relobj_file<32, big_endian>* object, 10358 unsigned int data_shndx, 10359 unsigned int sh_type, 10360 const unsigned char* prelocs, 10361 size_t reloc_count, 10362 Output_section* output_section, 10363 bool needs_special_offset_handling, 10364 size_t local_symbol_count, 10365 const unsigned char* plocal_syms, 10366 Relocatable_relocs* rr) 10367 { 10368 typedef gold::Default_classify_reloc<elfcpp::SHT_REL, 32, big_endian> 10369 Classify_reloc; 10370 typedef gold::Default_emit_relocs_strategy<Classify_reloc> 10371 Emit_relocs_strategy; 10372 10373 gold_assert(sh_type == elfcpp::SHT_REL); 10374 10375 gold::scan_relocatable_relocs<32, big_endian, Emit_relocs_strategy>( 10376 symtab, 10377 layout, 10378 object, 10379 data_shndx, 10380 prelocs, 10381 reloc_count, 10382 output_section, 10383 needs_special_offset_handling, 10384 local_symbol_count, 10385 plocal_syms, 10386 rr); 10387 } 10388 10389 // Emit relocations for a section. 10390 10391 template<bool big_endian> 10392 void 10393 Target_arm<big_endian>::relocate_relocs( 10394 const Relocate_info<32, big_endian>* relinfo, 10395 unsigned int sh_type, 10396 const unsigned char* prelocs, 10397 size_t reloc_count, 10398 Output_section* output_section, 10399 typename elfcpp::Elf_types<32>::Elf_Off offset_in_output_section, 10400 unsigned char* view, 10401 Arm_address view_address, 10402 section_size_type view_size, 10403 unsigned char* reloc_view, 10404 section_size_type reloc_view_size) 10405 { 10406 gold_assert(sh_type == elfcpp::SHT_REL); 10407 10408 gold::relocate_relocs<32, big_endian, Classify_reloc>( 10409 relinfo, 10410 prelocs, 10411 reloc_count, 10412 output_section, 10413 offset_in_output_section, 10414 view, 10415 view_address, 10416 view_size, 10417 reloc_view, 10418 reloc_view_size); 10419 } 10420 10421 // Perform target-specific processing in a relocatable link. This is 10422 // only used if we use the relocation strategy RELOC_SPECIAL. 10423 10424 template<bool big_endian> 10425 void 10426 Target_arm<big_endian>::relocate_special_relocatable( 10427 const Relocate_info<32, big_endian>* relinfo, 10428 unsigned int sh_type, 10429 const unsigned char* preloc_in, 10430 size_t relnum, 10431 Output_section* output_section, 10432 typename elfcpp::Elf_types<32>::Elf_Off offset_in_output_section, 10433 unsigned char* view, 10434 elfcpp::Elf_types<32>::Elf_Addr view_address, 10435 section_size_type, 10436 unsigned char* preloc_out) 10437 { 10438 // We can only handle REL type relocation sections. 10439 gold_assert(sh_type == elfcpp::SHT_REL); 10440 10441 typedef typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc Reltype; 10442 typedef typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc_write 10443 Reltype_write; 10444 const Arm_address invalid_address = static_cast<Arm_address>(0) - 1; 10445 10446 const Arm_relobj<big_endian>* object = 10447 Arm_relobj<big_endian>::as_arm_relobj(relinfo->object); 10448 const unsigned int local_count = object->local_symbol_count(); 10449 10450 Reltype reloc(preloc_in); 10451 Reltype_write reloc_write(preloc_out); 10452 10453 elfcpp::Elf_types<32>::Elf_WXword r_info = reloc.get_r_info(); 10454 const unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info); 10455 const unsigned int r_type = elfcpp::elf_r_type<32>(r_info); 10456 10457 const Arm_reloc_property* arp = 10458 arm_reloc_property_table->get_implemented_static_reloc_property(r_type); 10459 gold_assert(arp != NULL); 10460 10461 // Get the new symbol index. 10462 // We only use RELOC_SPECIAL strategy in local relocations. 10463 gold_assert(r_sym < local_count); 10464 10465 // We are adjusting a section symbol. We need to find 10466 // the symbol table index of the section symbol for 10467 // the output section corresponding to input section 10468 // in which this symbol is defined. 10469 bool is_ordinary; 10470 unsigned int shndx = object->local_symbol_input_shndx(r_sym, &is_ordinary); 10471 gold_assert(is_ordinary); 10472 Output_section* os = object->output_section(shndx); 10473 gold_assert(os != NULL); 10474 gold_assert(os->needs_symtab_index()); 10475 unsigned int new_symndx = os->symtab_index(); 10476 10477 // Get the new offset--the location in the output section where 10478 // this relocation should be applied. 10479 10480 Arm_address offset = reloc.get_r_offset(); 10481 Arm_address new_offset; 10482 if (offset_in_output_section != invalid_address) 10483 new_offset = offset + offset_in_output_section; 10484 else 10485 { 10486 section_offset_type sot_offset = 10487 convert_types<section_offset_type, Arm_address>(offset); 10488 section_offset_type new_sot_offset = 10489 output_section->output_offset(object, relinfo->data_shndx, 10490 sot_offset); 10491 gold_assert(new_sot_offset != -1); 10492 new_offset = new_sot_offset; 10493 } 10494 10495 // In an object file, r_offset is an offset within the section. 10496 // In an executable or dynamic object, generated by 10497 // --emit-relocs, r_offset is an absolute address. 10498 if (!parameters->options().relocatable()) 10499 { 10500 new_offset += view_address; 10501 if (offset_in_output_section != invalid_address) 10502 new_offset -= offset_in_output_section; 10503 } 10504 10505 reloc_write.put_r_offset(new_offset); 10506 reloc_write.put_r_info(elfcpp::elf_r_info<32>(new_symndx, r_type)); 10507 10508 // Handle the reloc addend. 10509 // The relocation uses a section symbol in the input file. 10510 // We are adjusting it to use a section symbol in the output 10511 // file. The input section symbol refers to some address in 10512 // the input section. We need the relocation in the output 10513 // file to refer to that same address. This adjustment to 10514 // the addend is the same calculation we use for a simple 10515 // absolute relocation for the input section symbol. 10516 10517 const Symbol_value<32>* psymval = object->local_symbol(r_sym); 10518 10519 // Handle THUMB bit. 10520 Symbol_value<32> symval; 10521 Arm_address thumb_bit = 10522 object->local_symbol_is_thumb_function(r_sym) ? 1 : 0; 10523 if (thumb_bit != 0 10524 && arp->uses_thumb_bit() 10525 && ((psymval->value(object, 0) & 1) != 0)) 10526 { 10527 Arm_address stripped_value = 10528 psymval->value(object, 0) & ~static_cast<Arm_address>(1); 10529 symval.set_output_value(stripped_value); 10530 psymval = &symval; 10531 } 10532 10533 unsigned char* paddend = view + offset; 10534 typename Arm_relocate_functions<big_endian>::Status reloc_status = 10535 Arm_relocate_functions<big_endian>::STATUS_OKAY; 10536 switch (r_type) 10537 { 10538 case elfcpp::R_ARM_ABS8: 10539 reloc_status = Arm_relocate_functions<big_endian>::abs8(paddend, object, 10540 psymval); 10541 break; 10542 10543 case elfcpp::R_ARM_ABS12: 10544 reloc_status = Arm_relocate_functions<big_endian>::abs12(paddend, object, 10545 psymval); 10546 break; 10547 10548 case elfcpp::R_ARM_ABS16: 10549 reloc_status = Arm_relocate_functions<big_endian>::abs16(paddend, object, 10550 psymval); 10551 break; 10552 10553 case elfcpp::R_ARM_THM_ABS5: 10554 reloc_status = Arm_relocate_functions<big_endian>::thm_abs5(paddend, 10555 object, 10556 psymval); 10557 break; 10558 10559 case elfcpp::R_ARM_MOVW_ABS_NC: 10560 case elfcpp::R_ARM_MOVW_PREL_NC: 10561 case elfcpp::R_ARM_MOVW_BREL_NC: 10562 case elfcpp::R_ARM_MOVW_BREL: 10563 reloc_status = Arm_relocate_functions<big_endian>::movw( 10564 paddend, object, psymval, 0, thumb_bit, arp->checks_overflow()); 10565 break; 10566 10567 case elfcpp::R_ARM_THM_MOVW_ABS_NC: 10568 case elfcpp::R_ARM_THM_MOVW_PREL_NC: 10569 case elfcpp::R_ARM_THM_MOVW_BREL_NC: 10570 case elfcpp::R_ARM_THM_MOVW_BREL: 10571 reloc_status = Arm_relocate_functions<big_endian>::thm_movw( 10572 paddend, object, psymval, 0, thumb_bit, arp->checks_overflow()); 10573 break; 10574 10575 case elfcpp::R_ARM_THM_CALL: 10576 case elfcpp::R_ARM_THM_XPC22: 10577 case elfcpp::R_ARM_THM_JUMP24: 10578 reloc_status = 10579 Arm_relocate_functions<big_endian>::thumb_branch_common( 10580 r_type, relinfo, paddend, NULL, object, 0, psymval, 0, thumb_bit, 10581 false); 10582 break; 10583 10584 case elfcpp::R_ARM_PLT32: 10585 case elfcpp::R_ARM_CALL: 10586 case elfcpp::R_ARM_JUMP24: 10587 case elfcpp::R_ARM_XPC25: 10588 reloc_status = 10589 Arm_relocate_functions<big_endian>::arm_branch_common( 10590 r_type, relinfo, paddend, NULL, object, 0, psymval, 0, thumb_bit, 10591 false); 10592 break; 10593 10594 case elfcpp::R_ARM_THM_JUMP19: 10595 reloc_status = 10596 Arm_relocate_functions<big_endian>::thm_jump19(paddend, object, 10597 psymval, 0, thumb_bit); 10598 break; 10599 10600 case elfcpp::R_ARM_THM_JUMP6: 10601 reloc_status = 10602 Arm_relocate_functions<big_endian>::thm_jump6(paddend, object, psymval, 10603 0); 10604 break; 10605 10606 case elfcpp::R_ARM_THM_JUMP8: 10607 reloc_status = 10608 Arm_relocate_functions<big_endian>::thm_jump8(paddend, object, psymval, 10609 0); 10610 break; 10611 10612 case elfcpp::R_ARM_THM_JUMP11: 10613 reloc_status = 10614 Arm_relocate_functions<big_endian>::thm_jump11(paddend, object, psymval, 10615 0); 10616 break; 10617 10618 case elfcpp::R_ARM_PREL31: 10619 reloc_status = 10620 Arm_relocate_functions<big_endian>::prel31(paddend, object, psymval, 0, 10621 thumb_bit); 10622 break; 10623 10624 case elfcpp::R_ARM_THM_PC8: 10625 reloc_status = 10626 Arm_relocate_functions<big_endian>::thm_pc8(paddend, object, psymval, 10627 0); 10628 break; 10629 10630 case elfcpp::R_ARM_THM_PC12: 10631 reloc_status = 10632 Arm_relocate_functions<big_endian>::thm_pc12(paddend, object, psymval, 10633 0); 10634 break; 10635 10636 case elfcpp::R_ARM_THM_ALU_PREL_11_0: 10637 reloc_status = 10638 Arm_relocate_functions<big_endian>::thm_alu11(paddend, object, psymval, 10639 0, thumb_bit); 10640 break; 10641 10642 // These relocation truncate relocation results so we cannot handle them 10643 // in a relocatable link. 10644 case elfcpp::R_ARM_MOVT_ABS: 10645 case elfcpp::R_ARM_THM_MOVT_ABS: 10646 case elfcpp::R_ARM_MOVT_PREL: 10647 case elfcpp::R_ARM_MOVT_BREL: 10648 case elfcpp::R_ARM_THM_MOVT_PREL: 10649 case elfcpp::R_ARM_THM_MOVT_BREL: 10650 case elfcpp::R_ARM_ALU_PC_G0_NC: 10651 case elfcpp::R_ARM_ALU_PC_G0: 10652 case elfcpp::R_ARM_ALU_PC_G1_NC: 10653 case elfcpp::R_ARM_ALU_PC_G1: 10654 case elfcpp::R_ARM_ALU_PC_G2: 10655 case elfcpp::R_ARM_ALU_SB_G0_NC: 10656 case elfcpp::R_ARM_ALU_SB_G0: 10657 case elfcpp::R_ARM_ALU_SB_G1_NC: 10658 case elfcpp::R_ARM_ALU_SB_G1: 10659 case elfcpp::R_ARM_ALU_SB_G2: 10660 case elfcpp::R_ARM_LDR_PC_G0: 10661 case elfcpp::R_ARM_LDR_PC_G1: 10662 case elfcpp::R_ARM_LDR_PC_G2: 10663 case elfcpp::R_ARM_LDR_SB_G0: 10664 case elfcpp::R_ARM_LDR_SB_G1: 10665 case elfcpp::R_ARM_LDR_SB_G2: 10666 case elfcpp::R_ARM_LDRS_PC_G0: 10667 case elfcpp::R_ARM_LDRS_PC_G1: 10668 case elfcpp::R_ARM_LDRS_PC_G2: 10669 case elfcpp::R_ARM_LDRS_SB_G0: 10670 case elfcpp::R_ARM_LDRS_SB_G1: 10671 case elfcpp::R_ARM_LDRS_SB_G2: 10672 case elfcpp::R_ARM_LDC_PC_G0: 10673 case elfcpp::R_ARM_LDC_PC_G1: 10674 case elfcpp::R_ARM_LDC_PC_G2: 10675 case elfcpp::R_ARM_LDC_SB_G0: 10676 case elfcpp::R_ARM_LDC_SB_G1: 10677 case elfcpp::R_ARM_LDC_SB_G2: 10678 gold_error(_("cannot handle %s in a relocatable link"), 10679 arp->name().c_str()); 10680 break; 10681 10682 default: 10683 gold_unreachable(); 10684 } 10685 10686 // Report any errors. 10687 switch (reloc_status) 10688 { 10689 case Arm_relocate_functions<big_endian>::STATUS_OKAY: 10690 break; 10691 case Arm_relocate_functions<big_endian>::STATUS_OVERFLOW: 10692 gold_error_at_location(relinfo, relnum, reloc.get_r_offset(), 10693 _("relocation overflow in %s"), 10694 arp->name().c_str()); 10695 break; 10696 case Arm_relocate_functions<big_endian>::STATUS_BAD_RELOC: 10697 gold_error_at_location(relinfo, relnum, reloc.get_r_offset(), 10698 _("unexpected opcode while processing relocation %s"), 10699 arp->name().c_str()); 10700 break; 10701 default: 10702 gold_unreachable(); 10703 } 10704 } 10705 10706 // Return the value to use for a dynamic symbol which requires special 10707 // treatment. This is how we support equality comparisons of function 10708 // pointers across shared library boundaries, as described in the 10709 // processor specific ABI supplement. 10710 10711 template<bool big_endian> 10712 uint64_t 10713 Target_arm<big_endian>::do_dynsym_value(const Symbol* gsym) const 10714 { 10715 gold_assert(gsym->is_from_dynobj() && gsym->has_plt_offset()); 10716 return this->plt_address_for_global(gsym); 10717 } 10718 10719 // Map platform-specific relocs to real relocs 10720 // 10721 template<bool big_endian> 10722 unsigned int 10723 Target_arm<big_endian>::get_real_reloc_type(unsigned int r_type) 10724 { 10725 switch (r_type) 10726 { 10727 case elfcpp::R_ARM_TARGET1: 10728 // This is either R_ARM_ABS32 or R_ARM_REL32; 10729 return elfcpp::R_ARM_ABS32; 10730 10731 case elfcpp::R_ARM_TARGET2: 10732 // This can be any reloc type but usually is R_ARM_GOT_PREL 10733 return elfcpp::R_ARM_GOT_PREL; 10734 10735 default: 10736 return r_type; 10737 } 10738 } 10739 10740 // Whether if two EABI versions V1 and V2 are compatible. 10741 10742 template<bool big_endian> 10743 bool 10744 Target_arm<big_endian>::are_eabi_versions_compatible( 10745 elfcpp::Elf_Word v1, 10746 elfcpp::Elf_Word v2) 10747 { 10748 // v4 and v5 are the same spec before and after it was released, 10749 // so allow mixing them. 10750 if ((v1 == elfcpp::EF_ARM_EABI_UNKNOWN || v2 == elfcpp::EF_ARM_EABI_UNKNOWN) 10751 || (v1 == elfcpp::EF_ARM_EABI_VER4 && v2 == elfcpp::EF_ARM_EABI_VER5) 10752 || (v1 == elfcpp::EF_ARM_EABI_VER5 && v2 == elfcpp::EF_ARM_EABI_VER4)) 10753 return true; 10754 10755 return v1 == v2; 10756 } 10757 10758 // Combine FLAGS from an input object called NAME and the processor-specific 10759 // flags in the ELF header of the output. Much of this is adapted from the 10760 // processor-specific flags merging code in elf32_arm_merge_private_bfd_data 10761 // in bfd/elf32-arm.c. 10762 10763 template<bool big_endian> 10764 void 10765 Target_arm<big_endian>::merge_processor_specific_flags( 10766 const std::string& name, 10767 elfcpp::Elf_Word flags) 10768 { 10769 if (this->are_processor_specific_flags_set()) 10770 { 10771 elfcpp::Elf_Word out_flags = this->processor_specific_flags(); 10772 10773 // Nothing to merge if flags equal to those in output. 10774 if (flags == out_flags) 10775 return; 10776 10777 // Complain about various flag mismatches. 10778 elfcpp::Elf_Word version1 = elfcpp::arm_eabi_version(flags); 10779 elfcpp::Elf_Word version2 = elfcpp::arm_eabi_version(out_flags); 10780 if (!this->are_eabi_versions_compatible(version1, version2) 10781 && parameters->options().warn_mismatch()) 10782 gold_error(_("Source object %s has EABI version %d but output has " 10783 "EABI version %d."), 10784 name.c_str(), 10785 (flags & elfcpp::EF_ARM_EABIMASK) >> 24, 10786 (out_flags & elfcpp::EF_ARM_EABIMASK) >> 24); 10787 } 10788 else 10789 { 10790 // If the input is the default architecture and had the default 10791 // flags then do not bother setting the flags for the output 10792 // architecture, instead allow future merges to do this. If no 10793 // future merges ever set these flags then they will retain their 10794 // uninitialised values, which surprise surprise, correspond 10795 // to the default values. 10796 if (flags == 0) 10797 return; 10798 10799 // This is the first time, just copy the flags. 10800 // We only copy the EABI version for now. 10801 this->set_processor_specific_flags(flags & elfcpp::EF_ARM_EABIMASK); 10802 } 10803 } 10804 10805 // Adjust ELF file header. 10806 template<bool big_endian> 10807 void 10808 Target_arm<big_endian>::do_adjust_elf_header( 10809 unsigned char* view, 10810 int len) 10811 { 10812 gold_assert(len == elfcpp::Elf_sizes<32>::ehdr_size); 10813 10814 elfcpp::Ehdr<32, big_endian> ehdr(view); 10815 elfcpp::Elf_Word flags = this->processor_specific_flags(); 10816 unsigned char e_ident[elfcpp::EI_NIDENT]; 10817 memcpy(e_ident, ehdr.get_e_ident(), elfcpp::EI_NIDENT); 10818 10819 if (elfcpp::arm_eabi_version(flags) 10820 == elfcpp::EF_ARM_EABI_UNKNOWN) 10821 e_ident[elfcpp::EI_OSABI] = elfcpp::ELFOSABI_ARM; 10822 else 10823 e_ident[elfcpp::EI_OSABI] = 0; 10824 e_ident[elfcpp::EI_ABIVERSION] = 0; 10825 10826 // FIXME: Do EF_ARM_BE8 adjustment. 10827 10828 // If we're working in EABI_VER5, set the hard/soft float ABI flags 10829 // as appropriate. 10830 if (elfcpp::arm_eabi_version(flags) == elfcpp::EF_ARM_EABI_VER5) 10831 { 10832 elfcpp::Elf_Half type = ehdr.get_e_type(); 10833 if (type == elfcpp::ET_EXEC || type == elfcpp::ET_DYN) 10834 { 10835 Object_attribute* attr = this->get_aeabi_object_attribute(elfcpp::Tag_ABI_VFP_args); 10836 if (attr->int_value() == elfcpp::AEABI_VFP_args_vfp) 10837 flags |= elfcpp::EF_ARM_ABI_FLOAT_HARD; 10838 else 10839 flags |= elfcpp::EF_ARM_ABI_FLOAT_SOFT; 10840 this->set_processor_specific_flags(flags); 10841 } 10842 } 10843 elfcpp::Ehdr_write<32, big_endian> oehdr(view); 10844 oehdr.put_e_ident(e_ident); 10845 oehdr.put_e_flags(this->processor_specific_flags()); 10846 } 10847 10848 // do_make_elf_object to override the same function in the base class. 10849 // We need to use a target-specific sub-class of 10850 // Sized_relobj_file<32, big_endian> to store ARM specific information. 10851 // Hence we need to have our own ELF object creation. 10852 10853 template<bool big_endian> 10854 Object* 10855 Target_arm<big_endian>::do_make_elf_object( 10856 const std::string& name, 10857 Input_file* input_file, 10858 off_t offset, const elfcpp::Ehdr<32, big_endian>& ehdr) 10859 { 10860 int et = ehdr.get_e_type(); 10861 // ET_EXEC files are valid input for --just-symbols/-R, 10862 // and we treat them as relocatable objects. 10863 if (et == elfcpp::ET_REL 10864 || (et == elfcpp::ET_EXEC && input_file->just_symbols())) 10865 { 10866 Arm_relobj<big_endian>* obj = 10867 new Arm_relobj<big_endian>(name, input_file, offset, ehdr); 10868 obj->setup(); 10869 return obj; 10870 } 10871 else if (et == elfcpp::ET_DYN) 10872 { 10873 Sized_dynobj<32, big_endian>* obj = 10874 new Arm_dynobj<big_endian>(name, input_file, offset, ehdr); 10875 obj->setup(); 10876 return obj; 10877 } 10878 else 10879 { 10880 gold_error(_("%s: unsupported ELF file type %d"), 10881 name.c_str(), et); 10882 return NULL; 10883 } 10884 } 10885 10886 // Read the architecture from the Tag_also_compatible_with attribute, if any. 10887 // Returns -1 if no architecture could be read. 10888 // This is adapted from get_secondary_compatible_arch() in bfd/elf32-arm.c. 10889 10890 template<bool big_endian> 10891 int 10892 Target_arm<big_endian>::get_secondary_compatible_arch( 10893 const Attributes_section_data* pasd) 10894 { 10895 const Object_attribute* known_attributes = 10896 pasd->known_attributes(Object_attribute::OBJ_ATTR_PROC); 10897 10898 // Note: the tag and its argument below are uleb128 values, though 10899 // currently-defined values fit in one byte for each. 10900 const std::string& sv = 10901 known_attributes[elfcpp::Tag_also_compatible_with].string_value(); 10902 if (sv.size() == 2 10903 && sv.data()[0] == elfcpp::Tag_CPU_arch 10904 && (sv.data()[1] & 128) != 128) 10905 return sv.data()[1]; 10906 10907 // This tag is "safely ignorable", so don't complain if it looks funny. 10908 return -1; 10909 } 10910 10911 // Set, or unset, the architecture of the Tag_also_compatible_with attribute. 10912 // The tag is removed if ARCH is -1. 10913 // This is adapted from set_secondary_compatible_arch() in bfd/elf32-arm.c. 10914 10915 template<bool big_endian> 10916 void 10917 Target_arm<big_endian>::set_secondary_compatible_arch( 10918 Attributes_section_data* pasd, 10919 int arch) 10920 { 10921 Object_attribute* known_attributes = 10922 pasd->known_attributes(Object_attribute::OBJ_ATTR_PROC); 10923 10924 if (arch == -1) 10925 { 10926 known_attributes[elfcpp::Tag_also_compatible_with].set_string_value(""); 10927 return; 10928 } 10929 10930 // Note: the tag and its argument below are uleb128 values, though 10931 // currently-defined values fit in one byte for each. 10932 char sv[3]; 10933 sv[0] = elfcpp::Tag_CPU_arch; 10934 gold_assert(arch != 0); 10935 sv[1] = arch; 10936 sv[2] = '\0'; 10937 10938 known_attributes[elfcpp::Tag_also_compatible_with].set_string_value(sv); 10939 } 10940 10941 // Combine two values for Tag_CPU_arch, taking secondary compatibility tags 10942 // into account. 10943 // This is adapted from tag_cpu_arch_combine() in bfd/elf32-arm.c. 10944 10945 template<bool big_endian> 10946 int 10947 Target_arm<big_endian>::tag_cpu_arch_combine( 10948 const char* name, 10949 int oldtag, 10950 int* secondary_compat_out, 10951 int newtag, 10952 int secondary_compat) 10953 { 10954 #define T(X) elfcpp::TAG_CPU_ARCH_##X 10955 static const int v6t2[] = 10956 { 10957 T(V6T2), // PRE_V4. 10958 T(V6T2), // V4. 10959 T(V6T2), // V4T. 10960 T(V6T2), // V5T. 10961 T(V6T2), // V5TE. 10962 T(V6T2), // V5TEJ. 10963 T(V6T2), // V6. 10964 T(V7), // V6KZ. 10965 T(V6T2) // V6T2. 10966 }; 10967 static const int v6k[] = 10968 { 10969 T(V6K), // PRE_V4. 10970 T(V6K), // V4. 10971 T(V6K), // V4T. 10972 T(V6K), // V5T. 10973 T(V6K), // V5TE. 10974 T(V6K), // V5TEJ. 10975 T(V6K), // V6. 10976 T(V6KZ), // V6KZ. 10977 T(V7), // V6T2. 10978 T(V6K) // V6K. 10979 }; 10980 static const int v7[] = 10981 { 10982 T(V7), // PRE_V4. 10983 T(V7), // V4. 10984 T(V7), // V4T. 10985 T(V7), // V5T. 10986 T(V7), // V5TE. 10987 T(V7), // V5TEJ. 10988 T(V7), // V6. 10989 T(V7), // V6KZ. 10990 T(V7), // V6T2. 10991 T(V7), // V6K. 10992 T(V7) // V7. 10993 }; 10994 static const int v6_m[] = 10995 { 10996 -1, // PRE_V4. 10997 -1, // V4. 10998 T(V6K), // V4T. 10999 T(V6K), // V5T. 11000 T(V6K), // V5TE. 11001 T(V6K), // V5TEJ. 11002 T(V6K), // V6. 11003 T(V6KZ), // V6KZ. 11004 T(V7), // V6T2. 11005 T(V6K), // V6K. 11006 T(V7), // V7. 11007 T(V6_M) // V6_M. 11008 }; 11009 static const int v6s_m[] = 11010 { 11011 -1, // PRE_V4. 11012 -1, // V4. 11013 T(V6K), // V4T. 11014 T(V6K), // V5T. 11015 T(V6K), // V5TE. 11016 T(V6K), // V5TEJ. 11017 T(V6K), // V6. 11018 T(V6KZ), // V6KZ. 11019 T(V7), // V6T2. 11020 T(V6K), // V6K. 11021 T(V7), // V7. 11022 T(V6S_M), // V6_M. 11023 T(V6S_M) // V6S_M. 11024 }; 11025 static const int v7e_m[] = 11026 { 11027 -1, // PRE_V4. 11028 -1, // V4. 11029 T(V7E_M), // V4T. 11030 T(V7E_M), // V5T. 11031 T(V7E_M), // V5TE. 11032 T(V7E_M), // V5TEJ. 11033 T(V7E_M), // V6. 11034 T(V7E_M), // V6KZ. 11035 T(V7E_M), // V6T2. 11036 T(V7E_M), // V6K. 11037 T(V7E_M), // V7. 11038 T(V7E_M), // V6_M. 11039 T(V7E_M), // V6S_M. 11040 T(V7E_M) // V7E_M. 11041 }; 11042 static const int v8[] = 11043 { 11044 T(V8), // PRE_V4. 11045 T(V8), // V4. 11046 T(V8), // V4T. 11047 T(V8), // V5T. 11048 T(V8), // V5TE. 11049 T(V8), // V5TEJ. 11050 T(V8), // V6. 11051 T(V8), // V6KZ. 11052 T(V8), // V6T2. 11053 T(V8), // V6K. 11054 T(V8), // V7. 11055 T(V8), // V6_M. 11056 T(V8), // V6S_M. 11057 T(V8), // V7E_M. 11058 T(V8) // V8. 11059 }; 11060 static const int v4t_plus_v6_m[] = 11061 { 11062 -1, // PRE_V4. 11063 -1, // V4. 11064 T(V4T), // V4T. 11065 T(V5T), // V5T. 11066 T(V5TE), // V5TE. 11067 T(V5TEJ), // V5TEJ. 11068 T(V6), // V6. 11069 T(V6KZ), // V6KZ. 11070 T(V6T2), // V6T2. 11071 T(V6K), // V6K. 11072 T(V7), // V7. 11073 T(V6_M), // V6_M. 11074 T(V6S_M), // V6S_M. 11075 T(V7E_M), // V7E_M. 11076 T(V8), // V8. 11077 T(V4T_PLUS_V6_M) // V4T plus V6_M. 11078 }; 11079 static const int* comb[] = 11080 { 11081 v6t2, 11082 v6k, 11083 v7, 11084 v6_m, 11085 v6s_m, 11086 v7e_m, 11087 v8, 11088 // Pseudo-architecture. 11089 v4t_plus_v6_m 11090 }; 11091 11092 // Check we've not got a higher architecture than we know about. 11093 11094 if (oldtag > elfcpp::MAX_TAG_CPU_ARCH || newtag > elfcpp::MAX_TAG_CPU_ARCH) 11095 { 11096 gold_error(_("%s: unknown CPU architecture"), name); 11097 return -1; 11098 } 11099 11100 // Override old tag if we have a Tag_also_compatible_with on the output. 11101 11102 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T)) 11103 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M))) 11104 oldtag = T(V4T_PLUS_V6_M); 11105 11106 // And override the new tag if we have a Tag_also_compatible_with on the 11107 // input. 11108 11109 if ((newtag == T(V6_M) && secondary_compat == T(V4T)) 11110 || (newtag == T(V4T) && secondary_compat == T(V6_M))) 11111 newtag = T(V4T_PLUS_V6_M); 11112 11113 // Architectures before V6KZ add features monotonically. 11114 int tagh = std::max(oldtag, newtag); 11115 if (tagh <= elfcpp::TAG_CPU_ARCH_V6KZ) 11116 return tagh; 11117 11118 int tagl = std::min(oldtag, newtag); 11119 int result = comb[tagh - T(V6T2)][tagl]; 11120 11121 // Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M) 11122 // as the canonical version. 11123 if (result == T(V4T_PLUS_V6_M)) 11124 { 11125 result = T(V4T); 11126 *secondary_compat_out = T(V6_M); 11127 } 11128 else 11129 *secondary_compat_out = -1; 11130 11131 if (result == -1) 11132 { 11133 gold_error(_("%s: conflicting CPU architectures %d/%d"), 11134 name, oldtag, newtag); 11135 return -1; 11136 } 11137 11138 return result; 11139 #undef T 11140 } 11141 11142 // Helper to print AEABI enum tag value. 11143 11144 template<bool big_endian> 11145 std::string 11146 Target_arm<big_endian>::aeabi_enum_name(unsigned int value) 11147 { 11148 static const char* aeabi_enum_names[] = 11149 { "", "variable-size", "32-bit", "" }; 11150 const size_t aeabi_enum_names_size = 11151 sizeof(aeabi_enum_names) / sizeof(aeabi_enum_names[0]); 11152 11153 if (value < aeabi_enum_names_size) 11154 return std::string(aeabi_enum_names[value]); 11155 else 11156 { 11157 char buffer[100]; 11158 sprintf(buffer, "<unknown value %u>", value); 11159 return std::string(buffer); 11160 } 11161 } 11162 11163 // Return the string value to store in TAG_CPU_name. 11164 11165 template<bool big_endian> 11166 std::string 11167 Target_arm<big_endian>::tag_cpu_name_value(unsigned int value) 11168 { 11169 static const char* name_table[] = { 11170 // These aren't real CPU names, but we can't guess 11171 // that from the architecture version alone. 11172 "Pre v4", 11173 "ARM v4", 11174 "ARM v4T", 11175 "ARM v5T", 11176 "ARM v5TE", 11177 "ARM v5TEJ", 11178 "ARM v6", 11179 "ARM v6KZ", 11180 "ARM v6T2", 11181 "ARM v6K", 11182 "ARM v7", 11183 "ARM v6-M", 11184 "ARM v6S-M", 11185 "ARM v7E-M", 11186 "ARM v8" 11187 }; 11188 const size_t name_table_size = sizeof(name_table) / sizeof(name_table[0]); 11189 11190 if (value < name_table_size) 11191 return std::string(name_table[value]); 11192 else 11193 { 11194 char buffer[100]; 11195 sprintf(buffer, "<unknown CPU value %u>", value); 11196 return std::string(buffer); 11197 } 11198 } 11199 11200 // Query attributes object to see if integer divide instructions may be 11201 // present in an object. 11202 11203 template<bool big_endian> 11204 bool 11205 Target_arm<big_endian>::attributes_accept_div(int arch, int profile, 11206 const Object_attribute* div_attr) 11207 { 11208 switch (div_attr->int_value()) 11209 { 11210 case 0: 11211 // Integer divide allowed if instruction contained in 11212 // archetecture. 11213 if (arch == elfcpp::TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M')) 11214 return true; 11215 else if (arch >= elfcpp::TAG_CPU_ARCH_V7E_M) 11216 return true; 11217 else 11218 return false; 11219 11220 case 1: 11221 // Integer divide explicitly prohibited. 11222 return false; 11223 11224 default: 11225 // Unrecognised case - treat as allowing divide everywhere. 11226 case 2: 11227 // Integer divide allowed in ARM state. 11228 return true; 11229 } 11230 } 11231 11232 // Query attributes object to see if integer divide instructions are 11233 // forbidden to be in the object. This is not the inverse of 11234 // attributes_accept_div. 11235 11236 template<bool big_endian> 11237 bool 11238 Target_arm<big_endian>::attributes_forbid_div(const Object_attribute* div_attr) 11239 { 11240 return div_attr->int_value() == 1; 11241 } 11242 11243 // Merge object attributes from input file called NAME with those of the 11244 // output. The input object attributes are in the object pointed by PASD. 11245 11246 template<bool big_endian> 11247 void 11248 Target_arm<big_endian>::merge_object_attributes( 11249 const char* name, 11250 const Attributes_section_data* pasd) 11251 { 11252 // Return if there is no attributes section data. 11253 if (pasd == NULL) 11254 return; 11255 11256 // If output has no object attributes, just copy. 11257 const int vendor = Object_attribute::OBJ_ATTR_PROC; 11258 if (this->attributes_section_data_ == NULL) 11259 { 11260 this->attributes_section_data_ = new Attributes_section_data(*pasd); 11261 Object_attribute* out_attr = 11262 this->attributes_section_data_->known_attributes(vendor); 11263 11264 // We do not output objects with Tag_MPextension_use_legacy - we move 11265 // the attribute's value to Tag_MPextension_use. */ 11266 if (out_attr[elfcpp::Tag_MPextension_use_legacy].int_value() != 0) 11267 { 11268 if (out_attr[elfcpp::Tag_MPextension_use].int_value() != 0 11269 && out_attr[elfcpp::Tag_MPextension_use_legacy].int_value() 11270 != out_attr[elfcpp::Tag_MPextension_use].int_value()) 11271 { 11272 gold_error(_("%s has both the current and legacy " 11273 "Tag_MPextension_use attributes"), 11274 name); 11275 } 11276 11277 out_attr[elfcpp::Tag_MPextension_use] = 11278 out_attr[elfcpp::Tag_MPextension_use_legacy]; 11279 out_attr[elfcpp::Tag_MPextension_use_legacy].set_type(0); 11280 out_attr[elfcpp::Tag_MPextension_use_legacy].set_int_value(0); 11281 } 11282 11283 return; 11284 } 11285 11286 const Object_attribute* in_attr = pasd->known_attributes(vendor); 11287 Object_attribute* out_attr = 11288 this->attributes_section_data_->known_attributes(vendor); 11289 11290 // This needs to happen before Tag_ABI_FP_number_model is merged. */ 11291 if (in_attr[elfcpp::Tag_ABI_VFP_args].int_value() 11292 != out_attr[elfcpp::Tag_ABI_VFP_args].int_value()) 11293 { 11294 // Ignore mismatches if the object doesn't use floating point. */ 11295 if (out_attr[elfcpp::Tag_ABI_FP_number_model].int_value() 11296 == elfcpp::AEABI_FP_number_model_none 11297 || (in_attr[elfcpp::Tag_ABI_FP_number_model].int_value() 11298 != elfcpp::AEABI_FP_number_model_none 11299 && out_attr[elfcpp::Tag_ABI_VFP_args].int_value() 11300 == elfcpp::AEABI_VFP_args_compatible)) 11301 out_attr[elfcpp::Tag_ABI_VFP_args].set_int_value( 11302 in_attr[elfcpp::Tag_ABI_VFP_args].int_value()); 11303 else if (in_attr[elfcpp::Tag_ABI_FP_number_model].int_value() 11304 != elfcpp::AEABI_FP_number_model_none 11305 && in_attr[elfcpp::Tag_ABI_VFP_args].int_value() 11306 != elfcpp::AEABI_VFP_args_compatible 11307 && parameters->options().warn_mismatch()) 11308 gold_error(_("%s uses VFP register arguments, output does not"), 11309 name); 11310 } 11311 11312 for (int i = 4; i < Vendor_object_attributes::NUM_KNOWN_ATTRIBUTES; ++i) 11313 { 11314 // Merge this attribute with existing attributes. 11315 switch (i) 11316 { 11317 case elfcpp::Tag_CPU_raw_name: 11318 case elfcpp::Tag_CPU_name: 11319 // These are merged after Tag_CPU_arch. 11320 break; 11321 11322 case elfcpp::Tag_ABI_optimization_goals: 11323 case elfcpp::Tag_ABI_FP_optimization_goals: 11324 // Use the first value seen. 11325 break; 11326 11327 case elfcpp::Tag_CPU_arch: 11328 { 11329 unsigned int saved_out_attr = out_attr->int_value(); 11330 // Merge Tag_CPU_arch and Tag_also_compatible_with. 11331 int secondary_compat = 11332 this->get_secondary_compatible_arch(pasd); 11333 int secondary_compat_out = 11334 this->get_secondary_compatible_arch( 11335 this->attributes_section_data_); 11336 out_attr[i].set_int_value( 11337 tag_cpu_arch_combine(name, out_attr[i].int_value(), 11338 &secondary_compat_out, 11339 in_attr[i].int_value(), 11340 secondary_compat)); 11341 this->set_secondary_compatible_arch(this->attributes_section_data_, 11342 secondary_compat_out); 11343 11344 // Merge Tag_CPU_name and Tag_CPU_raw_name. 11345 if (out_attr[i].int_value() == saved_out_attr) 11346 ; // Leave the names alone. 11347 else if (out_attr[i].int_value() == in_attr[i].int_value()) 11348 { 11349 // The output architecture has been changed to match the 11350 // input architecture. Use the input names. 11351 out_attr[elfcpp::Tag_CPU_name].set_string_value( 11352 in_attr[elfcpp::Tag_CPU_name].string_value()); 11353 out_attr[elfcpp::Tag_CPU_raw_name].set_string_value( 11354 in_attr[elfcpp::Tag_CPU_raw_name].string_value()); 11355 } 11356 else 11357 { 11358 out_attr[elfcpp::Tag_CPU_name].set_string_value(""); 11359 out_attr[elfcpp::Tag_CPU_raw_name].set_string_value(""); 11360 } 11361 11362 // If we still don't have a value for Tag_CPU_name, 11363 // make one up now. Tag_CPU_raw_name remains blank. 11364 if (out_attr[elfcpp::Tag_CPU_name].string_value() == "") 11365 { 11366 const std::string cpu_name = 11367 this->tag_cpu_name_value(out_attr[i].int_value()); 11368 // FIXME: If we see an unknown CPU, this will be set 11369 // to "<unknown CPU n>", where n is the attribute value. 11370 // This is different from BFD, which leaves the name alone. 11371 out_attr[elfcpp::Tag_CPU_name].set_string_value(cpu_name); 11372 } 11373 } 11374 break; 11375 11376 case elfcpp::Tag_ARM_ISA_use: 11377 case elfcpp::Tag_THUMB_ISA_use: 11378 case elfcpp::Tag_WMMX_arch: 11379 case elfcpp::Tag_Advanced_SIMD_arch: 11380 // ??? Do Advanced_SIMD (NEON) and WMMX conflict? 11381 case elfcpp::Tag_ABI_FP_rounding: 11382 case elfcpp::Tag_ABI_FP_exceptions: 11383 case elfcpp::Tag_ABI_FP_user_exceptions: 11384 case elfcpp::Tag_ABI_FP_number_model: 11385 case elfcpp::Tag_VFP_HP_extension: 11386 case elfcpp::Tag_CPU_unaligned_access: 11387 case elfcpp::Tag_T2EE_use: 11388 case elfcpp::Tag_Virtualization_use: 11389 case elfcpp::Tag_MPextension_use: 11390 // Use the largest value specified. 11391 if (in_attr[i].int_value() > out_attr[i].int_value()) 11392 out_attr[i].set_int_value(in_attr[i].int_value()); 11393 break; 11394 11395 case elfcpp::Tag_ABI_align8_preserved: 11396 case elfcpp::Tag_ABI_PCS_RO_data: 11397 // Use the smallest value specified. 11398 if (in_attr[i].int_value() < out_attr[i].int_value()) 11399 out_attr[i].set_int_value(in_attr[i].int_value()); 11400 break; 11401 11402 case elfcpp::Tag_ABI_align8_needed: 11403 if ((in_attr[i].int_value() > 0 || out_attr[i].int_value() > 0) 11404 && (in_attr[elfcpp::Tag_ABI_align8_preserved].int_value() == 0 11405 || (out_attr[elfcpp::Tag_ABI_align8_preserved].int_value() 11406 == 0))) 11407 { 11408 // This error message should be enabled once all non-conforming 11409 // binaries in the toolchain have had the attributes set 11410 // properly. 11411 // gold_error(_("output 8-byte data alignment conflicts with %s"), 11412 // name); 11413 } 11414 // Fall through. 11415 case elfcpp::Tag_ABI_FP_denormal: 11416 case elfcpp::Tag_ABI_PCS_GOT_use: 11417 { 11418 // These tags have 0 = don't care, 1 = strong requirement, 11419 // 2 = weak requirement. 11420 static const int order_021[3] = {0, 2, 1}; 11421 11422 // Use the "greatest" from the sequence 0, 2, 1, or the largest 11423 // value if greater than 2 (for future-proofing). 11424 if ((in_attr[i].int_value() > 2 11425 && in_attr[i].int_value() > out_attr[i].int_value()) 11426 || (in_attr[i].int_value() <= 2 11427 && out_attr[i].int_value() <= 2 11428 && (order_021[in_attr[i].int_value()] 11429 > order_021[out_attr[i].int_value()]))) 11430 out_attr[i].set_int_value(in_attr[i].int_value()); 11431 } 11432 break; 11433 11434 case elfcpp::Tag_CPU_arch_profile: 11435 if (out_attr[i].int_value() != in_attr[i].int_value()) 11436 { 11437 // 0 will merge with anything. 11438 // 'A' and 'S' merge to 'A'. 11439 // 'R' and 'S' merge to 'R'. 11440 // 'M' and 'A|R|S' is an error. 11441 if (out_attr[i].int_value() == 0 11442 || (out_attr[i].int_value() == 'S' 11443 && (in_attr[i].int_value() == 'A' 11444 || in_attr[i].int_value() == 'R'))) 11445 out_attr[i].set_int_value(in_attr[i].int_value()); 11446 else if (in_attr[i].int_value() == 0 11447 || (in_attr[i].int_value() == 'S' 11448 && (out_attr[i].int_value() == 'A' 11449 || out_attr[i].int_value() == 'R'))) 11450 ; // Do nothing. 11451 else if (parameters->options().warn_mismatch()) 11452 { 11453 gold_error 11454 (_("conflicting architecture profiles %c/%c"), 11455 in_attr[i].int_value() ? in_attr[i].int_value() : '0', 11456 out_attr[i].int_value() ? out_attr[i].int_value() : '0'); 11457 } 11458 } 11459 break; 11460 case elfcpp::Tag_VFP_arch: 11461 { 11462 static const struct 11463 { 11464 int ver; 11465 int regs; 11466 } vfp_versions[7] = 11467 { 11468 {0, 0}, 11469 {1, 16}, 11470 {2, 16}, 11471 {3, 32}, 11472 {3, 16}, 11473 {4, 32}, 11474 {4, 16} 11475 }; 11476 11477 // Values greater than 6 aren't defined, so just pick the 11478 // biggest. 11479 if (in_attr[i].int_value() > 6 11480 && in_attr[i].int_value() > out_attr[i].int_value()) 11481 { 11482 *out_attr = *in_attr; 11483 break; 11484 } 11485 // The output uses the superset of input features 11486 // (ISA version) and registers. 11487 int ver = std::max(vfp_versions[in_attr[i].int_value()].ver, 11488 vfp_versions[out_attr[i].int_value()].ver); 11489 int regs = std::max(vfp_versions[in_attr[i].int_value()].regs, 11490 vfp_versions[out_attr[i].int_value()].regs); 11491 // This assumes all possible supersets are also a valid 11492 // options. 11493 int newval; 11494 for (newval = 6; newval > 0; newval--) 11495 { 11496 if (regs == vfp_versions[newval].regs 11497 && ver == vfp_versions[newval].ver) 11498 break; 11499 } 11500 out_attr[i].set_int_value(newval); 11501 } 11502 break; 11503 case elfcpp::Tag_PCS_config: 11504 if (out_attr[i].int_value() == 0) 11505 out_attr[i].set_int_value(in_attr[i].int_value()); 11506 else if (in_attr[i].int_value() != 0 11507 && out_attr[i].int_value() != 0 11508 && parameters->options().warn_mismatch()) 11509 { 11510 // It's sometimes ok to mix different configs, so this is only 11511 // a warning. 11512 gold_warning(_("%s: conflicting platform configuration"), name); 11513 } 11514 break; 11515 case elfcpp::Tag_ABI_PCS_R9_use: 11516 if (in_attr[i].int_value() != out_attr[i].int_value() 11517 && out_attr[i].int_value() != elfcpp::AEABI_R9_unused 11518 && in_attr[i].int_value() != elfcpp::AEABI_R9_unused 11519 && parameters->options().warn_mismatch()) 11520 { 11521 gold_error(_("%s: conflicting use of R9"), name); 11522 } 11523 if (out_attr[i].int_value() == elfcpp::AEABI_R9_unused) 11524 out_attr[i].set_int_value(in_attr[i].int_value()); 11525 break; 11526 case elfcpp::Tag_ABI_PCS_RW_data: 11527 if (in_attr[i].int_value() == elfcpp::AEABI_PCS_RW_data_SBrel 11528 && (in_attr[elfcpp::Tag_ABI_PCS_R9_use].int_value() 11529 != elfcpp::AEABI_R9_SB) 11530 && (out_attr[elfcpp::Tag_ABI_PCS_R9_use].int_value() 11531 != elfcpp::AEABI_R9_unused) 11532 && parameters->options().warn_mismatch()) 11533 { 11534 gold_error(_("%s: SB relative addressing conflicts with use " 11535 "of R9"), 11536 name); 11537 } 11538 // Use the smallest value specified. 11539 if (in_attr[i].int_value() < out_attr[i].int_value()) 11540 out_attr[i].set_int_value(in_attr[i].int_value()); 11541 break; 11542 case elfcpp::Tag_ABI_PCS_wchar_t: 11543 if (out_attr[i].int_value() 11544 && in_attr[i].int_value() 11545 && out_attr[i].int_value() != in_attr[i].int_value() 11546 && parameters->options().warn_mismatch() 11547 && parameters->options().wchar_size_warning()) 11548 { 11549 gold_warning(_("%s uses %u-byte wchar_t yet the output is to " 11550 "use %u-byte wchar_t; use of wchar_t values " 11551 "across objects may fail"), 11552 name, in_attr[i].int_value(), 11553 out_attr[i].int_value()); 11554 } 11555 else if (in_attr[i].int_value() && !out_attr[i].int_value()) 11556 out_attr[i].set_int_value(in_attr[i].int_value()); 11557 break; 11558 case elfcpp::Tag_ABI_enum_size: 11559 if (in_attr[i].int_value() != elfcpp::AEABI_enum_unused) 11560 { 11561 if (out_attr[i].int_value() == elfcpp::AEABI_enum_unused 11562 || out_attr[i].int_value() == elfcpp::AEABI_enum_forced_wide) 11563 { 11564 // The existing object is compatible with anything. 11565 // Use whatever requirements the new object has. 11566 out_attr[i].set_int_value(in_attr[i].int_value()); 11567 } 11568 else if (in_attr[i].int_value() != elfcpp::AEABI_enum_forced_wide 11569 && out_attr[i].int_value() != in_attr[i].int_value() 11570 && parameters->options().warn_mismatch() 11571 && parameters->options().enum_size_warning()) 11572 { 11573 unsigned int in_value = in_attr[i].int_value(); 11574 unsigned int out_value = out_attr[i].int_value(); 11575 gold_warning(_("%s uses %s enums yet the output is to use " 11576 "%s enums; use of enum values across objects " 11577 "may fail"), 11578 name, 11579 this->aeabi_enum_name(in_value).c_str(), 11580 this->aeabi_enum_name(out_value).c_str()); 11581 } 11582 } 11583 break; 11584 case elfcpp::Tag_ABI_VFP_args: 11585 // Already done. 11586 break; 11587 case elfcpp::Tag_ABI_WMMX_args: 11588 if (in_attr[i].int_value() != out_attr[i].int_value() 11589 && parameters->options().warn_mismatch()) 11590 { 11591 gold_error(_("%s uses iWMMXt register arguments, output does " 11592 "not"), 11593 name); 11594 } 11595 break; 11596 case Object_attribute::Tag_compatibility: 11597 // Merged in target-independent code. 11598 break; 11599 case elfcpp::Tag_ABI_HardFP_use: 11600 // 1 (SP) and 2 (DP) conflict, so combine to 3 (SP & DP). 11601 if ((in_attr[i].int_value() == 1 && out_attr[i].int_value() == 2) 11602 || (in_attr[i].int_value() == 2 && out_attr[i].int_value() == 1)) 11603 out_attr[i].set_int_value(3); 11604 else if (in_attr[i].int_value() > out_attr[i].int_value()) 11605 out_attr[i].set_int_value(in_attr[i].int_value()); 11606 break; 11607 case elfcpp::Tag_ABI_FP_16bit_format: 11608 if (in_attr[i].int_value() != 0 && out_attr[i].int_value() != 0) 11609 { 11610 if (in_attr[i].int_value() != out_attr[i].int_value() 11611 && parameters->options().warn_mismatch()) 11612 gold_error(_("fp16 format mismatch between %s and output"), 11613 name); 11614 } 11615 if (in_attr[i].int_value() != 0) 11616 out_attr[i].set_int_value(in_attr[i].int_value()); 11617 break; 11618 11619 case elfcpp::Tag_DIV_use: 11620 { 11621 // A value of zero on input means that the divide 11622 // instruction may be used if available in the base 11623 // architecture as specified via Tag_CPU_arch and 11624 // Tag_CPU_arch_profile. A value of 1 means that the user 11625 // did not want divide instructions. A value of 2 11626 // explicitly means that divide instructions were allowed 11627 // in ARM and Thumb state. 11628 int arch = this-> 11629 get_aeabi_object_attribute(elfcpp::Tag_CPU_arch)-> 11630 int_value(); 11631 int profile = this-> 11632 get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile)-> 11633 int_value(); 11634 if (in_attr[i].int_value() == out_attr[i].int_value()) 11635 { 11636 // Do nothing. 11637 } 11638 else if (attributes_forbid_div(&in_attr[i]) 11639 && !attributes_accept_div(arch, profile, &out_attr[i])) 11640 out_attr[i].set_int_value(1); 11641 else if (attributes_forbid_div(&out_attr[i]) 11642 && attributes_accept_div(arch, profile, &in_attr[i])) 11643 out_attr[i].set_int_value(in_attr[i].int_value()); 11644 else if (in_attr[i].int_value() == 2) 11645 out_attr[i].set_int_value(in_attr[i].int_value()); 11646 } 11647 break; 11648 11649 case elfcpp::Tag_MPextension_use_legacy: 11650 // We don't output objects with Tag_MPextension_use_legacy - we 11651 // move the value to Tag_MPextension_use. 11652 if (in_attr[i].int_value() != 0 11653 && in_attr[elfcpp::Tag_MPextension_use].int_value() != 0) 11654 { 11655 if (in_attr[elfcpp::Tag_MPextension_use].int_value() 11656 != in_attr[i].int_value()) 11657 { 11658 gold_error(_("%s has has both the current and legacy " 11659 "Tag_MPextension_use attributes"), 11660 name); 11661 } 11662 } 11663 11664 if (in_attr[i].int_value() 11665 > out_attr[elfcpp::Tag_MPextension_use].int_value()) 11666 out_attr[elfcpp::Tag_MPextension_use] = in_attr[i]; 11667 11668 break; 11669 11670 case elfcpp::Tag_nodefaults: 11671 // This tag is set if it exists, but the value is unused (and is 11672 // typically zero). We don't actually need to do anything here - 11673 // the merge happens automatically when the type flags are merged 11674 // below. 11675 break; 11676 case elfcpp::Tag_also_compatible_with: 11677 // Already done in Tag_CPU_arch. 11678 break; 11679 case elfcpp::Tag_conformance: 11680 // Keep the attribute if it matches. Throw it away otherwise. 11681 // No attribute means no claim to conform. 11682 if (in_attr[i].string_value() != out_attr[i].string_value()) 11683 out_attr[i].set_string_value(""); 11684 break; 11685 11686 default: 11687 { 11688 const char* err_object = NULL; 11689 11690 // The "known_obj_attributes" table does contain some undefined 11691 // attributes. Ensure that there are unused. 11692 if (out_attr[i].int_value() != 0 11693 || out_attr[i].string_value() != "") 11694 err_object = "output"; 11695 else if (in_attr[i].int_value() != 0 11696 || in_attr[i].string_value() != "") 11697 err_object = name; 11698 11699 if (err_object != NULL 11700 && parameters->options().warn_mismatch()) 11701 { 11702 // Attribute numbers >=64 (mod 128) can be safely ignored. 11703 if ((i & 127) < 64) 11704 gold_error(_("%s: unknown mandatory EABI object attribute " 11705 "%d"), 11706 err_object, i); 11707 else 11708 gold_warning(_("%s: unknown EABI object attribute %d"), 11709 err_object, i); 11710 } 11711 11712 // Only pass on attributes that match in both inputs. 11713 if (!in_attr[i].matches(out_attr[i])) 11714 { 11715 out_attr[i].set_int_value(0); 11716 out_attr[i].set_string_value(""); 11717 } 11718 } 11719 } 11720 11721 // If out_attr was copied from in_attr then it won't have a type yet. 11722 if (in_attr[i].type() && !out_attr[i].type()) 11723 out_attr[i].set_type(in_attr[i].type()); 11724 } 11725 11726 // Merge Tag_compatibility attributes and any common GNU ones. 11727 this->attributes_section_data_->merge(name, pasd); 11728 11729 // Check for any attributes not known on ARM. 11730 typedef Vendor_object_attributes::Other_attributes Other_attributes; 11731 const Other_attributes* in_other_attributes = pasd->other_attributes(vendor); 11732 Other_attributes::const_iterator in_iter = in_other_attributes->begin(); 11733 Other_attributes* out_other_attributes = 11734 this->attributes_section_data_->other_attributes(vendor); 11735 Other_attributes::iterator out_iter = out_other_attributes->begin(); 11736 11737 while (in_iter != in_other_attributes->end() 11738 || out_iter != out_other_attributes->end()) 11739 { 11740 const char* err_object = NULL; 11741 int err_tag = 0; 11742 11743 // The tags for each list are in numerical order. 11744 // If the tags are equal, then merge. 11745 if (out_iter != out_other_attributes->end() 11746 && (in_iter == in_other_attributes->end() 11747 || in_iter->first > out_iter->first)) 11748 { 11749 // This attribute only exists in output. We can't merge, and we 11750 // don't know what the tag means, so delete it. 11751 err_object = "output"; 11752 err_tag = out_iter->first; 11753 int saved_tag = out_iter->first; 11754 delete out_iter->second; 11755 out_other_attributes->erase(out_iter); 11756 out_iter = out_other_attributes->upper_bound(saved_tag); 11757 } 11758 else if (in_iter != in_other_attributes->end() 11759 && (out_iter != out_other_attributes->end() 11760 || in_iter->first < out_iter->first)) 11761 { 11762 // This attribute only exists in input. We can't merge, and we 11763 // don't know what the tag means, so ignore it. 11764 err_object = name; 11765 err_tag = in_iter->first; 11766 ++in_iter; 11767 } 11768 else // The tags are equal. 11769 { 11770 // As present, all attributes in the list are unknown, and 11771 // therefore can't be merged meaningfully. 11772 err_object = "output"; 11773 err_tag = out_iter->first; 11774 11775 // Only pass on attributes that match in both inputs. 11776 if (!in_iter->second->matches(*(out_iter->second))) 11777 { 11778 // No match. Delete the attribute. 11779 int saved_tag = out_iter->first; 11780 delete out_iter->second; 11781 out_other_attributes->erase(out_iter); 11782 out_iter = out_other_attributes->upper_bound(saved_tag); 11783 } 11784 else 11785 { 11786 // Matched. Keep the attribute and move to the next. 11787 ++out_iter; 11788 ++in_iter; 11789 } 11790 } 11791 11792 if (err_object && parameters->options().warn_mismatch()) 11793 { 11794 // Attribute numbers >=64 (mod 128) can be safely ignored. */ 11795 if ((err_tag & 127) < 64) 11796 { 11797 gold_error(_("%s: unknown mandatory EABI object attribute %d"), 11798 err_object, err_tag); 11799 } 11800 else 11801 { 11802 gold_warning(_("%s: unknown EABI object attribute %d"), 11803 err_object, err_tag); 11804 } 11805 } 11806 } 11807 } 11808 11809 // Stub-generation methods for Target_arm. 11810 11811 // Make a new Arm_input_section object. 11812 11813 template<bool big_endian> 11814 Arm_input_section<big_endian>* 11815 Target_arm<big_endian>::new_arm_input_section( 11816 Relobj* relobj, 11817 unsigned int shndx) 11818 { 11819 Section_id sid(relobj, shndx); 11820 11821 Arm_input_section<big_endian>* arm_input_section = 11822 new Arm_input_section<big_endian>(relobj, shndx); 11823 arm_input_section->init(); 11824 11825 // Register new Arm_input_section in map for look-up. 11826 std::pair<typename Arm_input_section_map::iterator, bool> ins = 11827 this->arm_input_section_map_.insert(std::make_pair(sid, arm_input_section)); 11828 11829 // Make sure that it we have not created another Arm_input_section 11830 // for this input section already. 11831 gold_assert(ins.second); 11832 11833 return arm_input_section; 11834 } 11835 11836 // Find the Arm_input_section object corresponding to the SHNDX-th input 11837 // section of RELOBJ. 11838 11839 template<bool big_endian> 11840 Arm_input_section<big_endian>* 11841 Target_arm<big_endian>::find_arm_input_section( 11842 Relobj* relobj, 11843 unsigned int shndx) const 11844 { 11845 Section_id sid(relobj, shndx); 11846 typename Arm_input_section_map::const_iterator p = 11847 this->arm_input_section_map_.find(sid); 11848 return (p != this->arm_input_section_map_.end()) ? p->second : NULL; 11849 } 11850 11851 // Make a new stub table. 11852 11853 template<bool big_endian> 11854 Stub_table<big_endian>* 11855 Target_arm<big_endian>::new_stub_table(Arm_input_section<big_endian>* owner) 11856 { 11857 Stub_table<big_endian>* stub_table = 11858 new Stub_table<big_endian>(owner); 11859 this->stub_tables_.push_back(stub_table); 11860 11861 stub_table->set_address(owner->address() + owner->data_size()); 11862 stub_table->set_file_offset(owner->offset() + owner->data_size()); 11863 stub_table->finalize_data_size(); 11864 11865 return stub_table; 11866 } 11867 11868 // Scan a relocation for stub generation. 11869 11870 template<bool big_endian> 11871 void 11872 Target_arm<big_endian>::scan_reloc_for_stub( 11873 const Relocate_info<32, big_endian>* relinfo, 11874 unsigned int r_type, 11875 const Sized_symbol<32>* gsym, 11876 unsigned int r_sym, 11877 const Symbol_value<32>* psymval, 11878 elfcpp::Elf_types<32>::Elf_Swxword addend, 11879 Arm_address address) 11880 { 11881 const Arm_relobj<big_endian>* arm_relobj = 11882 Arm_relobj<big_endian>::as_arm_relobj(relinfo->object); 11883 11884 bool target_is_thumb; 11885 Symbol_value<32> symval; 11886 if (gsym != NULL) 11887 { 11888 // This is a global symbol. Determine if we use PLT and if the 11889 // final target is THUMB. 11890 if (gsym->use_plt_offset(Scan::get_reference_flags(r_type))) 11891 { 11892 // This uses a PLT, change the symbol value. 11893 symval.set_output_value(this->plt_address_for_global(gsym)); 11894 psymval = &symval; 11895 target_is_thumb = false; 11896 } 11897 else if (gsym->is_undefined()) 11898 // There is no need to generate a stub symbol is undefined. 11899 return; 11900 else 11901 { 11902 target_is_thumb = 11903 ((gsym->type() == elfcpp::STT_ARM_TFUNC) 11904 || (gsym->type() == elfcpp::STT_FUNC 11905 && !gsym->is_undefined() 11906 && ((psymval->value(arm_relobj, 0) & 1) != 0))); 11907 } 11908 } 11909 else 11910 { 11911 // This is a local symbol. Determine if the final target is THUMB. 11912 target_is_thumb = arm_relobj->local_symbol_is_thumb_function(r_sym); 11913 } 11914 11915 // Strip LSB if this points to a THUMB target. 11916 const Arm_reloc_property* reloc_property = 11917 arm_reloc_property_table->get_implemented_static_reloc_property(r_type); 11918 gold_assert(reloc_property != NULL); 11919 if (target_is_thumb 11920 && reloc_property->uses_thumb_bit() 11921 && ((psymval->value(arm_relobj, 0) & 1) != 0)) 11922 { 11923 Arm_address stripped_value = 11924 psymval->value(arm_relobj, 0) & ~static_cast<Arm_address>(1); 11925 symval.set_output_value(stripped_value); 11926 psymval = &symval; 11927 } 11928 11929 // Get the symbol value. 11930 Symbol_value<32>::Value value = psymval->value(arm_relobj, 0); 11931 11932 // Owing to pipelining, the PC relative branches below actually skip 11933 // two instructions when the branch offset is 0. 11934 Arm_address destination; 11935 switch (r_type) 11936 { 11937 case elfcpp::R_ARM_CALL: 11938 case elfcpp::R_ARM_JUMP24: 11939 case elfcpp::R_ARM_PLT32: 11940 // ARM branches. 11941 destination = value + addend + 8; 11942 break; 11943 case elfcpp::R_ARM_THM_CALL: 11944 case elfcpp::R_ARM_THM_XPC22: 11945 case elfcpp::R_ARM_THM_JUMP24: 11946 case elfcpp::R_ARM_THM_JUMP19: 11947 // THUMB branches. 11948 destination = value + addend + 4; 11949 break; 11950 default: 11951 gold_unreachable(); 11952 } 11953 11954 Reloc_stub* stub = NULL; 11955 Stub_type stub_type = 11956 Reloc_stub::stub_type_for_reloc(r_type, address, destination, 11957 target_is_thumb); 11958 if (stub_type != arm_stub_none) 11959 { 11960 // Try looking up an existing stub from a stub table. 11961 Stub_table<big_endian>* stub_table = 11962 arm_relobj->stub_table(relinfo->data_shndx); 11963 gold_assert(stub_table != NULL); 11964 11965 // Locate stub by destination. 11966 Reloc_stub::Key stub_key(stub_type, gsym, arm_relobj, r_sym, addend); 11967 11968 // Create a stub if there is not one already 11969 stub = stub_table->find_reloc_stub(stub_key); 11970 if (stub == NULL) 11971 { 11972 // create a new stub and add it to stub table. 11973 stub = this->stub_factory().make_reloc_stub(stub_type); 11974 stub_table->add_reloc_stub(stub, stub_key); 11975 } 11976 11977 // Record the destination address. 11978 stub->set_destination_address(destination 11979 | (target_is_thumb ? 1 : 0)); 11980 } 11981 11982 // For Cortex-A8, we need to record a relocation at 4K page boundary. 11983 if (this->fix_cortex_a8_ 11984 && (r_type == elfcpp::R_ARM_THM_JUMP24 11985 || r_type == elfcpp::R_ARM_THM_JUMP19 11986 || r_type == elfcpp::R_ARM_THM_CALL 11987 || r_type == elfcpp::R_ARM_THM_XPC22) 11988 && (address & 0xfffU) == 0xffeU) 11989 { 11990 // Found a candidate. Note we haven't checked the destination is 11991 // within 4K here: if we do so (and don't create a record) we can't 11992 // tell that a branch should have been relocated when scanning later. 11993 this->cortex_a8_relocs_info_[address] = 11994 new Cortex_a8_reloc(stub, r_type, 11995 destination | (target_is_thumb ? 1 : 0)); 11996 } 11997 } 11998 11999 // This function scans a relocation sections for stub generation. 12000 // The template parameter Relocate must be a class type which provides 12001 // a single function, relocate(), which implements the machine 12002 // specific part of a relocation. 12003 12004 // BIG_ENDIAN is the endianness of the data. SH_TYPE is the section type: 12005 // SHT_REL or SHT_RELA. 12006 12007 // PRELOCS points to the relocation data. RELOC_COUNT is the number 12008 // of relocs. OUTPUT_SECTION is the output section. 12009 // NEEDS_SPECIAL_OFFSET_HANDLING is true if input offsets need to be 12010 // mapped to output offsets. 12011 12012 // VIEW is the section data, VIEW_ADDRESS is its memory address, and 12013 // VIEW_SIZE is the size. These refer to the input section, unless 12014 // NEEDS_SPECIAL_OFFSET_HANDLING is true, in which case they refer to 12015 // the output section. 12016 12017 template<bool big_endian> 12018 template<int sh_type> 12019 void inline 12020 Target_arm<big_endian>::scan_reloc_section_for_stubs( 12021 const Relocate_info<32, big_endian>* relinfo, 12022 const unsigned char* prelocs, 12023 size_t reloc_count, 12024 Output_section* output_section, 12025 bool needs_special_offset_handling, 12026 const unsigned char* view, 12027 elfcpp::Elf_types<32>::Elf_Addr view_address, 12028 section_size_type) 12029 { 12030 typedef typename Reloc_types<sh_type, 32, big_endian>::Reloc Reltype; 12031 const int reloc_size = 12032 Reloc_types<sh_type, 32, big_endian>::reloc_size; 12033 12034 Arm_relobj<big_endian>* arm_object = 12035 Arm_relobj<big_endian>::as_arm_relobj(relinfo->object); 12036 unsigned int local_count = arm_object->local_symbol_count(); 12037 12038 gold::Default_comdat_behavior default_comdat_behavior; 12039 Comdat_behavior comdat_behavior = CB_UNDETERMINED; 12040 12041 for (size_t i = 0; i < reloc_count; ++i, prelocs += reloc_size) 12042 { 12043 Reltype reloc(prelocs); 12044 12045 typename elfcpp::Elf_types<32>::Elf_WXword r_info = reloc.get_r_info(); 12046 unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info); 12047 unsigned int r_type = elfcpp::elf_r_type<32>(r_info); 12048 12049 r_type = this->get_real_reloc_type(r_type); 12050 12051 // Only a few relocation types need stubs. 12052 if ((r_type != elfcpp::R_ARM_CALL) 12053 && (r_type != elfcpp::R_ARM_JUMP24) 12054 && (r_type != elfcpp::R_ARM_PLT32) 12055 && (r_type != elfcpp::R_ARM_THM_CALL) 12056 && (r_type != elfcpp::R_ARM_THM_XPC22) 12057 && (r_type != elfcpp::R_ARM_THM_JUMP24) 12058 && (r_type != elfcpp::R_ARM_THM_JUMP19) 12059 && (r_type != elfcpp::R_ARM_V4BX)) 12060 continue; 12061 12062 section_offset_type offset = 12063 convert_to_section_size_type(reloc.get_r_offset()); 12064 12065 if (needs_special_offset_handling) 12066 { 12067 offset = output_section->output_offset(relinfo->object, 12068 relinfo->data_shndx, 12069 offset); 12070 if (offset == -1) 12071 continue; 12072 } 12073 12074 // Create a v4bx stub if --fix-v4bx-interworking is used. 12075 if (r_type == elfcpp::R_ARM_V4BX) 12076 { 12077 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING) 12078 { 12079 // Get the BX instruction. 12080 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; 12081 const Valtype* wv = 12082 reinterpret_cast<const Valtype*>(view + offset); 12083 elfcpp::Elf_types<32>::Elf_Swxword insn = 12084 elfcpp::Swap<32, big_endian>::readval(wv); 12085 const uint32_t reg = (insn & 0xf); 12086 12087 if (reg < 0xf) 12088 { 12089 // Try looking up an existing stub from a stub table. 12090 Stub_table<big_endian>* stub_table = 12091 arm_object->stub_table(relinfo->data_shndx); 12092 gold_assert(stub_table != NULL); 12093 12094 if (stub_table->find_arm_v4bx_stub(reg) == NULL) 12095 { 12096 // create a new stub and add it to stub table. 12097 Arm_v4bx_stub* stub = 12098 this->stub_factory().make_arm_v4bx_stub(reg); 12099 gold_assert(stub != NULL); 12100 stub_table->add_arm_v4bx_stub(stub); 12101 } 12102 } 12103 } 12104 continue; 12105 } 12106 12107 // Get the addend. 12108 Stub_addend_reader<sh_type, big_endian> stub_addend_reader; 12109 elfcpp::Elf_types<32>::Elf_Swxword addend = 12110 stub_addend_reader(r_type, view + offset, reloc); 12111 12112 const Sized_symbol<32>* sym; 12113 12114 Symbol_value<32> symval; 12115 const Symbol_value<32> *psymval; 12116 bool is_defined_in_discarded_section; 12117 unsigned int shndx; 12118 if (r_sym < local_count) 12119 { 12120 sym = NULL; 12121 psymval = arm_object->local_symbol(r_sym); 12122 12123 // If the local symbol belongs to a section we are discarding, 12124 // and that section is a debug section, try to find the 12125 // corresponding kept section and map this symbol to its 12126 // counterpart in the kept section. The symbol must not 12127 // correspond to a section we are folding. 12128 bool is_ordinary; 12129 shndx = psymval->input_shndx(&is_ordinary); 12130 is_defined_in_discarded_section = 12131 (is_ordinary 12132 && shndx != elfcpp::SHN_UNDEF 12133 && !arm_object->is_section_included(shndx) 12134 && !relinfo->symtab->is_section_folded(arm_object, shndx)); 12135 12136 // We need to compute the would-be final value of this local 12137 // symbol. 12138 if (!is_defined_in_discarded_section) 12139 { 12140 typedef Sized_relobj_file<32, big_endian> ObjType; 12141 if (psymval->is_section_symbol()) 12142 symval.set_is_section_symbol(); 12143 typename ObjType::Compute_final_local_value_status status = 12144 arm_object->compute_final_local_value(r_sym, psymval, &symval, 12145 relinfo->symtab); 12146 if (status == ObjType::CFLV_OK) 12147 { 12148 // Currently we cannot handle a branch to a target in 12149 // a merged section. If this is the case, issue an error 12150 // and also free the merge symbol value. 12151 if (!symval.has_output_value()) 12152 { 12153 const std::string& section_name = 12154 arm_object->section_name(shndx); 12155 arm_object->error(_("cannot handle branch to local %u " 12156 "in a merged section %s"), 12157 r_sym, section_name.c_str()); 12158 } 12159 psymval = &symval; 12160 } 12161 else 12162 { 12163 // We cannot determine the final value. 12164 continue; 12165 } 12166 } 12167 } 12168 else 12169 { 12170 const Symbol* gsym; 12171 gsym = arm_object->global_symbol(r_sym); 12172 gold_assert(gsym != NULL); 12173 if (gsym->is_forwarder()) 12174 gsym = relinfo->symtab->resolve_forwards(gsym); 12175 12176 sym = static_cast<const Sized_symbol<32>*>(gsym); 12177 if (sym->has_symtab_index() && sym->symtab_index() != -1U) 12178 symval.set_output_symtab_index(sym->symtab_index()); 12179 else 12180 symval.set_no_output_symtab_entry(); 12181 12182 // We need to compute the would-be final value of this global 12183 // symbol. 12184 const Symbol_table* symtab = relinfo->symtab; 12185 const Sized_symbol<32>* sized_symbol = 12186 symtab->get_sized_symbol<32>(gsym); 12187 Symbol_table::Compute_final_value_status status; 12188 Arm_address value = 12189 symtab->compute_final_value<32>(sized_symbol, &status); 12190 12191 // Skip this if the symbol has not output section. 12192 if (status == Symbol_table::CFVS_NO_OUTPUT_SECTION) 12193 continue; 12194 symval.set_output_value(value); 12195 12196 if (gsym->type() == elfcpp::STT_TLS) 12197 symval.set_is_tls_symbol(); 12198 else if (gsym->type() == elfcpp::STT_GNU_IFUNC) 12199 symval.set_is_ifunc_symbol(); 12200 psymval = &symval; 12201 12202 is_defined_in_discarded_section = 12203 (gsym->is_defined_in_discarded_section() 12204 && gsym->is_undefined()); 12205 shndx = 0; 12206 } 12207 12208 Symbol_value<32> symval2; 12209 if (is_defined_in_discarded_section) 12210 { 12211 if (comdat_behavior == CB_UNDETERMINED) 12212 { 12213 std::string name = arm_object->section_name(relinfo->data_shndx); 12214 comdat_behavior = default_comdat_behavior.get(name.c_str()); 12215 } 12216 if (comdat_behavior == CB_PRETEND) 12217 { 12218 // FIXME: This case does not work for global symbols. 12219 // We have no place to store the original section index. 12220 // Fortunately this does not matter for comdat sections, 12221 // only for sections explicitly discarded by a linker 12222 // script. 12223 bool found; 12224 typename elfcpp::Elf_types<32>::Elf_Addr value = 12225 arm_object->map_to_kept_section(shndx, &found); 12226 if (found) 12227 symval2.set_output_value(value + psymval->input_value()); 12228 else 12229 symval2.set_output_value(0); 12230 } 12231 else 12232 { 12233 if (comdat_behavior == CB_WARNING) 12234 gold_warning_at_location(relinfo, i, offset, 12235 _("relocation refers to discarded " 12236 "section")); 12237 symval2.set_output_value(0); 12238 } 12239 symval2.set_no_output_symtab_entry(); 12240 psymval = &symval2; 12241 } 12242 12243 // If symbol is a section symbol, we don't know the actual type of 12244 // destination. Give up. 12245 if (psymval->is_section_symbol()) 12246 continue; 12247 12248 this->scan_reloc_for_stub(relinfo, r_type, sym, r_sym, psymval, 12249 addend, view_address + offset); 12250 } 12251 } 12252 12253 // Scan an input section for stub generation. 12254 12255 template<bool big_endian> 12256 void 12257 Target_arm<big_endian>::scan_section_for_stubs( 12258 const Relocate_info<32, big_endian>* relinfo, 12259 unsigned int sh_type, 12260 const unsigned char* prelocs, 12261 size_t reloc_count, 12262 Output_section* output_section, 12263 bool needs_special_offset_handling, 12264 const unsigned char* view, 12265 Arm_address view_address, 12266 section_size_type view_size) 12267 { 12268 if (sh_type == elfcpp::SHT_REL) 12269 this->scan_reloc_section_for_stubs<elfcpp::SHT_REL>( 12270 relinfo, 12271 prelocs, 12272 reloc_count, 12273 output_section, 12274 needs_special_offset_handling, 12275 view, 12276 view_address, 12277 view_size); 12278 else if (sh_type == elfcpp::SHT_RELA) 12279 // We do not support RELA type relocations yet. This is provided for 12280 // completeness. 12281 this->scan_reloc_section_for_stubs<elfcpp::SHT_RELA>( 12282 relinfo, 12283 prelocs, 12284 reloc_count, 12285 output_section, 12286 needs_special_offset_handling, 12287 view, 12288 view_address, 12289 view_size); 12290 else 12291 gold_unreachable(); 12292 } 12293 12294 // Group input sections for stub generation. 12295 // 12296 // We group input sections in an output section so that the total size, 12297 // including any padding space due to alignment is smaller than GROUP_SIZE 12298 // unless the only input section in group is bigger than GROUP_SIZE already. 12299 // Then an ARM stub table is created to follow the last input section 12300 // in group. For each group an ARM stub table is created an is placed 12301 // after the last group. If STUB_ALWAYS_AFTER_BRANCH is false, we further 12302 // extend the group after the stub table. 12303 12304 template<bool big_endian> 12305 void 12306 Target_arm<big_endian>::group_sections( 12307 Layout* layout, 12308 section_size_type group_size, 12309 bool stubs_always_after_branch, 12310 const Task* task) 12311 { 12312 // Group input sections and insert stub table 12313 Layout::Section_list section_list; 12314 layout->get_executable_sections(§ion_list); 12315 for (Layout::Section_list::const_iterator p = section_list.begin(); 12316 p != section_list.end(); 12317 ++p) 12318 { 12319 Arm_output_section<big_endian>* output_section = 12320 Arm_output_section<big_endian>::as_arm_output_section(*p); 12321 output_section->group_sections(group_size, stubs_always_after_branch, 12322 this, task); 12323 } 12324 } 12325 12326 // Relaxation hook. This is where we do stub generation. 12327 12328 template<bool big_endian> 12329 bool 12330 Target_arm<big_endian>::do_relax( 12331 int pass, 12332 const Input_objects* input_objects, 12333 Symbol_table* symtab, 12334 Layout* layout, 12335 const Task* task) 12336 { 12337 if (pass == 1) 12338 { 12339 Layout::Section_list::const_iterator p = layout->section_list().begin(); 12340 for ( ; p != layout->section_list().end(); ++p) 12341 { 12342 if (is_prefix_of(".relr.dyn", (*p)->name())) 12343 break; 12344 } 12345 12346 if (p != layout->section_list().end()) 12347 { 12348 Output_section * const os = *p; 12349 for (Output_section::Input_section_list::iterator ip = os->input_sections().begin(); 12350 ip != os->input_sections().end(); 12351 ++ip) 12352 { 12353 Relr_section *od = static_cast<Relr_section *>(ip->output_section_data()); 12354 od->shrink_relocs(); 12355 } 12356 } 12357 12358 return true; 12359 } 12360 12361 if (parameters->options().relocatable()) 12362 return false; 12363 12364 // If this is the second pass, we need to group input sections into 12365 // stub groups. 12366 bool done_exidx_fixup = false; 12367 typedef typename Stub_table_list::iterator Stub_table_iterator; 12368 if (pass == 2) 12369 { 12370 // Determine the stub group size. The group size is the absolute 12371 // value of the parameter --stub-group-size. If --stub-group-size 12372 // is passed a negative value, we restrict stubs to be always after 12373 // the stubbed branches. 12374 int32_t stub_group_size_param = 12375 parameters->options().stub_group_size(); 12376 bool stubs_always_after_branch = stub_group_size_param < 0; 12377 section_size_type stub_group_size = abs(stub_group_size_param); 12378 12379 if (stub_group_size == 1) 12380 { 12381 // Default value. 12382 // Thumb branch range is +-4MB has to be used as the default 12383 // maximum size (a given section can contain both ARM and Thumb 12384 // code, so the worst case has to be taken into account). If we are 12385 // fixing cortex-a8 errata, the branch range has to be even smaller, 12386 // since wide conditional branch has a range of +-1MB only. 12387 // 12388 // This value is 48K less than that, which allows for 4096 12389 // 12-byte stubs. If we exceed that, then we will fail to link. 12390 // The user will have to relink with an explicit group size 12391 // option. 12392 stub_group_size = 4145152; 12393 } 12394 12395 // The Cortex-A8 erratum fix depends on stubs not being in the same 4K 12396 // page as the first half of a 32-bit branch straddling two 4K pages. 12397 // This is a crude way of enforcing that. In addition, long conditional 12398 // branches of THUMB-2 have a range of +-1M. If we are fixing cortex-A8 12399 // erratum, limit the group size to (1M - 12k) to avoid unreachable 12400 // cortex-A8 stubs from long conditional branches. 12401 if (this->fix_cortex_a8_) 12402 { 12403 stubs_always_after_branch = true; 12404 const section_size_type cortex_a8_group_size = 1024 * (1024 - 12); 12405 stub_group_size = std::max(stub_group_size, cortex_a8_group_size); 12406 } 12407 12408 group_sections(layout, stub_group_size, stubs_always_after_branch, task); 12409 12410 // Also fix .ARM.exidx section coverage. 12411 Arm_output_section<big_endian>* exidx_output_section = NULL; 12412 for (Layout::Section_list::const_iterator p = 12413 layout->section_list().begin(); 12414 p != layout->section_list().end(); 12415 ++p) 12416 if ((*p)->type() == elfcpp::SHT_ARM_EXIDX) 12417 { 12418 if (exidx_output_section == NULL) 12419 exidx_output_section = 12420 Arm_output_section<big_endian>::as_arm_output_section(*p); 12421 else 12422 // We cannot handle this now. 12423 gold_error(_("multiple SHT_ARM_EXIDX sections %s and %s in a " 12424 "non-relocatable link"), 12425 exidx_output_section->name(), 12426 (*p)->name()); 12427 } 12428 12429 if (exidx_output_section != NULL) 12430 { 12431 this->fix_exidx_coverage(layout, input_objects, exidx_output_section, 12432 symtab, task); 12433 done_exidx_fixup = true; 12434 } 12435 } 12436 else 12437 { 12438 // If this is not the second pass, addresses and file offsets have 12439 // been reset at this point, set them here. 12440 for (Stub_table_iterator sp = this->stub_tables_.begin(); 12441 sp != this->stub_tables_.end(); 12442 ++sp) 12443 { 12444 Arm_input_section<big_endian>* owner = (*sp)->owner(); 12445 off_t off = align_address(owner->original_size(), 12446 (*sp)->addralign()); 12447 (*sp)->set_address_and_file_offset(owner->address() + off, 12448 owner->offset() + off); 12449 } 12450 } 12451 12452 // The Cortex-A8 stubs are sensitive to layout of code sections. At the 12453 // beginning of each relaxation pass, just blow away all the stubs. 12454 // Alternatively, we could selectively remove only the stubs and reloc 12455 // information for code sections that have moved since the last pass. 12456 // That would require more book-keeping. 12457 if (this->fix_cortex_a8_) 12458 { 12459 // Clear all Cortex-A8 reloc information. 12460 for (typename Cortex_a8_relocs_info::const_iterator p = 12461 this->cortex_a8_relocs_info_.begin(); 12462 p != this->cortex_a8_relocs_info_.end(); 12463 ++p) 12464 delete p->second; 12465 this->cortex_a8_relocs_info_.clear(); 12466 12467 // Remove all Cortex-A8 stubs. 12468 for (Stub_table_iterator sp = this->stub_tables_.begin(); 12469 sp != this->stub_tables_.end(); 12470 ++sp) 12471 (*sp)->remove_all_cortex_a8_stubs(); 12472 } 12473 12474 // Scan relocs for relocation stubs 12475 for (Input_objects::Relobj_iterator op = input_objects->relobj_begin(); 12476 op != input_objects->relobj_end(); 12477 ++op) 12478 { 12479 Arm_relobj<big_endian>* arm_relobj = 12480 Arm_relobj<big_endian>::as_arm_relobj(*op); 12481 // Lock the object so we can read from it. This is only called 12482 // single-threaded from Layout::finalize, so it is OK to lock. 12483 Task_lock_obj<Object> tl(task, arm_relobj); 12484 arm_relobj->scan_sections_for_stubs(this, symtab, layout); 12485 } 12486 12487 // Check all stub tables to see if any of them have their data sizes 12488 // or addresses alignments changed. These are the only things that 12489 // matter. 12490 bool any_stub_table_changed = false; 12491 Unordered_set<const Output_section*> sections_needing_adjustment; 12492 for (Stub_table_iterator sp = this->stub_tables_.begin(); 12493 (sp != this->stub_tables_.end() 12494 && (parameters->options().stub_group_auto_padding() 12495 || !any_stub_table_changed)); 12496 ++sp) 12497 { 12498 if ((*sp)->update_data_size_and_addralign()) 12499 { 12500 // Update data size of stub table owner. 12501 Arm_input_section<big_endian>* owner = (*sp)->owner(); 12502 uint64_t address = owner->address(); 12503 off_t offset = owner->offset(); 12504 owner->reset_address_and_file_offset(); 12505 owner->set_address_and_file_offset(address, offset); 12506 12507 sections_needing_adjustment.insert(owner->output_section()); 12508 any_stub_table_changed = true; 12509 } 12510 } 12511 12512 // Output_section_data::output_section() returns a const pointer but we 12513 // need to update output sections, so we record all output sections needing 12514 // update above and scan the sections here to find out what sections need 12515 // to be updated. 12516 for (Layout::Section_list::const_iterator p = layout->section_list().begin(); 12517 p != layout->section_list().end(); 12518 ++p) 12519 { 12520 if (sections_needing_adjustment.find(*p) 12521 != sections_needing_adjustment.end()) 12522 (*p)->set_section_offsets_need_adjustment(); 12523 } 12524 12525 // Stop relaxation if no EXIDX fix-up and no stub table change. 12526 bool continue_relaxation = done_exidx_fixup || any_stub_table_changed; 12527 12528 // Finalize the stubs in the last relaxation pass. 12529 if (!continue_relaxation) 12530 { 12531 for (Stub_table_iterator sp = this->stub_tables_.begin(); 12532 (sp != this->stub_tables_.end()) && !any_stub_table_changed; 12533 ++sp) 12534 (*sp)->finalize_stubs(); 12535 12536 // Update output local symbol counts of objects if necessary. 12537 for (Input_objects::Relobj_iterator op = input_objects->relobj_begin(); 12538 op != input_objects->relobj_end(); 12539 ++op) 12540 { 12541 Arm_relobj<big_endian>* arm_relobj = 12542 Arm_relobj<big_endian>::as_arm_relobj(*op); 12543 12544 // Update output local symbol counts. We need to discard local 12545 // symbols defined in parts of input sections that are discarded by 12546 // relaxation. 12547 if (arm_relobj->output_local_symbol_count_needs_update()) 12548 { 12549 // We need to lock the object's file to update it. 12550 Task_lock_obj<Object> tl(task, arm_relobj); 12551 arm_relobj->update_output_local_symbol_count(); 12552 } 12553 } 12554 } 12555 12556 return continue_relaxation; 12557 } 12558 12559 // Relocate a stub. 12560 12561 template<bool big_endian> 12562 void 12563 Target_arm<big_endian>::relocate_stub( 12564 Stub* stub, 12565 const Relocate_info<32, big_endian>* relinfo, 12566 Output_section* output_section, 12567 unsigned char* view, 12568 Arm_address address, 12569 section_size_type view_size) 12570 { 12571 Relocate relocate; 12572 const Stub_template* stub_template = stub->stub_template(); 12573 for (size_t i = 0; i < stub_template->reloc_count(); i++) 12574 { 12575 size_t reloc_insn_index = stub_template->reloc_insn_index(i); 12576 const Insn_template* insn = &stub_template->insns()[reloc_insn_index]; 12577 12578 unsigned int r_type = insn->r_type(); 12579 section_size_type reloc_offset = stub_template->reloc_offset(i); 12580 section_size_type reloc_size = insn->size(); 12581 gold_assert(reloc_offset + reloc_size <= view_size); 12582 12583 // This is the address of the stub destination. 12584 Arm_address target = stub->reloc_target(i) + insn->reloc_addend(); 12585 Symbol_value<32> symval; 12586 symval.set_output_value(target); 12587 12588 // Synthesize a fake reloc just in case. We don't have a symbol so 12589 // we use 0. 12590 unsigned char reloc_buffer[elfcpp::Elf_sizes<32>::rel_size]; 12591 memset(reloc_buffer, 0, sizeof(reloc_buffer)); 12592 elfcpp::Rel_write<32, big_endian> reloc_write(reloc_buffer); 12593 reloc_write.put_r_offset(reloc_offset); 12594 reloc_write.put_r_info(elfcpp::elf_r_info<32>(0, r_type)); 12595 12596 relocate.relocate(relinfo, elfcpp::SHT_REL, this, output_section, 12597 this->fake_relnum_for_stubs, reloc_buffer, 12598 NULL, &symval, view + reloc_offset, 12599 address + reloc_offset, reloc_size); 12600 } 12601 } 12602 12603 // Determine whether an object attribute tag takes an integer, a 12604 // string or both. 12605 12606 template<bool big_endian> 12607 int 12608 Target_arm<big_endian>::do_attribute_arg_type(int tag) const 12609 { 12610 if (tag == Object_attribute::Tag_compatibility) 12611 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL 12612 | Object_attribute::ATTR_TYPE_FLAG_STR_VAL); 12613 else if (tag == elfcpp::Tag_nodefaults) 12614 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL 12615 | Object_attribute::ATTR_TYPE_FLAG_NO_DEFAULT); 12616 else if (tag == elfcpp::Tag_CPU_raw_name || tag == elfcpp::Tag_CPU_name) 12617 return Object_attribute::ATTR_TYPE_FLAG_STR_VAL; 12618 else if (tag < 32) 12619 return Object_attribute::ATTR_TYPE_FLAG_INT_VAL; 12620 else 12621 return ((tag & 1) != 0 12622 ? Object_attribute::ATTR_TYPE_FLAG_STR_VAL 12623 : Object_attribute::ATTR_TYPE_FLAG_INT_VAL); 12624 } 12625 12626 // Reorder attributes. 12627 // 12628 // The ABI defines that Tag_conformance should be emitted first, and that 12629 // Tag_nodefaults should be second (if either is defined). This sets those 12630 // two positions, and bumps up the position of all the remaining tags to 12631 // compensate. 12632 12633 template<bool big_endian> 12634 int 12635 Target_arm<big_endian>::do_attributes_order(int num) const 12636 { 12637 // Reorder the known object attributes in output. We want to move 12638 // Tag_conformance to position 4 and Tag_conformance to position 5 12639 // and shift everything between 4 .. Tag_conformance - 1 to make room. 12640 if (num == 4) 12641 return elfcpp::Tag_conformance; 12642 if (num == 5) 12643 return elfcpp::Tag_nodefaults; 12644 if ((num - 2) < elfcpp::Tag_nodefaults) 12645 return num - 2; 12646 if ((num - 1) < elfcpp::Tag_conformance) 12647 return num - 1; 12648 return num; 12649 } 12650 12651 // Scan a span of THUMB code for Cortex-A8 erratum. 12652 12653 template<bool big_endian> 12654 void 12655 Target_arm<big_endian>::scan_span_for_cortex_a8_erratum( 12656 Arm_relobj<big_endian>* arm_relobj, 12657 unsigned int shndx, 12658 section_size_type span_start, 12659 section_size_type span_end, 12660 const unsigned char* view, 12661 Arm_address address) 12662 { 12663 // Scan for 32-bit Thumb-2 branches which span two 4K regions, where: 12664 // 12665 // The opcode is BLX.W, BL.W, B.W, Bcc.W 12666 // The branch target is in the same 4KB region as the 12667 // first half of the branch. 12668 // The instruction before the branch is a 32-bit 12669 // length non-branch instruction. 12670 section_size_type i = span_start; 12671 bool last_was_32bit = false; 12672 bool last_was_branch = false; 12673 while (i < span_end) 12674 { 12675 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; 12676 const Valtype* wv = reinterpret_cast<const Valtype*>(view + i); 12677 uint32_t insn = elfcpp::Swap<16, big_endian>::readval(wv); 12678 bool is_blx = false, is_b = false; 12679 bool is_bl = false, is_bcc = false; 12680 12681 bool insn_32bit = (insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000; 12682 if (insn_32bit) 12683 { 12684 // Load the rest of the insn (in manual-friendly order). 12685 insn = (insn << 16) | elfcpp::Swap<16, big_endian>::readval(wv + 1); 12686 12687 // Encoding T4: B<c>.W. 12688 is_b = (insn & 0xf800d000U) == 0xf0009000U; 12689 // Encoding T1: BL<c>.W. 12690 is_bl = (insn & 0xf800d000U) == 0xf000d000U; 12691 // Encoding T2: BLX<c>.W. 12692 is_blx = (insn & 0xf800d000U) == 0xf000c000U; 12693 // Encoding T3: B<c>.W (not permitted in IT block). 12694 is_bcc = ((insn & 0xf800d000U) == 0xf0008000U 12695 && (insn & 0x07f00000U) != 0x03800000U); 12696 } 12697 12698 bool is_32bit_branch = is_b || is_bl || is_blx || is_bcc; 12699 12700 // If this instruction is a 32-bit THUMB branch that crosses a 4K 12701 // page boundary and it follows 32-bit non-branch instruction, 12702 // we need to work around. 12703 if (is_32bit_branch 12704 && ((address + i) & 0xfffU) == 0xffeU 12705 && last_was_32bit 12706 && !last_was_branch) 12707 { 12708 // Check to see if there is a relocation stub for this branch. 12709 bool force_target_arm = false; 12710 bool force_target_thumb = false; 12711 const Cortex_a8_reloc* cortex_a8_reloc = NULL; 12712 Cortex_a8_relocs_info::const_iterator p = 12713 this->cortex_a8_relocs_info_.find(address + i); 12714 12715 if (p != this->cortex_a8_relocs_info_.end()) 12716 { 12717 cortex_a8_reloc = p->second; 12718 bool target_is_thumb = (cortex_a8_reloc->destination() & 1) != 0; 12719 12720 if (cortex_a8_reloc->r_type() == elfcpp::R_ARM_THM_CALL 12721 && !target_is_thumb) 12722 force_target_arm = true; 12723 else if (cortex_a8_reloc->r_type() == elfcpp::R_ARM_THM_CALL 12724 && target_is_thumb) 12725 force_target_thumb = true; 12726 } 12727 12728 off_t offset; 12729 Stub_type stub_type = arm_stub_none; 12730 12731 // Check if we have an offending branch instruction. 12732 uint16_t upper_insn = (insn >> 16) & 0xffffU; 12733 uint16_t lower_insn = insn & 0xffffU; 12734 typedef class Arm_relocate_functions<big_endian> RelocFuncs; 12735 12736 if (cortex_a8_reloc != NULL 12737 && cortex_a8_reloc->reloc_stub() != NULL) 12738 // We've already made a stub for this instruction, e.g. 12739 // it's a long branch or a Thumb->ARM stub. Assume that 12740 // stub will suffice to work around the A8 erratum (see 12741 // setting of always_after_branch above). 12742 ; 12743 else if (is_bcc) 12744 { 12745 offset = RelocFuncs::thumb32_cond_branch_offset(upper_insn, 12746 lower_insn); 12747 stub_type = arm_stub_a8_veneer_b_cond; 12748 } 12749 else if (is_b || is_bl || is_blx) 12750 { 12751 offset = RelocFuncs::thumb32_branch_offset(upper_insn, 12752 lower_insn); 12753 if (is_blx) 12754 offset &= ~3; 12755 12756 stub_type = (is_blx 12757 ? arm_stub_a8_veneer_blx 12758 : (is_bl 12759 ? arm_stub_a8_veneer_bl 12760 : arm_stub_a8_veneer_b)); 12761 } 12762 12763 if (stub_type != arm_stub_none) 12764 { 12765 Arm_address pc_for_insn = address + i + 4; 12766 12767 // The original instruction is a BL, but the target is 12768 // an ARM instruction. If we were not making a stub, 12769 // the BL would have been converted to a BLX. Use the 12770 // BLX stub instead in that case. 12771 if (this->may_use_v5t_interworking() && force_target_arm 12772 && stub_type == arm_stub_a8_veneer_bl) 12773 { 12774 stub_type = arm_stub_a8_veneer_blx; 12775 is_blx = true; 12776 is_bl = false; 12777 } 12778 // Conversely, if the original instruction was 12779 // BLX but the target is Thumb mode, use the BL stub. 12780 else if (force_target_thumb 12781 && stub_type == arm_stub_a8_veneer_blx) 12782 { 12783 stub_type = arm_stub_a8_veneer_bl; 12784 is_blx = false; 12785 is_bl = true; 12786 } 12787 12788 if (is_blx) 12789 pc_for_insn &= ~3; 12790 12791 // If we found a relocation, use the proper destination, 12792 // not the offset in the (unrelocated) instruction. 12793 // Note this is always done if we switched the stub type above. 12794 if (cortex_a8_reloc != NULL) 12795 offset = (off_t) (cortex_a8_reloc->destination() - pc_for_insn); 12796 12797 Arm_address target = (pc_for_insn + offset) | (is_blx ? 0 : 1); 12798 12799 // Add a new stub if destination address in in the same page. 12800 if (((address + i) & ~0xfffU) == (target & ~0xfffU)) 12801 { 12802 Cortex_a8_stub* stub = 12803 this->stub_factory_.make_cortex_a8_stub(stub_type, 12804 arm_relobj, shndx, 12805 address + i, 12806 target, insn); 12807 Stub_table<big_endian>* stub_table = 12808 arm_relobj->stub_table(shndx); 12809 gold_assert(stub_table != NULL); 12810 stub_table->add_cortex_a8_stub(address + i, stub); 12811 } 12812 } 12813 } 12814 12815 i += insn_32bit ? 4 : 2; 12816 last_was_32bit = insn_32bit; 12817 last_was_branch = is_32bit_branch; 12818 } 12819 } 12820 12821 // Apply the Cortex-A8 workaround. 12822 12823 template<bool big_endian> 12824 void 12825 Target_arm<big_endian>::apply_cortex_a8_workaround( 12826 const Cortex_a8_stub* stub, 12827 Arm_address stub_address, 12828 unsigned char* insn_view, 12829 Arm_address insn_address) 12830 { 12831 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; 12832 Valtype* wv = reinterpret_cast<Valtype*>(insn_view); 12833 Valtype upper_insn = elfcpp::Swap<16, big_endian>::readval(wv); 12834 Valtype lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1); 12835 off_t branch_offset = stub_address - (insn_address + 4); 12836 12837 typedef class Arm_relocate_functions<big_endian> RelocFuncs; 12838 switch (stub->stub_template()->type()) 12839 { 12840 case arm_stub_a8_veneer_b_cond: 12841 // For a conditional branch, we re-write it to be an unconditional 12842 // branch to the stub. We use the THUMB-2 encoding here. 12843 upper_insn = 0xf000U; 12844 lower_insn = 0xb800U; 12845 // Fall through 12846 case arm_stub_a8_veneer_b: 12847 case arm_stub_a8_veneer_bl: 12848 case arm_stub_a8_veneer_blx: 12849 if ((lower_insn & 0x5000U) == 0x4000U) 12850 // For a BLX instruction, make sure that the relocation is 12851 // rounded up to a word boundary. This follows the semantics of 12852 // the instruction which specifies that bit 1 of the target 12853 // address will come from bit 1 of the base address. 12854 branch_offset = (branch_offset + 2) & ~3; 12855 12856 // Put BRANCH_OFFSET back into the insn. 12857 gold_assert(!Bits<25>::has_overflow32(branch_offset)); 12858 upper_insn = RelocFuncs::thumb32_branch_upper(upper_insn, branch_offset); 12859 lower_insn = RelocFuncs::thumb32_branch_lower(lower_insn, branch_offset); 12860 break; 12861 12862 default: 12863 gold_unreachable(); 12864 } 12865 12866 // Put the relocated value back in the object file: 12867 elfcpp::Swap<16, big_endian>::writeval(wv, upper_insn); 12868 elfcpp::Swap<16, big_endian>::writeval(wv + 1, lower_insn); 12869 } 12870 12871 // Target selector for ARM. Note this is never instantiated directly. 12872 // It's only used in Target_selector_arm_nacl, below. 12873 12874 template<bool big_endian> 12875 class Target_selector_arm : public Target_selector 12876 { 12877 public: 12878 Target_selector_arm() 12879 : Target_selector(elfcpp::EM_ARM, 32, big_endian, 12880 (big_endian ? "elf32-bigarm" : "elf32-littlearm"), 12881 (big_endian ? "armelfb" : "armelf")) 12882 { } 12883 12884 Target* 12885 do_instantiate_target() 12886 { return new Target_arm<big_endian>(); } 12887 }; 12888 12889 // Fix .ARM.exidx section coverage. 12890 12891 template<bool big_endian> 12892 void 12893 Target_arm<big_endian>::fix_exidx_coverage( 12894 Layout* layout, 12895 const Input_objects* input_objects, 12896 Arm_output_section<big_endian>* exidx_section, 12897 Symbol_table* symtab, 12898 const Task* task) 12899 { 12900 // We need to look at all the input sections in output in ascending 12901 // order of of output address. We do that by building a sorted list 12902 // of output sections by addresses. Then we looks at the output sections 12903 // in order. The input sections in an output section are already sorted 12904 // by addresses within the output section. 12905 12906 typedef std::set<Output_section*, output_section_address_less_than> 12907 Sorted_output_section_list; 12908 Sorted_output_section_list sorted_output_sections; 12909 12910 // Find out all the output sections of input sections pointed by 12911 // EXIDX input sections. 12912 for (Input_objects::Relobj_iterator p = input_objects->relobj_begin(); 12913 p != input_objects->relobj_end(); 12914 ++p) 12915 { 12916 Arm_relobj<big_endian>* arm_relobj = 12917 Arm_relobj<big_endian>::as_arm_relobj(*p); 12918 std::vector<unsigned int> shndx_list; 12919 arm_relobj->get_exidx_shndx_list(&shndx_list); 12920 for (size_t i = 0; i < shndx_list.size(); ++i) 12921 { 12922 const Arm_exidx_input_section* exidx_input_section = 12923 arm_relobj->exidx_input_section_by_shndx(shndx_list[i]); 12924 gold_assert(exidx_input_section != NULL); 12925 if (!exidx_input_section->has_errors()) 12926 { 12927 unsigned int text_shndx = exidx_input_section->link(); 12928 Output_section* os = arm_relobj->output_section(text_shndx); 12929 if (os != NULL && (os->flags() & elfcpp::SHF_ALLOC) != 0) 12930 sorted_output_sections.insert(os); 12931 } 12932 } 12933 } 12934 12935 // Go over the output sections in ascending order of output addresses. 12936 typedef typename Arm_output_section<big_endian>::Text_section_list 12937 Text_section_list; 12938 Text_section_list sorted_text_sections; 12939 for (typename Sorted_output_section_list::iterator p = 12940 sorted_output_sections.begin(); 12941 p != sorted_output_sections.end(); 12942 ++p) 12943 { 12944 Arm_output_section<big_endian>* arm_output_section = 12945 Arm_output_section<big_endian>::as_arm_output_section(*p); 12946 arm_output_section->append_text_sections_to_list(&sorted_text_sections); 12947 } 12948 12949 exidx_section->fix_exidx_coverage(layout, sorted_text_sections, symtab, 12950 merge_exidx_entries(), task); 12951 } 12952 12953 template<bool big_endian> 12954 void 12955 Target_arm<big_endian>::do_define_standard_symbols( 12956 Symbol_table* symtab, 12957 Layout* layout) 12958 { 12959 // Handle the .ARM.exidx section. 12960 Output_section* exidx_section = layout->find_output_section(".ARM.exidx"); 12961 12962 if (exidx_section != NULL) 12963 { 12964 // Create __exidx_start and __exidx_end symbols. 12965 symtab->define_in_output_data("__exidx_start", 12966 NULL, // version 12967 Symbol_table::PREDEFINED, 12968 exidx_section, 12969 0, // value 12970 0, // symsize 12971 elfcpp::STT_NOTYPE, 12972 elfcpp::STB_GLOBAL, 12973 elfcpp::STV_HIDDEN, 12974 0, // nonvis 12975 false, // offset_is_from_end 12976 true); // only_if_ref 12977 12978 symtab->define_in_output_data("__exidx_end", 12979 NULL, // version 12980 Symbol_table::PREDEFINED, 12981 exidx_section, 12982 0, // value 12983 0, // symsize 12984 elfcpp::STT_NOTYPE, 12985 elfcpp::STB_GLOBAL, 12986 elfcpp::STV_HIDDEN, 12987 0, // nonvis 12988 true, // offset_is_from_end 12989 true); // only_if_ref 12990 } 12991 else 12992 { 12993 // Define __exidx_start and __exidx_end even when .ARM.exidx 12994 // section is missing to match ld's behaviour. 12995 symtab->define_as_constant("__exidx_start", NULL, 12996 Symbol_table::PREDEFINED, 12997 0, 0, elfcpp::STT_OBJECT, 12998 elfcpp::STB_GLOBAL, elfcpp::STV_HIDDEN, 0, 12999 true, false); 13000 symtab->define_as_constant("__exidx_end", NULL, 13001 Symbol_table::PREDEFINED, 13002 0, 0, elfcpp::STT_OBJECT, 13003 elfcpp::STB_GLOBAL, elfcpp::STV_HIDDEN, 0, 13004 true, false); 13005 } 13006 } 13007 13008 // NaCl variant. It uses different PLT contents. 13009 13010 template<bool big_endian> 13011 class Output_data_plt_arm_nacl; 13012 13013 template<bool big_endian> 13014 class Target_arm_nacl : public Target_arm<big_endian> 13015 { 13016 public: 13017 Target_arm_nacl() 13018 : Target_arm<big_endian>(&arm_nacl_info) 13019 { } 13020 13021 protected: 13022 virtual Output_data_plt_arm<big_endian>* 13023 do_make_data_plt( 13024 Layout* layout, 13025 Arm_output_data_got<big_endian>* got, 13026 Output_data_space* got_plt, 13027 Output_data_space* got_irelative) 13028 { return new Output_data_plt_arm_nacl<big_endian>( 13029 layout, got, got_plt, got_irelative); } 13030 13031 private: 13032 static const Target::Target_info arm_nacl_info; 13033 }; 13034 13035 template<bool big_endian> 13036 const Target::Target_info Target_arm_nacl<big_endian>::arm_nacl_info = 13037 { 13038 32, // size 13039 big_endian, // is_big_endian 13040 elfcpp::EM_ARM, // machine_code 13041 false, // has_make_symbol 13042 false, // has_resolve 13043 false, // has_code_fill 13044 true, // is_default_stack_executable 13045 false, // can_icf_inline_merge_sections 13046 '\0', // wrap_char 13047 "/lib/ld-nacl-arm.so.1", // dynamic_linker 13048 0x20000, // default_text_segment_address 13049 0x10000, // abi_pagesize (overridable by -z max-page-size) 13050 0x10000, // common_pagesize (overridable by -z common-page-size) 13051 true, // isolate_execinstr 13052 0x10000000, // rosegment_gap 13053 elfcpp::SHN_UNDEF, // small_common_shndx 13054 elfcpp::SHN_UNDEF, // large_common_shndx 13055 0, // small_common_section_flags 13056 0, // large_common_section_flags 13057 ".ARM.attributes", // attributes_section 13058 "aeabi", // attributes_vendor 13059 "_start", // entry_symbol_name 13060 32, // hash_entry_size 13061 }; 13062 13063 template<bool big_endian> 13064 class Output_data_plt_arm_nacl : public Output_data_plt_arm<big_endian> 13065 { 13066 public: 13067 Output_data_plt_arm_nacl( 13068 Layout* layout, 13069 Arm_output_data_got<big_endian>* got, 13070 Output_data_space* got_plt, 13071 Output_data_space* got_irelative) 13072 : Output_data_plt_arm<big_endian>(layout, 16, got, got_plt, got_irelative) 13073 { } 13074 13075 protected: 13076 // Return the offset of the first non-reserved PLT entry. 13077 virtual unsigned int 13078 do_first_plt_entry_offset() const 13079 { return sizeof(first_plt_entry); } 13080 13081 // Return the size of a PLT entry. 13082 virtual unsigned int 13083 do_get_plt_entry_size() const 13084 { return sizeof(plt_entry); } 13085 13086 virtual void 13087 do_fill_first_plt_entry(unsigned char* pov, 13088 Arm_address got_address, 13089 Arm_address plt_address); 13090 13091 virtual void 13092 do_fill_plt_entry(unsigned char* pov, 13093 Arm_address got_address, 13094 Arm_address plt_address, 13095 unsigned int got_offset, 13096 unsigned int plt_offset); 13097 13098 private: 13099 inline uint32_t arm_movw_immediate(uint32_t value) 13100 { 13101 return (value & 0x00000fff) | ((value & 0x0000f000) << 4); 13102 } 13103 13104 inline uint32_t arm_movt_immediate(uint32_t value) 13105 { 13106 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12); 13107 } 13108 13109 // Template for the first PLT entry. 13110 static const uint32_t first_plt_entry[16]; 13111 13112 // Template for subsequent PLT entries. 13113 static const uint32_t plt_entry[4]; 13114 }; 13115 13116 // The first entry in the PLT. 13117 template<bool big_endian> 13118 const uint32_t Output_data_plt_arm_nacl<big_endian>::first_plt_entry[16] = 13119 { 13120 // First bundle: 13121 0xe300c000, // movw ip, #:lower16:&GOT[2]-.+8 13122 0xe340c000, // movt ip, #:upper16:&GOT[2]-.+8 13123 0xe08cc00f, // add ip, ip, pc 13124 0xe52dc008, // str ip, [sp, #-8]! 13125 // Second bundle: 13126 0xe3ccc103, // bic ip, ip, #0xc0000000 13127 0xe59cc000, // ldr ip, [ip] 13128 0xe3ccc13f, // bic ip, ip, #0xc000000f 13129 0xe12fff1c, // bx ip 13130 // Third bundle: 13131 0xe320f000, // nop 13132 0xe320f000, // nop 13133 0xe320f000, // nop 13134 // .Lplt_tail: 13135 0xe50dc004, // str ip, [sp, #-4] 13136 // Fourth bundle: 13137 0xe3ccc103, // bic ip, ip, #0xc0000000 13138 0xe59cc000, // ldr ip, [ip] 13139 0xe3ccc13f, // bic ip, ip, #0xc000000f 13140 0xe12fff1c, // bx ip 13141 }; 13142 13143 template<bool big_endian> 13144 void 13145 Output_data_plt_arm_nacl<big_endian>::do_fill_first_plt_entry( 13146 unsigned char* pov, 13147 Arm_address got_address, 13148 Arm_address plt_address) 13149 { 13150 // Write first PLT entry. All but first two words are constants. 13151 const size_t num_first_plt_words = (sizeof(first_plt_entry) 13152 / sizeof(first_plt_entry[0])); 13153 13154 int32_t got_displacement = got_address + 8 - (plt_address + 16); 13155 13156 elfcpp::Swap<32, big_endian>::writeval 13157 (pov + 0, first_plt_entry[0] | arm_movw_immediate (got_displacement)); 13158 elfcpp::Swap<32, big_endian>::writeval 13159 (pov + 4, first_plt_entry[1] | arm_movt_immediate (got_displacement)); 13160 13161 for (size_t i = 2; i < num_first_plt_words; ++i) 13162 elfcpp::Swap<32, big_endian>::writeval(pov + i * 4, first_plt_entry[i]); 13163 } 13164 13165 // Subsequent entries in the PLT. 13166 13167 template<bool big_endian> 13168 const uint32_t Output_data_plt_arm_nacl<big_endian>::plt_entry[4] = 13169 { 13170 0xe300c000, // movw ip, #:lower16:&GOT[n]-.+8 13171 0xe340c000, // movt ip, #:upper16:&GOT[n]-.+8 13172 0xe08cc00f, // add ip, ip, pc 13173 0xea000000, // b .Lplt_tail 13174 }; 13175 13176 template<bool big_endian> 13177 void 13178 Output_data_plt_arm_nacl<big_endian>::do_fill_plt_entry( 13179 unsigned char* pov, 13180 Arm_address got_address, 13181 Arm_address plt_address, 13182 unsigned int got_offset, 13183 unsigned int plt_offset) 13184 { 13185 // Calculate the displacement between the PLT slot and the 13186 // common tail that's part of the special initial PLT slot. 13187 int32_t tail_displacement = (plt_address + (11 * sizeof(uint32_t)) 13188 - (plt_address + plt_offset 13189 + sizeof(plt_entry) + sizeof(uint32_t))); 13190 gold_assert((tail_displacement & 3) == 0); 13191 tail_displacement >>= 2; 13192 13193 gold_assert ((tail_displacement & 0xff000000) == 0 13194 || (-tail_displacement & 0xff000000) == 0); 13195 13196 // Calculate the displacement between the PLT slot and the entry 13197 // in the GOT. The offset accounts for the value produced by 13198 // adding to pc in the penultimate instruction of the PLT stub. 13199 const int32_t got_displacement = (got_address + got_offset 13200 - (plt_address + sizeof(plt_entry))); 13201 13202 elfcpp::Swap<32, big_endian>::writeval 13203 (pov + 0, plt_entry[0] | arm_movw_immediate (got_displacement)); 13204 elfcpp::Swap<32, big_endian>::writeval 13205 (pov + 4, plt_entry[1] | arm_movt_immediate (got_displacement)); 13206 elfcpp::Swap<32, big_endian>::writeval 13207 (pov + 8, plt_entry[2]); 13208 elfcpp::Swap<32, big_endian>::writeval 13209 (pov + 12, plt_entry[3] | (tail_displacement & 0x00ffffff)); 13210 } 13211 13212 // Target selectors. 13213 13214 template<bool big_endian> 13215 class Target_selector_arm_nacl 13216 : public Target_selector_nacl<Target_selector_arm<big_endian>, 13217 Target_arm_nacl<big_endian> > 13218 { 13219 public: 13220 Target_selector_arm_nacl() 13221 : Target_selector_nacl<Target_selector_arm<big_endian>, 13222 Target_arm_nacl<big_endian> >( 13223 "arm", 13224 big_endian ? "elf32-bigarm-nacl" : "elf32-littlearm-nacl", 13225 big_endian ? "armelfb_nacl" : "armelf_nacl") 13226 { } 13227 }; 13228 13229 Target_selector_arm_nacl<false> target_selector_arm; 13230 Target_selector_arm_nacl<true> target_selector_armbe; 13231 13232 } // End anonymous namespace. 13233