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  /external/mesa3d/src/mesa/drivers/dri/i965/
brw_fs_live_variables.cpp 235 var_from_vgrf = rzalloc_array(mem_ctx, int, num_vgrfs);
241 vgrf_from_var = rzalloc_array(mem_ctx, int, num_vars);
249 end = rzalloc_array(mem_ctx, int, num_vars);
255 block_data= rzalloc_array(mem_ctx, struct block_data, cfg->num_blocks);
259 block_data[i].def = rzalloc_array(mem_ctx, BITSET_WORD, bitset_words);
260 block_data[i].use = rzalloc_array(mem_ctx, BITSET_WORD, bitset_words);
261 block_data[i].livein = rzalloc_array(mem_ctx, BITSET_WORD, bitset_words);
262 block_data[i].liveout = rzalloc_array(mem_ctx, BITSET_WORD, bitset_words);
brw_fs_dead_code_eliminate.cpp 81 BITSET_WORD *live = rzalloc_array(NULL, BITSET_WORD, BITSET_WORDS(num_vars));
82 BITSET_WORD *flag_live = rzalloc_array(NULL, BITSET_WORD, 1);
brw_vec4_live_variables.cpp 190 block_data = rzalloc_array(mem_ctx, struct block_data, cfg->num_blocks);
194 block_data[i].def = rzalloc_array(mem_ctx, BITSET_WORD, bitset_words);
195 block_data[i].use = rzalloc_array(mem_ctx, BITSET_WORD, bitset_words);
196 block_data[i].livein = rzalloc_array(mem_ctx, BITSET_WORD, bitset_words);
197 block_data[i].liveout = rzalloc_array(mem_ctx, BITSET_WORD, bitset_words);
brw_vec4_dead_code_eliminate.cpp 47 BITSET_WORD *live = rzalloc_array(NULL, BITSET_WORD, BITSET_WORDS(num_vars));
48 BITSET_WORD *flag_live = rzalloc_array(NULL, BITSET_WORD, 1);
brw_cs.c 95 rzalloc_array(NULL, const gl_constant_value *, param_count);
97 rzalloc_array(NULL, const gl_constant_value *, param_count);
99 rzalloc_array(NULL, struct brw_image_param,
brw_gs.c 104 rzalloc_array(NULL, const gl_constant_value *, param_count);
106 rzalloc_array(NULL, const gl_constant_value *, param_count);
108 rzalloc_array(NULL, struct brw_image_param,
brw_tes.c 95 rzalloc_array(NULL, const gl_constant_value *, param_count);
97 rzalloc_array(NULL, const gl_constant_value *, param_count);
99 rzalloc_array(NULL, struct brw_image_param,
brw_vs.c 168 rzalloc_array(NULL, const gl_constant_value *, param_count);
170 rzalloc_array(NULL, const gl_constant_value *, param_count);
172 rzalloc_array(NULL, struct brw_image_param,
brw_tcs.c 193 rzalloc_array(NULL, const gl_constant_value *, param_count);
195 rzalloc_array(NULL, const gl_constant_value *, param_count);
203 rzalloc_array(NULL, struct brw_image_param,
brw_eu.c 333 p->store = rzalloc_array(mem_ctx, brw_inst, p->store_size);
350 p->if_stack = rzalloc_array(mem_ctx, int, p->if_stack_array_size);
354 p->loop_stack = rzalloc_array(mem_ctx, int, p->loop_stack_array_size);
355 p->if_depth_in_loop = rzalloc_array(mem_ctx, int, p->loop_stack_array_size);
brw_program.c 432 brw->shader_time.names = rzalloc_array(brw, const char *, max_entries);
433 brw->shader_time.ids = rzalloc_array(brw, int, max_entries);
434 brw->shader_time.types = rzalloc_array(brw, enum shader_time_shader_type,
436 brw->shader_time.cumulative = rzalloc_array(brw, struct shader_times,
brw_fs_copy_propagation.cpp 108 bd = rzalloc_array(mem_ctx, struct block_data, cfg->num_blocks);
117 acp = rzalloc_array(mem_ctx, struct acp_entry *, num_acp);
123 bd[block->num].livein = rzalloc_array(bd, BITSET_WORD, bitset_words);
124 bd[block->num].liveout = rzalloc_array(bd, BITSET_WORD, bitset_words);
125 bd[block->num].copy = rzalloc_array(bd, BITSET_WORD, bitset_words);
126 bd[block->num].kill = rzalloc_array(bd, BITSET_WORD, bitset_words);
brw_schedule_instructions.cpp 446 this->reg_pressure_in = rzalloc_array(mem_ctx, int, block_count);
450 this->livein[i] = rzalloc_array(mem_ctx, BITSET_WORD,
455 this->liveout[i] = rzalloc_array(mem_ctx, BITSET_WORD,
460 this->hw_liveout[i] = rzalloc_array(mem_ctx, BITSET_WORD,
463 this->written = rzalloc_array(mem_ctx, bool, grf_count);
465 this->reads_remaining = rzalloc_array(mem_ctx, int, grf_count);
467 this->hw_reads_remaining = rzalloc_array(mem_ctx, int, hw_reg_count);
    [all...]
brw_wm.c 155 rzalloc_array(NULL, const gl_constant_value *, param_count);
157 rzalloc_array(NULL, const gl_constant_value *, param_count);
159 rzalloc_array(NULL, struct brw_image_param,
  /external/mesa3d/src/gallium/drivers/vc4/
vc4_qir_live_variables.c 309 c->temp_start = rzalloc_array(c, int, c->num_temps);
310 c->temp_end = rzalloc_array(c, int, c->num_temps);
318 block->def = rzalloc_array(c, BITSET_WORD, bitset_words);
319 block->use = rzalloc_array(c, BITSET_WORD, bitset_words);
320 block->live_in = rzalloc_array(c, BITSET_WORD, bitset_words);
321 block->live_out = rzalloc_array(c, BITSET_WORD, bitset_words);
vc4_qir_schedule.c 299 state.last_temp_write = rzalloc_array(mem_ctx, struct schedule_node *,
419 state.last_temp_write = rzalloc_array(mem_ctx, struct schedule_node *,
698 state.temp_writes = rzalloc_array(mem_ctx, uint32_t, c->num_temps);
699 state.temp_live = rzalloc_array(mem_ctx, BITSET_WORD,
  /external/mesa3d/src/compiler/nir/
nir_worklist.c 38 w->blocks_present = rzalloc_array(mem_ctx, BITSET_WORD,
40 w->blocks = rzalloc_array(mem_ctx, nir_block *, num_blocks);
nir_lower_samplers.c 113 nir_tex_src *new_srcs = rzalloc_array(instr, nir_tex_src,
  /external/mesa3d/src/util/
register_allocate.c 193 regs->regs = rzalloc_array(regs, struct ra_reg, count);
196 regs->regs[i].conflicts = rzalloc_array(regs->regs, BITSET_WORD,
312 class->regs = rzalloc_array(class, BITSET_WORD, BITSET_WORDS(regs->count));
421 g->nodes = rzalloc_array(g, struct ra_node, count);
424 g->stack = rzalloc_array(g, unsigned int, count);
428 g->nodes[i].adjacency = rzalloc_array(g, BITSET_WORD, bitset_count);
set.c 123 ht->table = rzalloc_array(ht, struct set_entry, ht->size);
218 table = rzalloc_array(ht, struct set_entry,
ralloc.h 144 * \def rzalloc_array(ctx, type, count)
157 #define rzalloc_array(ctx, type, count) \ macro
hash_table.c 130 ht->table = rzalloc_array(ht, struct hash_entry, ht->size);
269 table = rzalloc_array(ht, struct hash_entry,
  /external/mesa3d/src/compiler/glsl/
link_atomics.cpp 210 prog->data->AtomicBuffers = rzalloc_array(prog, gl_active_atomic_buffer,
230 mab.Uniforms = rzalloc_array(prog->data->AtomicBuffers, GLuint,
273 rzalloc_array(prog, gl_active_atomic_buffer *,
  /external/mesa3d/src/gallium/drivers/freedreno/ir3/
ir3_ra.c 151 q_values[i] = rzalloc_array(q_values, unsigned, total_class_count);
547 ctx->instrd = rzalloc_array(NULL, struct ir3_ra_instr_data, n);
577 ctx->def = rzalloc_array(ctx->g, unsigned, ctx->alloc_count);
578 ctx->use = rzalloc_array(ctx->g, unsigned, ctx->alloc_count);
629 bd->def = rzalloc_array(bd, BITSET_WORD, bitset_words);
630 bd->use = rzalloc_array(bd, BITSET_WORD, bitset_words);
631 bd->livein = rzalloc_array(bd, BITSET_WORD, bitset_words);
632 bd->liveout = rzalloc_array(bd, BITSET_WORD, bitset_words);
  /external/mesa3d/src/intel/vulkan/
anv_nir_apply_pipeline_layout.c 151 nir_tex_src *new_srcs = rzalloc_array(tex, nir_tex_src,
282 state.set[s].used = rzalloc_array(mem_ctx, BITSET_WORD, words);
283 state.set[s].surface_offsets = rzalloc_array(mem_ctx, uint8_t, count);
284 state.set[s].sampler_offsets = rzalloc_array(mem_ctx, uint8_t, count);
285 state.set[s].image_offsets = rzalloc_array(mem_ctx, uint8_t, count);

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