/prebuilts/clang/host/darwin-x86/clang-4393122/include/llvm/Analysis/ |
MemoryDependenceAnalysis.h | 74 /// that the def may not be the same type as the query, the pointers 79 /// 3. Dependence queries on calls return Def only when they are readonly 83 Def, 111 PointerSumTypeMember<Def, Instruction *>, 123 assert(Inst && "Def requires inst"); 124 return MemDepResult(ValueTy::create<Def>(Inst)); 146 bool isDef() const { return Value.is<Def>(); } 174 case Def: 175 return Value.cast<Def>(); 305 /// Cache storing single nonlocal def for the instruction [all...] |
/prebuilts/clang/host/darwin-x86/clang-4479392/include/llvm/Analysis/ |
MemoryDependenceAnalysis.h | 74 /// that the def may not be the same type as the query, the pointers 79 /// 3. Dependence queries on calls return Def only when they are readonly 83 Def, 111 PointerSumTypeMember<Def, Instruction *>, 123 assert(Inst && "Def requires inst"); 124 return MemDepResult(ValueTy::create<Def>(Inst)); 146 bool isDef() const { return Value.is<Def>(); } 174 case Def: 175 return Value.cast<Def>(); 305 /// Cache storing single nonlocal def for the instruction [all...] |
/prebuilts/clang/host/linux-x86/clang-4053586/prebuilt_include/llvm/include/llvm/Analysis/ |
MemoryDependenceAnalysis.h | 74 /// that the def may not be the same type as the query, the pointers 79 /// 3. Dependence queries on calls return Def only when they are readonly 83 Def, 111 PointerSumTypeMember<Def, Instruction *>, 123 assert(Inst && "Def requires inst"); 124 return MemDepResult(ValueTy::create<Def>(Inst)); 146 bool isDef() const { return Value.is<Def>(); } 174 case Def: 175 return Value.cast<Def>(); 305 /// Cache storing single nonlocal def for the instruction [all...] |
/prebuilts/clang/host/linux-x86/clang-4393122/include/llvm/Analysis/ |
MemoryDependenceAnalysis.h | 74 /// that the def may not be the same type as the query, the pointers 79 /// 3. Dependence queries on calls return Def only when they are readonly 83 Def, 111 PointerSumTypeMember<Def, Instruction *>, 123 assert(Inst && "Def requires inst"); 124 return MemDepResult(ValueTy::create<Def>(Inst)); 146 bool isDef() const { return Value.is<Def>(); } 174 case Def: 175 return Value.cast<Def>(); 305 /// Cache storing single nonlocal def for the instruction [all...] |
/prebuilts/clang/host/linux-x86/clang-4479392/include/llvm/Analysis/ |
MemoryDependenceAnalysis.h | 74 /// that the def may not be the same type as the query, the pointers 79 /// 3. Dependence queries on calls return Def only when they are readonly 83 Def, 111 PointerSumTypeMember<Def, Instruction *>, 123 assert(Inst && "Def requires inst"); 124 return MemDepResult(ValueTy::create<Def>(Inst)); 146 bool isDef() const { return Value.is<Def>(); } 174 case Def: 175 return Value.cast<Def>(); 305 /// Cache storing single nonlocal def for the instruction [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64CollectLOH.cpp | 215 /// mapping def to reachable uses or use to definitions. 309 // Treat ADRP def as use, as the goal of the analysis is to find 389 /// Reaching def core algorithm: 441 /// def algorithm. 442 /// \param ADRPMode specify whether the reaching def algorithm should be tuned 488 DEBUG(dbgs() << "Def:\n"); 499 /// Answer the following question: Can Def be one of the definition 501 static bool canDefBePartOfLOH(const MachineInstr *Def) { 502 unsigned Opc = Def->getOpcode(); 511 switch (Def->getOperand(2).getType()) [all...] |
/external/llvm/lib/Target/WebAssembly/ |
WebAssemblyRegStackify.cpp | 218 // Test whether Def is safe and profitable to rematerialize. 219 static bool ShouldRematerialize(const MachineInstr &Def, AliasAnalysis &AA, 221 return Def.isAsCheapAsAMove() && TII->isTriviallyReMaterializable(Def, &AA); 232 if (MachineInstr *Def = MRI.getUniqueVRegDef(Reg)) 233 return Def; 235 // MRI doesn't know what the Def is. Try asking LIS. 238 return LIS.getInstructionFromIndex(ValNo->def); 243 // Test whether Reg, as defined at Def, has exactly one use. This is a 246 static bool HasOneUse(unsigned Reg, MachineInstr *Def, [all...] |
/external/llvm/utils/TableGen/ |
DAGISelMatcherGen.cpp | 616 Record *Def = DI->getDef(); 617 if (Def->isSubClassOf("Register")) { 619 CGP.getTargetInfo().getRegBank().getReg(Def); 625 if (Def->getName() == "zero_reg") { 633 if (Def->isSubClassOf("RegisterOperand")) 634 Def = Def->getValueAsDef("RegClass"); 635 if (Def->isSubClassOf("RegisterClass")) { 636 std::string Value = getQualifiedName(Def) + "RegClassID"; 643 if (Def->isSubClassOf("SubRegIndex")) [all...] |
SubtargetEmitter.cpp | 141 Record *Def = DefList[i]; 144 OS << " " << Def->getName() << " = " << i; [all...] |
/external/swiftshader/third_party/LLVM/lib/CodeGen/ |
MachineLICM.cpp | 151 unsigned Def; 153 CandidateInfo(MachineInstr *mi, unsigned def, int fi) 154 : MI(mi), Def(def), FI(fi) {} 164 void HoistPostRA(MachineInstr *MI, unsigned Def); 167 /// gather register def and frame object update information. 192 /// HasHighOperandLatency - Compute operand latency between a def of 'Reg' 384 /// gather register def and frame object update information. 391 unsigned Def = 0; 426 // Non-dead implicit def? This cannot be hoisted [all...] |
SplitKit.cpp | 107 UseSlots.push_back((*I)->def); 109 // Get use slots form the use-def chain. 192 // When not live in, the first use should be a def. 194 assert(LVI->start == LVI->valno->def && "Dangling LiveRange start"); 195 assert(LVI->start == BI.FirstInstr && "First instr should be a def"); 225 // A LiveRange that starts in the middle of the block must be a def. 226 assert(LVI->start == LVI->valno->def && "Dangling LiveRange start"); 362 // Keep it as a simple def without any liveness. 368 SlotIndex Def = OldVNI->def; [all...] |
/external/swiftshader/third_party/LLVM/utils/TableGen/ |
DAGISelMatcherGen.cpp | 583 Record *Def = DI->getDef(); 584 if (Def->isSubClassOf("Register")) { 586 CGP.getTargetInfo().getRegBank().getReg(Def); 592 if (Def->getName() == "zero_reg") { 600 if (Def->isSubClassOf("RegisterOperand")) 601 Def = Def->getValueAsDef("RegClass"); 602 if (Def->isSubClassOf("RegisterClass")) { 603 std::string Value = getQualifiedName(Def) + "RegClassID"; 610 if (Def->isSubClassOf("SubRegIndex")) [all...] |
/prebuilts/go/darwin-x86/src/cmd/compile/internal/syntax/ |
tokens.go | 174 Def // := 210 Def: ":", // : in :=
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/prebuilts/go/linux-x86/src/cmd/compile/internal/syntax/ |
tokens.go | 174 Def // := 210 Def: ":", // : in :=
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/external/clang/lib/AST/ |
DeclObjC.cpp | 73 if (const ObjCProtocolDecl *Def = Proto->getDefinition()) 74 if (Def->isHidden() && !AllowHidden) 160 if (const ObjCProtocolDecl *Def = Proto->getDefinition()) 161 if (Def->isHidden()) 218 if (const ObjCProtocolDecl *Def = Proto->getDefinition()) 219 if (Def->isHidden()) 291 if (const ObjCInterfaceDecl *def = getDefinition()) 292 return def->getTypeParamListAsWritten(); [all...] |
/external/freetype/src/truetype/ |
ttinterp.h | 97 TT_DefRecord *Def; /* either FDEF or IDEF */
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/external/llvm/lib/CodeGen/ |
BranchFolding.cpp | [all...] |
LiveIntervalAnalysis.cpp | 294 /// without a corresponding def when entering the entry block or a landing pad. 346 SlotIndex Def = VNI->def; 347 LR.addSegment(LiveRange::Segment(Def, Def.getDeadSlot(), VNI)); 374 if (!VNI->isPHIDef() || VNI->def != BlockStart || 446 Idx = DefVNI->def; 451 // Create new live ranges with only minimal live segments per def. 471 SlotIndex Def = VNI->def; [all...] |
MachineLICM.cpp | 159 unsigned Def; 161 CandidateInfo(MachineInstr *mi, unsigned def, int fi) 162 : MI(mi), Def(def), FI(fi) {} 167 void HoistPostRA(MachineInstr *MI, unsigned Def); 350 /// gather register def and frame object update information. 358 unsigned Def = 0; 398 // Non-dead implicit def? This cannot be hoisted. 400 // No need to check if a dead implicit def is also defined by 406 // it's a dead implicit def [all...] |
PeepholeOptimizer.cpp | 146 /// \brief Track Def -> Use info used for rewriting copies. 278 /// follows the use-def chain to find successive suitable sources. 280 /// def = COPY src. 285 /// def = COPY v2.sub0 287 /// Using a ValueTracker for def = COPY v2.sub0 will give the following 290 /// Then, def can be rewritten into def = COPY v0. 293 /// The current point into the use-def chain. 294 const MachineInstr *Def; 295 /// The index of the definition in Def [all...] |
SplitKit.cpp | 103 if (!SlotIndex::isEarlierInstr(VNI->def, LIP.second) && VNI->def < MBBEnd) 146 UseSlots.push_back(VNI->def); 148 // Get use slots form the use-def chain. 230 // When not live in, the first use should be a def. 232 assert(LVI->start == LVI->valno->def && "Dangling Segment start"); 233 assert(LVI->start == BI.FirstInstr && "First instr should be a def"); 263 // A Segment that starts in the middle of the block must be a def. 264 assert(LVI->start == LVI->valno->def && "Dangling Segment start"); 401 // Keep it as a simple def without any liveness [all...] |
TwoAddressInstructionPass.cpp | 257 // MachineRegisterInfo def / use instead. 314 /// Return the MachineInstr* if it is the single def of the Reg in current BB. 340 MachineInstr *Def = getSingleDef(TmpReg, MBB, MRI); 341 if (!Def || !Def->isCopy()) 344 TmpReg = Def->getOperand(1).getReg(); 354 /// instruction which is being processed. It also returns the last def location 465 // If the def is something other than a copy, then it isn't going to 555 // %reg1028<def> = EXTRACT_SUBREG %reg1027<kill>, 1 556 // %reg1029<def> = MOV8rr %reg102 [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
ScheduleDAGRRList.cpp | 84 cl::desc("Disable physreg def-use affinity")); 508 /// Call ReleasePred for each predecessor, then update register live def/gen. 558 SUnit *Def = &SUnits[N->getNodeId()]; 559 CallSeqEndForStart[Def] = SU; 562 LiveRegDefs[CallResource] = Def; 736 // two-address node as a live range def. 856 // This becomes the nearest def. Note that an earlier def may still be [all...] |
/external/llvm/lib/Transforms/Utils/ |
MemorySSA.cpp | 366 // Live in is normally defined as "all the blocks on the path from each def to 369 // This means we don't really have def-only instructions. The only 371 // variable (because LiveOnEntry can reach anywhere, and every def is a 423 // dominating clobbering def. 529 bool Def = bool(ModRef & MRI_Mod); 534 if (!Def && !Use) 537 assert((Def || Use) && 541 if (Def) 637 assert(!isLiveOnEntryDef(MA) && "Trying to remove the live on entry def"); 763 "Memory Def does not dominate it's uses") [all...] |
/external/lzma/CPP/7zip/UI/Console/ |
List.cpp | 299 bool Def;
301 CListUInt64Def(): Val(0), Def(false) {}
302 void Add(UInt64 v) { Val += v; Def = true; }
303 void Add(const CListUInt64Def &v) { if (v.Def) Add(v.Val); }
309 bool Def;
311 CListFileTimeDef(): Def(false) { Val.dwLowDateTime = 0; Val.dwHighDateTime = 0; }
314 if (t.Def && (!Def || CompareFileTime(&Val, &t.Val) < 0))
317 Def = true;
337 void SetSizeDefIfNoFiles() { if (NumFiles == 0) Size.Def = true; } [all...] |