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  /external/llvm/test/CodeGen/PowerPC/
bitcasts-direct-move.ll 12 ; CHECK: xxsldwi [[SHIFTREG:[0-9]+]], [[CONVREG]], [[CONVREG]], 3
13 ; CHECK: mfvsrwz 3, [[SHIFTREG]]
32 ; CHECK: xxsldwi [[SHIFTREG:[0-9]+]], [[MOVEREG]], [[MOVEREG]], 1
33 ; CHECK: xscvspdpn 1, [[SHIFTREG]]
52 ; CHECK: xxsldwi [[SHIFTREG:[0-9]+]], [[CONVREG]], [[CONVREG]], 3
53 ; CHECK: mfvsrwz 3, [[SHIFTREG]]
72 ; CHECK: xxsldwi [[SHIFTREG:[0-9]+]], [[MOVEREG]], [[MOVEREG]], 1
73 ; CHECK: xscvspdpn 1, [[SHIFTREG]]
variable_elem_vec_extracts.ll 17 ; CHECK-DAG: sldi [[SHIFTREG:[0-9]+]], [[MASKREG]], 2
18 ; CHECK-DAG: lvsl [[SHMSKREG:[0-9]+]], 0, [[SHIFTREG]]
51 ; CHECK-DAG: sldi [[SHIFTREG:[0-9]+]], [[MASKREG]], 3
52 ; CHECK-DAG: lvsl [[SHMSKREG:[0-9]+]], 0, [[SHIFTREG]]
97 ; CHECK: sldi [[SHIFTREG:[0-9]+]], [[MASKREG]], 3
98 ; CHECK: lvsl [[SHMSKREG:[0-9]+]], 0, [[SHIFTREG]]
  /external/vixl/src/aarch64/
logic-aarch64.cc 1644 LogicVRegister shiftreg = dup_immediate(vform, temp, shift); local
1655 LogicVRegister shiftreg = dup_immediate(vform, temp1, shift); local
1667 LogicVRegister shiftreg = dup_immediate(vform, temp1, shift); local
1695 LogicVRegister shiftreg = dup_immediate(vform, temp1, shift); local
1707 LogicVRegister shiftreg = dup_immediate(vform, temp1, shift); local
1736 LogicVRegister shiftreg = dup_immediate(vform, temp, shift); local
1747 LogicVRegister shiftreg = dup_immediate(vform, temp, shift); local
1758 LogicVRegister shiftreg = dup_immediate(vform, temp, shift); local
1795 LogicVRegister shiftreg = dup_immediate(vform, temp, -shift); local
1806 LogicVRegister shiftreg = dup_immediate(vform, temp, -shift); local
    [all...]
  /external/swiftshader/third_party/LLVM/lib/Target/MSP430/
MSP430ISelLowering.cpp     [all...]
  /external/llvm/lib/Target/MSP430/
MSP430ISelLowering.cpp     [all...]
  /external/swiftshader/third_party/LLVM/lib/Target/ARM/AsmParser/
ARMAsmParser.cpp 354 unsigned ShiftReg;
    [all...]
  /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/
PPCISelLowering.cpp     [all...]
  /external/llvm/lib/Target/ARM/AsmParser/
ARMAsmParser.cpp 537 unsigned ShiftReg;
    [all...]
  /external/llvm/lib/Target/AArch64/
AArch64FastISel.cpp     [all...]
  /external/llvm/lib/Target/PowerPC/
PPCISelLowering.cpp     [all...]

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