1 /* 2 * Copyright 2015 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 21 * IN THE SOFTWARE. 22 */ 23 24 #include "brw_context.h" 25 #include "brw_shader.h" 26 #include "brw_fs.h" 27 #include "brw_nir.h" 28 #include "brw_program.h" 29 #include "compiler/glsl/ir.h" 30 #include "compiler/glsl/ir_optimization.h" 31 #include "compiler/glsl/program.h" 32 #include "program/program.h" 33 #include "main/shaderapi.h" 34 #include "main/shaderobj.h" 35 #include "main/uniforms.h" 36 37 /** 38 * Performs a compile of the shader stages even when we don't know 39 * what non-orthogonal state will be set, in the hope that it reflects 40 * the eventual NOS used, and thus allows us to produce link failures. 41 */ 42 static bool 43 brw_shader_precompile(struct gl_context *ctx, 44 struct gl_shader_program *sh_prog) 45 { 46 struct gl_linked_shader *vs = sh_prog->_LinkedShaders[MESA_SHADER_VERTEX]; 47 struct gl_linked_shader *tcs = sh_prog->_LinkedShaders[MESA_SHADER_TESS_CTRL]; 48 struct gl_linked_shader *tes = sh_prog->_LinkedShaders[MESA_SHADER_TESS_EVAL]; 49 struct gl_linked_shader *gs = sh_prog->_LinkedShaders[MESA_SHADER_GEOMETRY]; 50 struct gl_linked_shader *fs = sh_prog->_LinkedShaders[MESA_SHADER_FRAGMENT]; 51 struct gl_linked_shader *cs = sh_prog->_LinkedShaders[MESA_SHADER_COMPUTE]; 52 53 if (fs && !brw_fs_precompile(ctx, fs->Program)) 54 return false; 55 56 if (gs && !brw_gs_precompile(ctx, gs->Program)) 57 return false; 58 59 if (tes && !brw_tes_precompile(ctx, sh_prog, tes->Program)) 60 return false; 61 62 if (tcs && !brw_tcs_precompile(ctx, sh_prog, tcs->Program)) 63 return false; 64 65 if (vs && !brw_vs_precompile(ctx, vs->Program)) 66 return false; 67 68 if (cs && !brw_cs_precompile(ctx, cs->Program)) 69 return false; 70 71 return true; 72 } 73 74 static void 75 brw_lower_packing_builtins(struct brw_context *brw, 76 exec_list *ir) 77 { 78 /* Gens < 7 don't have instructions to convert to or from half-precision, 79 * and Gens < 6 don't expose that functionality. 80 */ 81 if (brw->gen != 6) 82 return; 83 84 lower_packing_builtins(ir, LOWER_PACK_HALF_2x16 | LOWER_UNPACK_HALF_2x16); 85 } 86 87 static void 88 process_glsl_ir(struct brw_context *brw, 89 struct gl_shader_program *shader_prog, 90 struct gl_linked_shader *shader) 91 { 92 struct gl_context *ctx = &brw->ctx; 93 const struct brw_compiler *compiler = brw->screen->compiler; 94 const struct gl_shader_compiler_options *options = 95 &ctx->Const.ShaderCompilerOptions[shader->Stage]; 96 97 /* Temporary memory context for any new IR. */ 98 void *mem_ctx = ralloc_context(NULL); 99 100 ralloc_adopt(mem_ctx, shader->ir); 101 102 lower_blend_equation_advanced(shader); 103 104 /* lower_packing_builtins() inserts arithmetic instructions, so it 105 * must precede lower_instructions(). 106 */ 107 brw_lower_packing_builtins(brw, shader->ir); 108 do_mat_op_to_vec(shader->ir); 109 110 unsigned instructions_to_lower = (DIV_TO_MUL_RCP | 111 SUB_TO_ADD_NEG | 112 EXP_TO_EXP2 | 113 LOG_TO_LOG2 | 114 DFREXP_DLDEXP_TO_ARITH); 115 if (brw->gen < 7) { 116 instructions_to_lower |= BIT_COUNT_TO_MATH | 117 EXTRACT_TO_SHIFTS | 118 INSERT_TO_SHIFTS | 119 REVERSE_TO_SHIFTS; 120 } 121 122 lower_instructions(shader->ir, instructions_to_lower); 123 124 /* Pre-gen6 HW can only nest if-statements 16 deep. Beyond this, 125 * if-statements need to be flattened. 126 */ 127 if (brw->gen < 6) 128 lower_if_to_cond_assign(shader->Stage, shader->ir, 16); 129 130 do_lower_texture_projection(shader->ir); 131 do_vec_index_to_cond_assign(shader->ir); 132 lower_vector_insert(shader->ir, true); 133 lower_offset_arrays(shader->ir); 134 lower_noise(shader->ir); 135 lower_quadop_vector(shader->ir, false); 136 137 bool progress; 138 do { 139 progress = false; 140 141 if (compiler->scalar_stage[shader->Stage]) { 142 if (shader->Stage == MESA_SHADER_VERTEX || 143 shader->Stage == MESA_SHADER_FRAGMENT) 144 brw_do_channel_expressions(shader->ir); 145 brw_do_vector_splitting(shader->ir); 146 } 147 148 progress = do_common_optimization(shader->ir, true, true, 149 options, ctx->Const.NativeIntegers) || progress; 150 } while (progress); 151 152 validate_ir_tree(shader->ir); 153 154 /* Now that we've finished altering the linked IR, reparent any live IR back 155 * to the permanent memory context, and free the temporary one (discarding any 156 * junk we optimized away). 157 */ 158 reparent_ir(shader->ir, shader->ir); 159 ralloc_free(mem_ctx); 160 161 if (ctx->_Shader->Flags & GLSL_DUMP) { 162 fprintf(stderr, "\n"); 163 if (shader->ir) { 164 fprintf(stderr, "GLSL IR for linked %s program %d:\n", 165 _mesa_shader_stage_to_string(shader->Stage), 166 shader_prog->Name); 167 _mesa_print_ir(stderr, shader->ir, NULL); 168 } else { 169 fprintf(stderr, "No GLSL IR for linked %s program %d (shader may be " 170 "from cache)\n", _mesa_shader_stage_to_string(shader->Stage), 171 shader_prog->Name); 172 } 173 fprintf(stderr, "\n"); 174 } 175 } 176 177 static void 178 unify_interfaces(struct shader_info **infos) 179 { 180 struct shader_info *prev_info = NULL; 181 182 for (unsigned i = MESA_SHADER_VERTEX; i < MESA_SHADER_FRAGMENT; i++) { 183 if (!infos[i]) 184 continue; 185 186 if (prev_info) { 187 prev_info->outputs_written |= infos[i]->inputs_read & 188 ~(VARYING_BIT_TESS_LEVEL_INNER | VARYING_BIT_TESS_LEVEL_OUTER); 189 infos[i]->inputs_read |= prev_info->outputs_written & 190 ~(VARYING_BIT_TESS_LEVEL_INNER | VARYING_BIT_TESS_LEVEL_OUTER); 191 192 prev_info->patch_outputs_written |= infos[i]->patch_inputs_read; 193 infos[i]->patch_inputs_read |= prev_info->patch_outputs_written; 194 } 195 prev_info = infos[i]; 196 } 197 } 198 199 extern "C" GLboolean 200 brw_link_shader(struct gl_context *ctx, struct gl_shader_program *shProg) 201 { 202 struct brw_context *brw = brw_context(ctx); 203 const struct brw_compiler *compiler = brw->screen->compiler; 204 unsigned int stage; 205 struct shader_info *infos[MESA_SHADER_STAGES] = { 0, }; 206 207 for (stage = 0; stage < ARRAY_SIZE(shProg->_LinkedShaders); stage++) { 208 struct gl_linked_shader *shader = shProg->_LinkedShaders[stage]; 209 if (!shader) 210 continue; 211 212 struct gl_program *prog = shader->Program; 213 prog->Parameters = _mesa_new_parameter_list(); 214 215 process_glsl_ir(brw, shProg, shader); 216 217 _mesa_copy_linked_program_data(shProg, shader); 218 219 prog->ShadowSamplers = shader->shadow_samplers; 220 _mesa_update_shader_textures_used(shProg, prog); 221 222 brw_add_texrect_params(prog); 223 224 bool debug_enabled = 225 (INTEL_DEBUG & intel_debug_flag_for_shader_stage(shader->Stage)); 226 227 if (debug_enabled && shader->ir) { 228 fprintf(stderr, "GLSL IR for native %s shader %d:\n", 229 _mesa_shader_stage_to_string(shader->Stage), shProg->Name); 230 _mesa_print_ir(stderr, shader->ir, NULL); 231 fprintf(stderr, "\n\n"); 232 } 233 234 prog->nir = brw_create_nir(brw, shProg, prog, (gl_shader_stage) stage, 235 compiler->scalar_stage[stage]); 236 infos[stage] = prog->nir->info; 237 238 /* Make a pass over the IR to add state references for any built-in 239 * uniforms that are used. This has to be done now (during linking). 240 * Code generation doesn't happen until the first time this shader is 241 * used for rendering. Waiting until then to generate the parameters is 242 * too late. At that point, the values for the built-in uniforms won't 243 * get sent to the shader. 244 */ 245 nir_foreach_variable(var, &prog->nir->uniforms) { 246 if (strncmp(var->name, "gl_", 3) == 0) { 247 const nir_state_slot *const slots = var->state_slots; 248 assert(var->state_slots != NULL); 249 250 for (unsigned int i = 0; i < var->num_state_slots; i++) { 251 _mesa_add_state_reference(prog->Parameters, 252 (gl_state_index *)slots[i].tokens); 253 } 254 } 255 } 256 } 257 258 /* The linker tries to dead code eliminate unused varying components, 259 * and make sure interfaces match. But it isn't able to do so in all 260 * cases. So, explicitly make the interfaces match by OR'ing together 261 * the inputs_read/outputs_written bitfields of adjacent stages. 262 */ 263 if (!shProg->SeparateShader) 264 unify_interfaces(infos); 265 266 if ((ctx->_Shader->Flags & GLSL_DUMP) && shProg->Name != 0) { 267 for (unsigned i = 0; i < shProg->NumShaders; i++) { 268 const struct gl_shader *sh = shProg->Shaders[i]; 269 if (!sh) 270 continue; 271 272 fprintf(stderr, "GLSL %s shader %d source for linked program %d:\n", 273 _mesa_shader_stage_to_string(sh->Stage), 274 i, shProg->Name); 275 fprintf(stderr, "%s", sh->Source); 276 fprintf(stderr, "\n"); 277 } 278 } 279 280 if (brw->precompile && !brw_shader_precompile(ctx, shProg)) 281 return false; 282 283 build_program_resource_list(ctx, shProg); 284 285 for (stage = 0; stage < ARRAY_SIZE(shProg->_LinkedShaders); stage++) { 286 struct gl_linked_shader *shader = shProg->_LinkedShaders[stage]; 287 if (!shader) 288 continue; 289 290 /* The GLSL IR won't be needed anymore. */ 291 ralloc_free(shader->ir); 292 shader->ir = NULL; 293 } 294 295 return true; 296 } 297
