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      1 //===- Thumb1RegisterInfo.h - Thumb-1 Register Information Impl -*- C++ -*-===//
      2 //
      3 //                     The LLVM Compiler Infrastructure
      4 //
      5 // This file is distributed under the University of Illinois Open Source
      6 // License. See LICENSE.TXT for details.
      7 //
      8 //===----------------------------------------------------------------------===//
      9 //
     10 // This file contains the Thumb-1 implementation of the TargetRegisterInfo
     11 // class.
     12 //
     13 //===----------------------------------------------------------------------===//
     14 
     15 #ifndef THUMB1REGISTERINFO_H
     16 #define THUMB1REGISTERINFO_H
     17 
     18 #include "ARM.h"
     19 #include "ARMBaseRegisterInfo.h"
     20 #include "llvm/Target/TargetRegisterInfo.h"
     21 
     22 namespace llvm {
     23   class ARMSubtarget;
     24   class ARMBaseInstrInfo;
     25 
     26 struct Thumb1RegisterInfo : public ARMBaseRegisterInfo {
     27 public:
     28   Thumb1RegisterInfo(const ARMBaseInstrInfo &tii, const ARMSubtarget &STI);
     29 
     30   const TargetRegisterClass*
     31   getLargestLegalSuperClass(const TargetRegisterClass *RC) const;
     32 
     33   const TargetRegisterClass*
     34   getPointerRegClass(const MachineFunction &MF, unsigned Kind = 0) const;
     35 
     36   /// emitLoadConstPool - Emits a load from constpool to materialize the
     37   /// specified immediate.
     38  void emitLoadConstPool(MachineBasicBlock &MBB,
     39                         MachineBasicBlock::iterator &MBBI,
     40                         DebugLoc dl,
     41                         unsigned DestReg, unsigned SubIdx, int Val,
     42                         ARMCC::CondCodes Pred = ARMCC::AL,
     43                         unsigned PredReg = 0,
     44                         unsigned MIFlags = MachineInstr::NoFlags) const;
     45 
     46   // rewrite MI to access 'Offset' bytes from the FP. Update Offset to be
     47   // however much remains to be handled. Return 'true' if no further
     48   // work is required.
     49   bool rewriteFrameIndex(MachineBasicBlock::iterator II, unsigned FrameRegIdx,
     50                          unsigned FrameReg, int &Offset,
     51                          const ARMBaseInstrInfo &TII) const;
     52   void resolveFrameIndex(MachineBasicBlock::iterator I,
     53                          unsigned BaseReg, int64_t Offset) const;
     54   bool saveScavengerRegister(MachineBasicBlock &MBB,
     55                              MachineBasicBlock::iterator I,
     56                              MachineBasicBlock::iterator &UseMI,
     57                              const TargetRegisterClass *RC,
     58                              unsigned Reg) const;
     59   void eliminateFrameIndex(MachineBasicBlock::iterator II,
     60                            int SPAdj, unsigned FIOperandNum,
     61                            RegScavenger *RS = NULL) const;
     62 };
     63 }
     64 
     65 #endif // THUMB1REGISTERINFO_H
     66