| /toolchain/binutils/binutils-2.27/gas/config/ |
| tc-arm.c | 527 /* The bit that distinguishes CPSR and SPSR. */
[all...] |
| /device/linaro/bootloader/arm-trusted-firmware/docs/ |
| firmware-design.rst | 388 of the BL32 image. The value of the Saved Processor Status Register (``SPSR``)
401 memory with the entrypoint and Saved Program Status Register (``SPSR``) of the
403 image. The ``SPSR`` is determined as specified in Section 5.13 of the
[all...] |
| change-log.rst | [all...] |
| /external/elfutils/tests/ |
| run-allregs.sh | [all...] |
| run-addrcfi.sh | [all...] |
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/arm/ |
| thumb32.d | 652 0[0-9a-f]+ <[^>]+> f3ff 8000 mrs r0, SPSR
654 0[0-9a-f]+ <[^>]+> f3ff 8900 mrs r9, SPSR
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| /external/capstone/arch/ARM/ |
| ARMMapping.c | 31 { ARM_REG_SPSR, "spsr"},
144 { ARM_REG_SPSR, "spsr"},
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| ARMInstPrinter.c | [all...] |
| /external/capstone/suite/MC/ARM/ |
| basic-arm-instructions.s.cs | 387 0x00,0x80,0x4f,0xe1 = mrs r8, spsr
[all...] |
| basic-thumb2-instructions.s.cs | 490 0xff,0xf3,0x00,0x88 = mrs r8, spsr
[all...] |
| /external/llvm/lib/Target/ARM/AsmParser/ |
| ARMAsmParser.cpp | [all...] |
| /external/v8/src/arm/ |
| disasm-arm.cc | 626 Print("SPSR");
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| assembler-arm.cc | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMInstrThumb2.td | [all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| ARMInstrThumb2.td | [all...] |
| /toolchain/binutils/binutils-2.27/gas/ |
| ChangeLog-0001 | [all...] |
| /external/llvm/test/MC/ARM/ |
| basic-arm-instructions.s | [all...] |
| basic-thumb2-instructions.s | [all...] |
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| basic-arm-instructions.s | [all...] |
| basic-thumb2-instructions.s | [all...] |
| /toolchain/binutils/binutils-2.27/gas/po/ |
| es.po | [all...] |
| fi.po | [all...] |
| fr.po | [all...] |
| id.po | [all...] |
| tr.po | [all...] |
