| /prebuilts/clang/host/linux-x86/clang-4691093/include/clang/AST/ |
| Mangle.h | 157 virtual void mangleCXXVTable(const CXXRecordDecl *RD, raw_ostream &) = 0;
158 virtual void mangleCXXVTT(const CXXRecordDecl *RD, raw_ostream &) = 0;
159 virtual void mangleCXXCtorVTable(const CXXRecordDecl *RD, int64_t Offset,
|
| /toolchain/binutils/binutils-2.27/gold/ |
| arm-reloc-property.cc | 270 #undef RD
271 #define RD(name, type, deprecated, class, operation, is_implemented, \
287 #undef RD
|
| /external/clang/lib/Sema/ |
| SemaExprCXX.cpp | 523 const auto *RD = Ty->getAsCXXRecordDecl();
524 if (!RD)
527 if (const auto *Uuid = RD->getMostRecentDecl()->getAttr<UuidAttr>()) {
533 if (const auto *CTSD = dyn_cast<ClassTemplateSpecializationDecl>(RD)) {
728 collectPublicBases(CXXRecordDecl *RD,
733 for (const CXXBaseSpecifier &BS : RD->bases()) {
758 CXXRecordDecl *RD, llvm::SmallVectorImpl<CXXRecordDecl *> &Objects) {
762 SubobjectsSeen[RD] = 1;
763 PublicSubobjectsSeen.insert(RD);
764 collectPublicBases(RD, SubobjectsSeen, VBases, PublicSubobjectsSeen
[all...] |
| SemaDeclCXX.cpp | [all...] |
| SemaAttr.cpp | 51 void Sema::AddAlignmentAttributesForRecord(RecordDecl *RD) {
59 RD->addAttr(AlignMac68kAttr::CreateImplicit(Context));
61 RD->addAttr(MaxFieldAlignmentAttr::CreateImplicit(Context,
66 void Sema::AddMsStructLayoutForRecord(RecordDecl *RD) {
68 RD->addAttr(MSStructAttr::CreateImplicit(Context));
74 RD->addAttr(
|
| IdentifierResolver.cpp | 284 for (auto RD : New->redecls()) {
285 if (RD == Existing)
288 if (RD->isCanonicalDecl())
|
| SemaCUDA.cpp | 418 if (CXXRecordDecl *RD = BS.getType()->getAsCXXRecordDecl())
419 return isEmptyCudaDestructor(Loc, RD->getDestructor());
426 if (CXXRecordDecl *RD = Field->getType()
429 return isEmptyCudaDestructor(Loc, RD->getDestructor());
|
| SemaLookup.cpp | [all...] |
| /frameworks/compile/slang/ |
| slang_backend.cpp | 386 void Backend::PadStruct(clang::RecordDecl* RD) {
398 // We collect all of RD's fields in a vector FieldsInfo. We
407 for (clang::Decl* D : RD->decls()) {
420 // 1. ASSUME that record layout has not yet been computed for RD.
422 // 2. Create a temporary clone of RD, and compute its layout.
423 // ASSUME that we know how to clone RD in a way that copies all the
427 // transform RD.
435 // while we're manipulating RD, the associated RecordType
436 // still recognizes RD as its RecordDecl. ASSUME that we
438 // the RecordType to be followed to RD while RD is in
[all...] |
| slang_rs_export_foreach.cpp | 347 clang::RecordDecl *RD =
356 RD,
365 RD->addDecl(FD);
366 RD->completeDefinition();
369 clang::QualType T = Ctx.getTagDeclType(RD);
|
| slang_rs_object_ref_count.cpp | 518 clang::RecordDecl *RD = T->getAsUnionType()->getDecl();
519 RD = RD->getDefinition();
520 for (clang::RecordDecl::field_iterator FI = RD->field_begin(),
521 FE = RD->field_end();
537 clang::RecordDecl *RD = T->getAsStructureType()->getDecl();
538 RD = RD->getDefinition();
539 for (clang::RecordDecl::field_iterator FI = RD->field_begin(),
540 FE = RD->field_end()
[all...] |
| slang_backend.h | 138 void PadStruct(clang::RecordDecl* RD);
|
| /external/clang/lib/AST/ |
| MicrosoftMangle.cpp | 78 if (const CXXRecordDecl *RD = dyn_cast<CXXRecordDecl>(D)) {
79 if (RD->isLambda())
81 dyn_cast_or_null<ParmVarDecl>(RD->getLambdaContextDecl()))
230 unsigned getLambdaId(const CXXRecordDecl *RD) {
231 assert(RD->isLambda() && "RD must be a lambda!");
232 assert(!RD->isExternallyVisible() && "RD must not be visible!");
233 assert(RD->getLambdaManglingNumber() == 0 &&
234 "RD must not have a mangling number!")
[all...] |
| DeclCXX.cpp | [all...] |
| APValue.cpp | 446 if (const CXXRecordDecl *RD = dyn_cast<CXXRecordDecl>(BaseOrMember)) {
447 CastToBase = RD;
448 ElemTy = Ctx.getRecordType(RD);
495 const RecordDecl *RD = Ty->getAs<RecordType>()->getDecl();
498 const CXXRecordDecl *CD = cast<CXXRecordDecl>(RD);
508 for (const auto *FI : RD->fields()) {
|
| NestedNameSpecifier.cpp | 123 CXXRecordDecl *RD) {
127 Mockup.Specifier = RD;
203 CXXRecordDecl *RD = static_cast<CXXRecordDecl *>(Specifier);
204 for (const auto &Base : RD->bases())
607 CXXRecordDecl *RD,
610 Representation = NestedNameSpecifier::SuperSpecifier(Context, RD);
|
| /external/clang/include/clang/AST/ |
| DeclCXX.h | [all...] |
| /external/llvm/lib/Target/Hexagon/ |
| RDFLiveness.cpp | 97 if (NodeId RD = SNA.Addr->getReachingDef())
98 DefQ.insert(RD);
120 if (auto RD = NodeAddr<RefNode*>(S).Addr->getReachingDef())
121 DefQ.insert(RD);
737 NodeId RD = TA.Addr->getReachingDef();
738 if (RD == 0)
740 if (RAI.alias(RR, DFG.addr<DefNode*>(RD).Addr->getRegRef()))
750 NodeId RD = RA.Addr->getReachingDef();
751 assert(RD);
752 RA = DFG.addr<DefNode*>(RD);
[all...] |
| HexagonBitTracker.cpp | 391 // 32-bit negation is done by "Rd = A2_subri 0, Rs"
[all...] |
| HexagonExpandCondsets.cpp | 257 MachineInstr *getReachingDefForPred(RegisterRef RD,
739 /// Find the reaching definition for a predicated use of RD. The RD is used
741 /// definitions that set RD under the opposite conditions.
742 MachineInstr *HexagonExpandCondsets::getReachingDefForPred(RegisterRef RD,
760 // Check the defs. If the PredR is defined, invalidate it. If RD is
770 if (RR.Reg != RD.Reg)
775 if (RR.Sub == RD.Sub)
777 if (RR.Sub == 0 || RD.Sub == 0)
[all...] |
| /toolchain/binutils/binutils-2.27/gas/config/ |
| tc-sparc.c | 1296 int rd = (the_insn.opcode & RD (~0)) >> 25; local
1353 int low32, rd, opc; local
1626 int rd = (the_insn.opcode >> 25) & 0x1f; local
[all...] |
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/metag/ |
| metadsp21.s | 10 DO ADD D0Re0,D0Re0,RD
11 DLO ADD D0Re0,D0Re0,RD
33 DM ADD D0Re0,[D0AR.0],RD
34 DMO ADD D0Re0,[D0AR.0],RD
290 DLM ADD [D0AW.0],D0.7,RD
309 D ADD [D0AW.0],[D0AR.0++],RD
310 DO ADD [D0AW.0],[D0AR.0++],RD
319 D ADD [D0AW.0],[D0AR.0+D0ARI.0++],RD
320 DO ADD [D0AW.0],[D0AR.0+D0ARI.0++],RD
336 DM MOV [D0AW.0++],RD
[all...] |
| metadsp21.d | 18 .*: 00002121 DO ADD D0Re0,D0Re0,RD
19 .*: 00002131 DLO ADD D0Re0,D0Re0,RD
41 .*: 00042109 DM ADD D0Re0,\[D0AR\.0\],RD
42 .*: 00042129 DMO ADD D0Re0,\[D0AR\.0\],RD
298 .*: 0081e119 DLM ADD \[D0AW\.0\],D0\.7,RD
317 .*: 00846101 D ADD \[D0AW\.0\],\[D0AR\.0\+\+\],RD
318 .*: 00846121 DO ADD \[D0AW\.0\],\[D0AR\.0\+\+\],RD
327 .*: 0084a101 D ADD \[D0AW\.0\],\[D0AR\.0\+D0ARI\.0\+\+\],RD
328 .*: 0084a121 DO ADD \[D0AW\.0\],\[D0AR\.0\+D0ARI\.0\+\+\],RD
344 .*: 0088210d DM MOV \[D0AW\.0\+\+\],RD
[all...] |
| /external/clang/lib/CodeGen/ |
| CGOpenMPRuntime.cpp | [all...] |
| TargetInfo.cpp | 139 const CXXRecordDecl *RD = dyn_cast<CXXRecordDecl>(RT->getDecl());
140 if (!RD)
142 return CXXABI.getRecordArgABI(RD);
447 const RecordDecl *RD = RT->getDecl();
448 if (RD->hasFlexibleArrayMember())
452 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD))
457 for (const auto *I : RD->fields())
476 const RecordDecl *RD = RT->getDecl();
477 if (RD->hasFlexibleArrayMember())
483 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) {
[all...] |
