| /external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
| SPUISelDAGToDAG.cpp | 771 // Take care of the additional shift, if present:
772 SDValue shift = CurDAG->getTargetConstant(shift_amt, MVT::i32); local
779 shift);
[all...] |
| /external/swiftshader/third_party/subzero/src/ |
| IceTargetLoweringX8632Traits.h | [all...] |
| IceTargetLoweringX8664Traits.h | [all...] |
| IceTargetLoweringX86Base.h | 299 uint16_t Shift = 0;
310 // <Relocatable + Offset>(Base, Index, Shift)
[all...] |
| /frameworks/av/media/libeffects/lvm/wrapper/Bundle/ |
| EffectBundle.cpp | [all...] |
| /prebuilts/go/darwin-x86/src/cmd/vendor/golang.org/x/arch/arm/armasm/ |
| inst.go | 315 // A Shift describes an ARM shift operation.
316 type Shift uint8
319 ShiftLeft Shift = 0 // left shift
320 ShiftRight Shift = 1 // logical (unsigned) right shift
321 ShiftRightSigned Shift = 2 // arithmetic (signed) right shift
322 RotateRight Shift = 3 // right rotat
[all...] |
| /prebuilts/go/linux-x86/src/cmd/vendor/golang.org/x/arch/arm/armasm/ |
| inst.go | 315 // A Shift describes an ARM shift operation.
316 type Shift uint8
319 ShiftLeft Shift = 0 // left shift
320 ShiftRight Shift = 1 // logical (unsigned) right shift
321 ShiftRightSigned Shift = 2 // arithmetic (signed) right shift
322 RotateRight Shift = 3 // right rotat
[all...] |
| /device/linaro/bootloader/OpenPlatformPkg/Drivers/Net/Pp2Dxe/ |
| Mvpp2Lib.c | 462 IN INT32 Shift,
467 if (Shift < 0) {
469 Shift = -Shift;
475 Pe->Sram.Byte[MVPP2_BIT_TO_BYTE(MVPP2_PRS_SRAM_SHIFT_OFFS)] = (UINT8)Shift;
681 /* Shift to ethertype with 2 of MAC Address length */
734 /* Shift to ethertype */
762 INT32 Tid, Shift;
766 Shift = 8;
769 Shift = 4;
[all...] |
| /external/capstone/arch/ARM/ |
| ARMDisassembler.c | 1624 unsigned shift; local
[all...] |
| /external/clang/lib/AST/ |
| Expr.cpp | [all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGISel.cpp | [all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| AMDGPUISelDAGToDAG.cpp | [all...] |
| R600ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonHardwareLoops.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCFastISel.cpp | [all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelDAGToDAG.cpp | 389 /// \brief Address-mode matching performs shift-of-and to and-of-shift
[all...] |
| /external/llvm/lib/Transforms/InstCombine/ |
| InstCombineCasts.cpp | 47 // This is a value scaled by '1 << the shift amt'.
380 // If we are truncating the result of this SHL, and if it's a shift of a
532 // If the shift amount is larger than the size of A, then the result is
537 // Since we're doing an lshr and a zero extend, and know that the shift
538 // amount is smaller than ASize, it is always safe to do the shift in A's
540 Value *Shift = Builder->CreateLShr(A, Cst->getZExtValue());
541 Shift->takeName(Src);
542 return CastInst::CreateIntegerCast(Shift, DestTy, false);
556 // can only shift by values smaller than the size of destination type (in
559 Value *Shift = Builder->CreateAShr(A, Cst->getZExtValue())
[all...] |
| /external/llvm/utils/TableGen/ |
| CodeGenRegisters.cpp | [all...] |
| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| SelectionDAGISel.cpp | [all...] |
| TargetLowering.cpp | [all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| X86ISelDAGToDAG.cpp | [all...] |
| /external/swiftshader/third_party/LLVM/lib/Transforms/InstCombine/ |
| InstCombineCompares.cpp | [all...] |
| /external/swiftshader/third_party/LLVM/lib/Transforms/Scalar/ |
| ScalarReplAggregates.cpp | 735 // full alloca type, we need to do a shift to get the right bits.
794 // Convert the stored type to the actual type, shift it left to insert
[all...] |
| /external/llvm/include/llvm/Object/ |
| COFF.h | 444 uint32_t Shift = (Characteristics >> 20) & 0xF;
445 if (Shift > 0)
446 return 1U << (Shift - 1);
549 uint32_t Shift = (Characteristics & 0x00F00000) >> 20;
550 if (Shift > 0)
551 return 1U << (Shift - 1);
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64FastISel.cpp | 60 unsigned Shift;
66 OffsetReg(0), Shift(0), Offset(0), GV(nullptr) { Base.Reg = 0; }
97 void setShift(unsigned S) { Shift = S; }
98 unsigned getShift() { return Shift; }
[all...] |
