| /external/llvm/lib/Target/X86/ |
| X86RegisterInfo.cpp | 1 //===-- X86RegisterInfo.cpp - X86 Register Information --------------------===//
10 // This file contains the X86 implementation of the TargetRegisterInfo class.
12 // on X86.
53 EnableBasePointer("x86-use-base-pointer", cl::Hidden, cl::init(true),
58 (STI.is64Bit() ? X86::RIP : X86::EIP),
61 (STI.is64Bit() ? X86::RIP : X86::EIP)),
71 StackPtr = X86::RSP;
72 FramePtr = X86::RBP
[all...] |
| X86InstrInfo.cpp | 1 //===-- X86InstrInfo.cpp - X86 Instruction Information --------------------===//
10 // This file contains the X86 implementation of the TargetInstrInfo class.
15 #include "X86.h"
42 #define DEBUG_TYPE "x86-instr-info"
53 " fuse, but the X86 backend currently can't"),
103 (STI.is64Bit() ? X86::ADJCALLSTACKDOWN64 : X86::ADJCALLSTACKDOWN32),
104 (STI.is64Bit() ? X86::ADJCALLSTACKUP64 : X86::ADJCALLSTACKUP32)),
108 { X86::ADC32ri, X86::ADC32mi, 0 }
[all...] |
| X86FloatingPoint.cpp | 26 #include "X86.h"
47 #define DEBUG_TYPE "x86-codegen"
73 const char *getPassName() const override { return "X86 FP Stackifier"; }
120 if (Reg < X86::FP0 || Reg > X86::FP6)
122 Mask |= 1 << (Reg - X86::FP0);
215 /// getStackEntry - Return the X86::FP<n> register in register ST(i).
222 /// getSTReg - Return the X86::ST(i) register which contains the specified
225 return StackTop - 1 - getSlot(RegNo) + X86::ST0;
254 BuildMI(*MBB, I, dl, TII->get(X86::XCH_F)).addReg(STReg)
[all...] |
| X86MCInstLower.cpp | 1 //===-- X86MCInstLower.cpp - Convert X86 MachineInstr to an MCInst --------===//
10 // This file contains code to lower X86 MachineInstrs to their corresponding
250 if (Reg != X86::AL && Reg != X86::AX && Reg != X86::EAX && Reg != X86::RAX)
268 case X86::MOVSX16rr8: // movsbw %al, %ax --> cbtw
269 if (Op0 == X86::AX && Op1 == X86::AL)
270 NewOpcode = X86::CBW
[all...] |
| X86Relocations.h | 1 //===-- X86Relocations.h - X86 Code Relocations -----------------*- C++ -*-===//
10 // This file defines the X86 target-specific relocation types.
20 namespace X86 {
21 /// RelocationType - An enum for the x86 relocation codes. Note that
22 /// the terminology here doesn't follow x86 convention - word means
24 /// by JIT or ObjectCode emitters, this is transparent to the x86 code
|
| X86FrameLowering.cpp | 1 //===-- X86FrameLowering.cpp - X86 Frame Information ----------------------===//
10 // This file contains the X86 implementation of TargetFrameLowering class.
62 return X86::SUB64ri8;
63 return X86::SUB64ri32;
66 return X86::SUB32ri8;
67 return X86::SUB32ri;
74 return X86::ADD64ri8;
75 return X86::ADD64ri32;
78 return X86::ADD32ri8;
79 return X86::ADD32ri
[all...] |
| X86FixupLEAs.cpp | 16 #include "X86.h"
30 #define DEBUG_TYPE "x86-fixup-LEAs"
43 const char *getPassName() const override { return "X86 Atom LEA Fixup"; }
104 case X86::MOV32rr:
105 case X86::MOV64rr: {
109 TII->get(MI->getOpcode() == X86::MOV32rr ? X86::LEA32r
110 : X86::LEA64r))
120 case X86::ADD64ri32:
121 case X86::ADD64ri8
[all...] |
| X86FastISel.cpp | 1 //===-- X86FastISel.cpp - X86 FastISel implementation ---------------------===//
10 // This file defines the X86-specific support for the FastISel class. Much
16 #include "X86.h"
161 bool foldX86XALUIntrinsic(X86::CondCode &CC, const Instruction *I,
207 static std::pair<X86::CondCode, bool>
209 X86::CondCode CC = X86::COND_INVALID;
214 case CmpInst::FCMP_UEQ: CC = X86::COND_E; break;
216 case CmpInst::FCMP_OGT: CC = X86::COND_A; break;
218 case CmpInst::FCMP_OGE: CC = X86::COND_AE; break
[all...] |
| X86ISelDAGToDAG.cpp | 1 //===- X86ISelDAGToDAG.cpp - A DAG pattern matching inst selector for X86 -===//
10 // This file defines a DAG pattern matching instruction selector for X86,
11 // converting from a legalized dag to a X86 dag.
15 #include "X86.h"
38 #define DEBUG_TYPE "x86-isel"
94 return RegNode->getReg() == X86::RIP;
143 /// ISel - X86 specific code to select X86 machine instructions for
162 return "X86 DAG->DAG Instruction Selection";
498 // late" legalization of these inline with the X86 isel pass
[all...] |
| X86CodeEmitter.cpp | 1 //===-- X86CodeEmitter.cpp - Convert X86 code to machine code -------------===//
10 // This file contains the pass that transforms the X86 machine instructions into
15 #include "X86.h"
38 #define DEBUG_TYPE "x86-emitter"
63 return "X86 Machine Code Emitter";
122 /// createX86CodeEmitterPass - Return a pass that emits the collected X86 code
150 if (Desc.getOpcode() == X86::MOVPC32r)
151 emitInstruction(*I, &II->get(X86::POP32r));
160 /// determineREX - Determine if the MachineInstr has to be encoded with a X86-64
162 /// size, and 3) use of X86-64 extended registers
[all...] |
| X86SelectionDAGInfo.cpp | 1 //===-- X86SelectionDAGInfo.cpp - X86 SelectionDAG Info -------------------===//
25 #define DEBUG_TYPE "x86-selectiondag-info"
96 ValReg = X86::AX;
101 ValReg = X86::EAX;
106 ValReg = X86::RAX;
112 ValReg = X86::AL;
129 Chain = DAG.getCopyToReg(Chain, dl, X86::AL, Src, InFlag);
133 Chain = DAG.getCopyToReg(Chain, dl, Subtarget.is64Bit() ? X86::RCX : X86::ECX,
136 Chain = DAG.getCopyToReg(Chain, dl, Subtarget.is64Bit() ? X86::RDI : X86::EDI
[all...] |
| /external/eclipse-basebuilder/basebuilder-3.6.2/org.eclipse.releng.basebuilder/plugins/org.eclipse.equinox.launcher.gtk.linux.x86_1.1.2.R36x_v20101019_1345/ |
| launcher.gtk.linux.x86.properties | 11 pluginName = Equinox Launcher Linux X86 Fragment
|
| /external/eclipse-basebuilder/basebuilder-3.6.2/org.eclipse.releng.basebuilder/plugins/org.eclipse.equinox.launcher.win32.win32.x86_1.1.2.R36x_v20101019_1345/ |
| launcher.win32.win32.x86.properties | 11 pluginName = Equinox Launcher Win32 X86 Fragment
|
| /external/llvm/lib/Target/X86/AsmParser/ |
| X86AsmInstrumentation.cpp | 1 //===-- X86AsmInstrumentation.cpp - Instrument X86 inline assembly C++ -*-===//
36 return Reg == X86::RSP || Reg == X86::ESP || Reg == X86::SP;
104 case X86::MOV8mi:
105 case X86::MOV8mr:
106 case X86::MOV8rm:
109 case X86::MOV16mi:
110 case X86::MOV16mr:
111 case X86::MOV16rm
[all...] |
| X86Operand.h | 1 //===-- X86Operand.h - Parsed X86 machine instruction --------------------===//
20 /// X86Operand - Instances of this class represent a parsed X86 machine
235 getMemIndexReg() >= X86::XMM0 && getMemIndexReg() <= X86::XMM15;
239 getMemIndexReg() >= X86::YMM0 && getMemIndexReg() <= X86::YMM15;
243 getMemIndexReg() >= X86::XMM0 && getMemIndexReg() <= X86::XMM15;
247 getMemIndexReg() >= X86::YMM0 && getMemIndexReg() <= X86::YMM15
[all...] |
| X86AsmParser.cpp | 1 //===-- X86AsmParser.cpp - Parse X86 assembly to MCInst instructions ------===//
712 return (STI.getFeatureBits() & X86::Mode64Bit) != 0;
716 return (STI.getFeatureBits() & X86::Mode32Bit) != 0;
720 return (STI.getFeatureBits() & X86::Mode16Bit) != 0;
724 (X86::Mode64Bit | X86::Mode32Bit | X86::Mode16Bit);
728 (X86::Mode64Bit | X86::Mode32Bit | X86::Mode16Bit)))
[all...] |
| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| X86AsmBackend.cpp | 1 //===-- X86AsmBackend.cpp - X86 Assembler Backend -------------------------===//
35 MCDisableArithRelaxation("mc-x86-disable-arith-relaxation",
36 cl::desc("Disable relaxation of arithmetic instruction for X86"));
51 case X86::reloc_riprel_4byte:
52 case X86::reloc_riprel_4byte_movq_load:
53 case X86::reloc_signed_4byte:
54 case X86::reloc_global_offset_table:
61 case X86::reloc_global_offset_table8:
90 return X86::NumTargetFixupKinds;
94 const static MCFixupKindInfo Infos[X86::NumTargetFixupKinds] =
[all...] |
| X86BaseInfo.h | 1 //===-- X86BaseInfo.h - Top level definitions for X86 -------- --*- C++ -*-===//
11 // the X86 target useful for the compiler back-end and the MC libraries.
27 namespace X86 {
44 } // end namespace X86;
53 // X86 Specific MachineOperand flags.
70 /// See the X86-64 ELF ABI supplement for more details.
77 /// See the X86-64 ELF ABI supplement for more details.
85 /// See the X86-64 ELF ABI supplement for more details.
92 /// See the X86-64 ELF ABI supplement for more details.
109 /// block for the symbol. Used in the x86-64 local dynamic TLS access model
[all...] |
| X86FixupKinds.h | 1 //===-- X86FixupKinds.h - X86 Specific Fixup Entries ------------*- C++ -*-===//
16 namespace X86 {
|
| X86WinCOFFObjectWriter.cpp | 1 //===-- X86WinCOFFObjectWriter.cpp - X86 Win COFF Writer ------------------===//
52 case X86::reloc_riprel_4byte:
53 case X86::reloc_riprel_4byte_movq_load:
56 case X86::reloc_signed_4byte:
72 case X86::reloc_riprel_4byte:
73 case X86::reloc_riprel_4byte_movq_load:
76 case X86::reloc_signed_4byte:
|
| /external/llvm/lib/Target/X86/Disassembler/ |
| X86Disassembler.cpp | 1 //===-- X86Disassembler.cpp - Disassembler for x86 and x86_64 -------------===//
10 // This file is part of the X86 Disassembler.
33 #define DEBUG_TYPE "x86-disassembler"
60 namespace X86 {
85 (X86::Mode16Bit | X86::Mode32Bit | X86::Mode64Bit)) {
86 case X86::Mode16Bit:
89 case X86::Mode32Bit:
92 case X86::Mode64Bit
[all...] |
| /external/llvm/lib/Target/X86/InstPrinter/ |
| X86InstComments.cpp | 10 // This defines functionality used to emit comments about X86 instructions to
28 /// EmitAnyX86InstComments - This function decodes x86 instructions and prints
38 case X86::INSERTPSrr:
39 case X86::VINSERTPSrr:
47 case X86::MOVLHPSrr:
48 case X86::VMOVLHPSrr:
55 case X86::MOVHLPSrr:
56 case X86::VMOVHLPSrr:
63 case X86::PALIGNR128rr:
64 case X86::VPALIGNR128rr
[all...] |
| /external/llvm/host/include/llvm/Config/ |
| Targets.def | 28 LLVM_TARGET(X86)
|
| /external/chromium_org/third_party/WebKit/Tools/Scripts/webkitruby/check-for-inappropriate-macros-in-external-headers-tests/resources/Fake.framework/Headers/ |
| Fail.h | 4 #if CPU(X86)
|
| /frameworks/compile/mclinker/ |
| Android.mk | 37 # X86 Code Generation Libraries
39 lib/Target/X86 \
40 lib/Target/X86/TargetInfo
|
