| /external/u-boot/drivers/gpio/ |
| stm32f7_gpio.c | 26 struct stm32_gpio_regs *regs = priv->regs; local
30 clrsetbits_le32(®s->moder, mask, STM32_GPIO_MODE_IN << bits_index);
39 struct stm32_gpio_regs *regs = priv->regs; local
43 clrsetbits_le32(®s->moder, mask, STM32_GPIO_MODE_OUT << bits_index);
45 clrsetbits_le32(®s->odr, mask, value ? mask : 0);
53 struct stm32_gpio_regs *regs = priv->regs; local
55 return readl(®s->idr) & IN_OUT_BIT_INDEX(offset) ? 1 : 0
61 struct stm32_gpio_regs *regs = priv->regs; local
[all...] |
| mxc_gpio.c | 13 #include <asm/arch/imx-regs.h>
26 struct gpio_regs *regs; member in struct:mxc_gpio_plat
30 struct gpio_regs *regs; member in struct:mxc_bank_info
64 struct gpio_regs *regs; local
72 regs = (struct gpio_regs *)gpio_ports[port];
74 l = readl(®s->gpio_dir);
83 writel(l, ®s->gpio_dir);
91 struct gpio_regs *regs; local
99 regs = (struct gpio_regs *)gpio_ports[port];
101 l = readl(®s->gpio_dr)
114 struct gpio_regs *regs; local
[all...] |
| imx_rgpio2p.c | 24 struct gpio_regs *regs; member in struct:imx_rgpio2p_data
29 struct gpio_regs *regs; member in struct:imx_rgpio2p_plat
32 static int imx_rgpio2p_is_output(struct gpio_regs *regs, int offset)
36 val = readl(®s->gpio_pddr);
41 static void imx_rgpio2p_bank_direction(struct gpio_regs *regs, int offset,
46 l = readl(®s->gpio_pddr);
55 writel(l, ®s->gpio_pddr);
58 static void imx_rgpio2p_bank_set_value(struct gpio_regs *regs, int offset,
62 writel((1 << offset), ®s->gpio_psor);
64 writel((1 << offset), ®s->gpio_pcor)
[all...] |
| spear_gpio.c | 19 struct gpio_regs *regs = (struct gpio_regs *)CONFIG_GPIO_BASE; local
22 val = readl(®s->gpiodir);
29 writel(val, ®s->gpiodir);
36 struct gpio_regs *regs = (struct gpio_regs *)CONFIG_GPIO_BASE; local
39 writel(1 << gpio, ®s->gpiodata[DATA_REG_ADDR(gpio)]);
41 writel(0, ®s->gpiodata[DATA_REG_ADDR(gpio)]);
48 struct gpio_regs *regs = (struct gpio_regs *)CONFIG_GPIO_BASE; local
51 val = readl(®s->gpiodata[DATA_REG_ADDR(gpio)]);
|
| /external/u-boot/drivers/mtd/nand/ |
| fsl_elbc_spl.c | 21 fsl_lbc_t *regs = LBC_BASE_ADDR; local
24 uint32_t status = in_be32(®s->ltesr);
42 fsl_lbc_t *regs = LBC_BASE_ADDR; local
60 out_be32(®s->fcr, (NAND_CMD_READ0 << FCR_CMD0_SHIFT) |
62 out_be32(®s->fir,
69 out_be32(®s->fcr, NAND_CMD_READ0 << FCR_CMD0_SHIFT);
70 out_be32(®s->fir,
77 out_be32(®s->fbcr, 0);
78 clrsetbits_be32(®s->bank[0].br, BR_DECC, BR_DECC_CHK_GEN);
82 out_be32(®s->fbar, offs >> block_shift)
[all...] |
| /external/google-breakpad/src/client/linux/dump_writer_common/ |
| ucontext_reader.cc | 53 const greg_t* regs = uc->uc_mcontext.gregs; local
58 out->gs = regs[REG_GS];
59 out->fs = regs[REG_FS];
60 out->es = regs[REG_ES];
61 out->ds = regs[REG_DS];
63 out->edi = regs[REG_EDI];
64 out->esi = regs[REG_ESI];
65 out->ebx = regs[REG_EBX];
66 out->edx = regs[REG_EDX];
67 out->ecx = regs[REG_ECX]
[all...] |
| /external/u-boot/arch/x86/lib/ |
| pmu.c | 30 struct pmu_regs *regs; member in struct:pmu_mid
33 static int pmu_read_status(struct pmu_regs *regs)
39 val = readl(®s->sts);
50 static int pmu_power_lss(struct pmu_regs *regs, unsigned int lss, bool on)
58 ret = pmu_read_status(regs);
63 ssc = readl(®s->sss[offset]);
72 writel(ssc, ®s->ssc[offset]);
75 writel(0x00002201, ®s->cmd);
78 return pmu_read_status(regs);
93 return pmu_power_lss(pmu->regs, lss, on)
[all...] |
| scu.c | 34 struct ipc_regs *regs; member in struct:scu
39 * @regs: register map of SCU
47 static void scu_ipc_send_command(struct ipc_regs *regs, u32 cmd)
49 writel(cmd, ®s->cmd);
54 * @regs: register map of SCU
62 static int scu_ipc_check_status(struct ipc_regs *regs)
68 status = readl(®s->status);
85 static int scu_ipc_cmd(struct ipc_regs *regs, u32 cmd, u32 sub,
91 writel(*in++, ®s->wbuf[i]);
93 scu_ipc_send_command(regs, (inlen << 16) | (sub << 12) | cmd)
[all...] |
| /external/u-boot/drivers/video/ |
| atmel_hlcdfb.c | 62 struct atmel_hlcd_regs *regs; local
68 regs = (struct atmel_hlcd_regs *)panel_info.mmio;
71 writel(LCDC_LCDDIS_DISPDIS, ®s->lcdc_lcddis);
72 ret = wait_for_bit_le32(®s->lcdc_lcdsr, LCDC_LCDSR_DISPSTS,
77 writel(LCDC_LCDDIS_SYNCDIS, ®s->lcdc_lcddis);
78 ret = wait_for_bit_le32(®s->lcdc_lcdsr, LCDC_LCDSR_LCDSTS,
83 writel(LCDC_LCDDIS_CLKDIS, ®s->lcdc_lcddis);
84 ret = wait_for_bit_le32(®s->lcdc_lcdsr, LCDC_LCDSR_CLKSTS,
89 writel(LCDC_LCDDIS_PWMDIS, ®s->lcdc_lcddis);
90 ret = wait_for_bit_le32(®s->lcdc_lcdsr, LCDC_LCDSR_PWMSTS
253 struct atmel_hlcd_regs *regs; member in struct:atmel_hlcdc_priv
293 struct atmel_hlcd_regs *regs = priv->regs; local
[all...] |
| /external/u-boot/drivers/usb/gadget/ |
| fotg210.c | 51 struct fotg210_regs *regs; member in struct:fotg210_chip
79 struct fotg210_regs *regs = chip->regs; local
83 setbits_le32(®s->iep[ep - 1], IEP_RESET);
85 clrbits_le32(®s->iep[ep - 1], IEP_RESET);
87 clrbits_le32(®s->iep[ep - 1], IEP_STALL);
90 setbits_le32(®s->oep[ep - 1], OEP_RESET);
92 clrbits_le32(®s->oep[ep - 1], OEP_RESET);
94 clrbits_le32(®s->oep[ep - 1], OEP_STALL);
102 struct fotg210_regs *regs = chip->regs local
191 struct fotg210_regs *regs = chip->regs; local
211 struct fotg210_regs *regs = chip->regs; local
323 struct fotg210_regs *regs = chip->regs; local
468 struct fotg210_regs *regs = chip->regs; local
505 struct fotg210_regs *regs = chip->regs; local
549 struct fotg210_regs *regs = chip->regs; local
587 struct fotg210_regs *regs = chip->regs; local
672 struct fotg210_regs *regs = chip->regs; local
710 struct fotg210_regs *regs = chip->regs; local
749 struct fotg210_regs *regs; local
837 struct fotg210_regs *regs = chip->regs; local
[all...] |
| /external/u-boot/arch/arm/include/asm/ |
| ptrace.h | 20 #define instruction_pointer(regs) \
21 (pc_pointer((regs)->ARM_pc))
|
| /external/u-boot/arch/microblaze/include/asm/ |
| ptrace.h | 78 #define instruction_pointer(regs) ((regs)->pc)
79 #define user_mode(regs) (!(regs)->kernel_mode)
85 #define PT_REGS_SYSCALL(regs) (regs)->gpr[0]
86 #define PT_REGS_SET_SYSCALL(regs, val) ((regs)->gpr[0] = (val))
|
| /external/u-boot/board/gdsys/a38x/ |
| spl.c | 15 u32 *regs = (u32 *)(*bootrom_save); local
17 printf("Returning to BootROM (return address %08x)...\n", regs[13]);
|
| /external/u-boot/drivers/pwm/ |
| tegra_pwm.c | 14 struct pwm_ctlr *regs; member in struct:tegra_pwm_priv
21 struct pwm_ctlr *regs = priv->regs; local
35 writel(reg, ®s[channel].control);
44 struct pwm_ctlr *regs = priv->regs; local
49 clrsetbits_le32(®s[channel].control, PWM_ENABLE_MASK,
59 priv->regs = (struct pwm_ctlr *)dev_read_addr(dev);
|
| /external/u-boot/drivers/spi/ |
| sh_spi.c | 45 sh_spi_set_bit(SH_SPI_RSTF, &ss->regs->cr2);
46 sh_spi_clear_bit(SH_SPI_RSTF, &ss->regs->cr2);
51 while (sh_spi_read(&ss->regs->cr1) & SH_SPI_RBE) {
61 while (!(sh_spi_read(&ss->regs->cr1) & SH_SPI_TBE)) {
82 sh_spi_clear_bit(SH_SPI_SSS0 | SH_SPI_SSS1, &ss->regs->cr4);
83 sh_spi_set_bit(val, &ss->regs->cr4);
98 ss->regs = (struct sh_spi_regs *)CONFIG_SH_SPI_BASE;
101 sh_spi_write(0xfe, &ss->regs->cr1);
103 sh_spi_write(0x00, &ss->regs->cr1);
105 sh_spi_write(0x00, &ss->regs->cr3)
[all...] |
| xilinx_spi.c | 105 struct xilinx_spi_regs *regs; member in struct:xilinx_spi_priv
114 struct xilinx_spi_regs *regs = priv->regs; local
116 priv->regs = (struct xilinx_spi_regs *)xilinx_spi_base_list[bus->seq];
118 writel(SPISSR_RESET_VALUE, ®s->srr);
127 struct xilinx_spi_regs *regs = priv->regs; local
129 writel(SPISSR_ACT(cs), ®s->spissr);
136 struct xilinx_spi_regs *regs = priv->regs; local
145 struct xilinx_spi_regs *regs = priv->regs; local
157 struct xilinx_spi_regs *regs = priv->regs; local
170 struct xilinx_spi_regs *regs = priv->regs; local
258 struct xilinx_spi_regs *regs = priv->regs; local
[all...] |
| zynq_qspi.c | 78 struct zynq_qspi_regs *regs; member in struct:zynq_qspi_platdata
85 struct zynq_qspi_regs *regs; member in struct:zynq_qspi_priv
105 plat->regs = (struct zynq_qspi_regs *)fdtdec_get_addr(blob,
113 debug("%s: regs=%p max-frequency=%d\n", __func__,
114 plat->regs, plat->frequency);
121 struct zynq_qspi_regs *regs = priv->regs; local
125 writel(~ZYNQ_QSPI_ENR_SPI_EN_MASK, ®s->enr);
128 writel(ZYNQ_QSPI_IXR_ALL_MASK, ®s->idr);
131 writel(ZYNQ_QSPI_TXFIFO_THRESHOLD, ®s->txftr)
269 struct zynq_qspi_regs *regs = priv->regs; local
294 struct zynq_qspi_regs *regs = priv->regs; local
341 struct zynq_qspi_regs *regs = priv->regs; local
427 struct zynq_qspi_regs *regs = priv->regs; local
496 struct zynq_qspi_regs *regs = priv->regs; local
507 struct zynq_qspi_regs *regs = priv->regs; local
553 struct zynq_qspi_regs *regs = priv->regs; local
587 struct zynq_qspi_regs *regs = priv->regs; local
[all...] |
| /external/u-boot/drivers/timer/ |
| atmel_pit_timer.c | 24 struct atmel_pit_regs *regs; member in struct:atmel_pit_platdata
30 struct atmel_pit_regs *const regs = plat->regs; local
31 u32 val = readl(®s->value_image);
41 struct atmel_pit_regs *const regs = plat->regs; local
57 writel(AT91_PIT_VALUE | AT91_PIT_PITEN, ®s->mode);
66 plat->regs = (struct atmel_pit_regs *)devfdt_get_addr_ptr(dev);
|
| ag101p_timer.c | 62 struct atftmr_timer_regs *regs; member in struct:atftmr_timer_platdata
68 struct atftmr_timer_regs *const regs = plat->regs; local
70 val = readl(®s->t3_counter);
78 struct atftmr_timer_regs *const regs = plat->regs; local
80 writel(0, ®s->t3_load);
81 writel(0, ®s->t3_counter);
82 writel(TIMER_LOAD_VAL, ®s->t3_match1);
83 writel(TIMER_LOAD_VAL, ®s->t3_match2)
[all...] |
| /dalvik/dx/src/com/android/dx/dex/code/form/ |
| Form21c.java | 52 RegisterSpecList regs = insn.getRegisters(); local
53 return regs.get(0).regString() + ", " + insn.cstString();
79 RegisterSpecList regs = insn.getRegisters(); local
82 switch (regs.size()) {
84 reg = regs.get(0);
92 reg = regs.get(0);
93 if (reg.getReg() != regs.get(1).getReg()) {
125 RegisterSpecList regs = insn.getRegisters(); local
126 int sz = regs.size();
128 boolean compat = unsignedFitsInByte(regs.get(0).getReg())
145 RegisterSpecList regs = insn.getRegisters(); local
[all...] |
| Form31c.java | 50 RegisterSpecList regs = insn.getRegisters(); local
51 return regs.get(0).regString() + ", " + insn.cstString();
77 RegisterSpecList regs = insn.getRegisters(); local
80 switch (regs.size()) {
82 reg = regs.get(0);
90 reg = regs.get(0);
91 if (reg.getReg() != regs.get(1).getReg()) {
116 RegisterSpecList regs = insn.getRegisters(); local
117 int sz = regs.size();
119 boolean compat = unsignedFitsInByte(regs.get(0).getReg())
136 RegisterSpecList regs = insn.getRegisters(); local
[all...] |
| /external/u-boot/drivers/mmc/ |
| ftsdc010_mci.c | 66 struct ftsdc010_mmc __iomem *regs = chip->regs; local
87 ®s->clr);
88 writel(arg, ®s->argu);
89 writel(cmd, ®s->cmd);
93 if (readl(®s->status) & FTSDC010_STATUS_CMD_SEND) {
94 writel(FTSDC010_STATUS_CMD_SEND, ®s->clr);
102 st = readl(®s->status);
103 writel(st & FTSDC010_STATUS_RSP_MASK, ®s->clr);
109 mmc_cmd->response[0] = readl(®s->rsp3)
136 struct ftsdc010_mmc __iomem *regs = chip->regs; local
187 struct ftsdc010_mmc __iomem *regs = chip->regs; local
288 struct ftsdc010_mmc __iomem *regs = chip->regs; local
312 struct ftsdc010_mmc __iomem *regs = chip->regs; local
320 struct ftsdc010_mmc __iomem *regs = chip->regs; local
332 struct ftsdc010_mmc __iomem *regs = chip->regs; local
[all...] |
| /dalvik/dexgen/src/com/android/dexgen/dex/code/form/ |
| Form22b.java | 46 RegisterSpecList regs = insn.getRegisters(); local
49 return regs.get(0).regString() + ", " + regs.get(1).regString() +
69 RegisterSpecList regs = insn.getRegisters(); local
71 (regs.size() == 2) &&
72 unsignedFitsInByte(regs.get(0).getReg()) &&
73 unsignedFitsInByte(regs.get(1).getReg()))) {
98 RegisterSpecList regs = insn.getRegisters(); local
103 opcodeUnit(insn, regs.get(0).getReg()),
104 codeUnit(regs.get(1).getReg(), value & 0xff))
[all...] |
| Form22c.java | 48 RegisterSpecList regs = insn.getRegisters(); local
49 return regs.get(0).regString() + ", " + regs.get(1).regString() +
72 RegisterSpecList regs = insn.getRegisters(); local
74 (regs.size() == 2) &&
75 unsignedFitsInNibble(regs.get(0).getReg()) &&
76 unsignedFitsInNibble(regs.get(1).getReg()))) {
101 RegisterSpecList regs = insn.getRegisters(); local
106 makeByte(regs.get(0).getReg(), regs.get(1).getReg()))
[all...] |
| Form22s.java | 46 RegisterSpecList regs = insn.getRegisters(); local
49 return regs.get(0).regString() + ", " + regs.get(1).regString()
69 RegisterSpecList regs = insn.getRegisters(); local
71 (regs.size() == 2) &&
72 unsignedFitsInNibble(regs.get(0).getReg()) &&
73 unsignedFitsInNibble(regs.get(1).getReg()))) {
98 RegisterSpecList regs = insn.getRegisters(); local
104 makeByte(regs.get(0).getReg(), regs.get(1).getReg()))
[all...] |
