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Searched refs:dispatch_grf_start_reg (Results 1 - 25 of 29) sorted by null

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/external/mesa3d/src/mesa/drivers/dri/i965/
brw_gs_state.c	`63 gs->thread3.dispatch_grf_start_reg = 1;`
gen7_vs_state.c	`67 OUT_BATCH((prog_data->dispatch_grf_start_reg <<`
gen8_hs_state.c	`64 SET_FIELD(prog_data->dispatch_grf_start_reg,`
gen8_vs_state.c	`69 OUT_BATCH((prog_data->dispatch_grf_start_reg <<`
brw_vs_state.c	`97 vs->thread3.dispatch_grf_start_reg = prog_data->dispatch_grf_start_reg;`
gen6_constant_state.c	`162 prog_data->dispatch_grf_start_reg + i / 8);`
gen7_ds_state.c	`93 OUT_BATCH(SET_FIELD(prog_data->dispatch_grf_start_reg,`
gen7_gs_state.c	`84 (prog_data->dispatch_grf_start_reg <<`
gen7_hs_state.c	`96 SET_FIELD(prog_data->dispatch_grf_start_reg,`
gen8_ds_state.c	`62 OUT_BATCH(SET_FIELD(prog_data->dispatch_grf_start_reg,`
gen8_gs_state.c	`80 (prog_data->dispatch_grf_start_reg <<`
brw_wm_state.c	`97 assert(prog_data->base.dispatch_grf_start_reg == 145 wm->thread3.dispatch_grf_start_reg = 146 prog_data->base.dispatch_grf_start_reg;`
gen6_vs_state.c	`139 OUT_BATCH((prog_data->dispatch_grf_start_reg <<`
brw_clip_state.c	`92 clip->thread3.dispatch_grf_start_reg = 1;`
gen6_gs_state.c	`157 (prog_data->dispatch_grf_start_reg <<`
gen8_ps_state.c	`254 dw7 \|= prog_data->base.dispatch_grf_start_reg <<`
brw_sf_state.c	`157 sf->thread3.dispatch_grf_start_reg = 3;`
brw_structs.h	`107 unsigned dispatch_grf_start_reg:4; member in struct:thread3`
gen6_wm_state.c	`141 dw4 \|= prog_data->base.dispatch_grf_start_reg <<`
gen7_wm_state.c	`226 dw5 \|= prog_data->base.dispatch_grf_start_reg <<`
brw_compiler.h	`357 unsigned dispatch_grf_start_reg; member in struct:brw_stage_prog_data`
brw_vec4_tcs.cpp	`478 prog_data->base.base.dispatch_grf_start_reg = v.payload.num_regs;`
brw_vec4.cpp	`[all...]`
/external/mesa3d/src/intel/blorp/
blorp_genX_exec.h	`424 vs_prog_data->base.base.dispatch_grf_start_reg; 570 prog_data->base.dispatch_grf_start_reg; 673 prog_data->base.dispatch_grf_start_reg; 735 prog_data->base.dispatch_grf_start_reg; [all...]`
/external/mesa3d/src/intel/vulkan/
genX_pipeline.c	`[all...]`

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